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21. 发明申请

US20080286960A1 Method of manufacturing semiconductor device suitable for forming wiring using damascene method 有权
标题翻译：使用镶嵌方法制造适合于形成布线的半导体器件的方法
公开(公告)号：US20080286960A1
公开(公告)日：2008-11-20
申请号：US12216832
申请日：2008-07-11
申请人： Noriyoshi Shimizu , Nobuyuki Ohtsuka , Hideki Kitada , Yoshiyuki Nakao
发明人： Noriyoshi Shimizu , Nobuyuki Ohtsuka , Hideki Kitada , Yoshiyuki Nakao
IPC分类号： H01L21/768
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76831 , H01L21/76844 , H01L21/76855 , H01L21/76864 , H01L21/76867 , H01L21/76873 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.
摘要翻译：（a1）在半导体基板上形成的层间绝缘膜中形成有凹部。（a2）通过CVD形成Mn的第一膜，所述第一膜覆盖所述凹部的内表面和所述绝缘膜的上表面。（a3）基本上由Cu组成的导电材料沉积在第一膜上，以将导电材料嵌入凹部中。（a4）半导体衬底退火。在形成阻挡层的同时具有提高紧密粘合性的功能的期间，能够确保布线部件的充分的密合性，防止配线部件的剥离。

22. 发明申请

US20070049024A1 Manufacture method for semiconductor device having concave portions filled with conductor containing Cu as its main composition 失效
标题翻译：具有填充有以Cu为主要成分的导体的凹部的半导体装置的制造方法
公开(公告)号：US20070049024A1
公开(公告)日：2007-03-01
申请号：US11294471
申请日：2005-12-06
申请人： Yoshiyuki Nakao , Hideki Kitada , Nobuyuki Ohtsuka , Noriyoshi Shimizu
发明人： Yoshiyuki Nakao , Hideki Kitada , Nobuyuki Ohtsuka , Noriyoshi Shimizu
IPC分类号： H01L21/44
CPC分类号： H01L21/76843 , H01L21/76831 , H01L21/76858 , H01L21/76864 , H01L21/76873 , H01L2924/0002 , H01L2924/00
摘要： An insulating film having a concave portion is formed on a semiconductor substrate. The inner surface of the concave portion and the upper surface of the insulating film are covered with an auxiliary film made of Cu alloy containing a first metal element other than Cu. A conductive member containing Cu as a main composition is deposited on the auxiliary film, the conductive member being embedded in the concave portion. Heat treatment is performed in an atmosphere containing P compound, Si compound or B compound. With this method, a content of element other than Cu in the conductive member can be reduced and a resistivity can be lowered.
摘要翻译：在半导体衬底上形成具有凹部的绝缘膜。凹部的内表面和绝缘膜的上表面被包含Cu以外的第一金属元素的由Cu合金制成的辅助膜覆盖。含有Cu作为主要组成的导电构件沉积在辅助膜上，导电构件嵌入凹部中。热处理在含有P化合物，Si化合物或B化合物的气氛中进行。通过这种方法，可以减少导电部件中除了Cu以外的元素的含量，并且可以降低电阻率。

23. 发明授权

US08685265B2 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus 有权
标题翻译：半导体器件和半导体制造装置的制造方法
公开(公告)号：US08685265B2
公开(公告)日：2014-04-01
申请号：US13469707
申请日：2012-05-11
申请人： Yoshiyuki Nakao , Kazuo Hashimi
发明人： Yoshiyuki Nakao , Kazuo Hashimi
IPC分类号： H01L21/302
CPC分类号： H01J37/32963 , H01J37/32972 , H01L21/32137
摘要： An etching apparatus includes a process unit and a control unit. Emission intensity of plasma inside the process unit is obtained by an OES detector, a nonlinear regression analysis is performed by an etching control device to determine a regression formula. The nonlinear regression analysis is performed by using the emission intensity of the plasma obtained until a first time when the emission intensity of the plasma passes a peak, and a second time to be an etching end point is calculated by using the regression formula. The etching end point is calculated as a time when the emission intensity decreases for a predetermined value from the first time. The etching apparatus finishes an etching when the process reaches the etching end point. It is thereby possible to control the etching end point with high-accuracy.
摘要翻译：蚀刻装置包括处理单元和控制单元。通过OES检测器获得处理单元内的等离子体的发射强度，通过蚀刻控制装置进行非线性回归分析以确定回归公式。通过使用等离子体的发射强度，直到等离子体的发射强度通过峰值为止的第一次，并且通过使用回归公式计算第二次作为蚀刻终点来进行非线性回归分析。蚀刻终点被计算为从第一次发射强度降低预定值的时间。当处理到达刻蚀终点时，蚀刻装置完成蚀刻。从而可以高精度地控制蚀刻终点。

24. 发明申请

US20120092005A1 ROTARY EDDY CURRENT TESTING PROBE DEVICE 有权
标题翻译：旋转EDDY电流测试探头设备
公开(公告)号：US20120092005A1
公开(公告)日：2012-04-19
申请号：US13286429
申请日：2011-11-01
申请人： Takashi HIBINO , Takashi Fujimoto , Shigeki Namekata , Keisuke Komatsu , Yoshiyuki Nakao , Makoto Takata , Makoto Sakamoto
发明人： Takashi HIBINO , Takashi Fujimoto , Shigeki Namekata , Keisuke Komatsu , Yoshiyuki Nakao , Makoto Takata , Makoto Sakamoto
IPC分类号： G01N27/90
CPC分类号： G01N27/902 , G01N27/904
摘要： A rotary eddy current flaw detection probe device has a plurality of Θ-shaped eddy current flaw detection probes attached in a rotating disc for detecting flaws in all directions regardless of the flaw direction. Four Θ-shaped eddy current testing probes P11 to P22 are arranged around the rotation center Ds1 of a rotating disc 111, and are embedded in the disc 111. The coil planes of detector coils Ds11 to Ds22 of the testing probes P11 to P22 are parallel with each other, and are perpendicular to the rotation plane of the rotating disc 111. The coil planes of the detector coils incline at an angle θ relative to a line Y passing through the centers Ps11 and Ps12 of the probes P11 and P12. The detector coils Dc11 and Dc12 are cumulatively connected to each other, and the detector coils Dc21 and Dc22 are differentially connected to each other.
摘要翻译：旋转涡流探伤探针装置具有多个Θ形的涡流探伤探针，其安装在旋转盘中，用于检测各个方向的瑕疵，而不管瑕疵方向如何。四个Θ形涡流测试探针P11至P22围绕旋转盘111的旋转中心Ds1布置，并被嵌入盘111中。测试探针P11至P22的检测器线圈Ds11至Ds22的线圈平面平行彼此垂直于旋转盘111的旋转平面。检测器线圈的线圈平面以一定角度倾斜; 相对于穿过探针P11和P12的中心Ps11和Ps12的线Y。检测器线圈Dc11和Dc12彼此累积连接，检测线圈Dc21和Dc22彼此差分连接。

25. 发明授权

US08071474B2 Method of manufacturing semiconductor device suitable for forming wiring using damascene method 有权
标题翻译：使用镶嵌方法制造适合于形成布线的半导体器件的方法
公开(公告)号：US08071474B2
公开(公告)日：2011-12-06
申请号：US12853676
申请日：2010-08-10
申请人： Noriyoshi Shimizu , Nobuyuki Ohtsuka , Hideki Kitada , Yoshiyuki Nakao
发明人： Noriyoshi Shimizu , Nobuyuki Ohtsuka , Hideki Kitada , Yoshiyuki Nakao
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76831 , H01L21/76844 , H01L21/76855 , H01L21/76864 , H01L21/76867 , H01L21/76873 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.
摘要翻译：（a1）在半导体基板上形成的层间绝缘膜中形成有凹部。（a2）通过CVD形成Mn的第一膜，所述第一膜覆盖所述凹部的内表面和所述绝缘膜的上表面。（a3）基本上由Cu组成的导电材料沉积在第一膜上，以将导电材料嵌入凹部中。（a4）半导体衬底退火。在形成阻挡层的同时具有提高紧密粘合性的功能的期间，能够确保布线部件的充分的密合性，防止配线部件的剥离。

26. 发明授权

US08067836B2 Semiconductor device with reduced increase in copper film resistance 有权
标题翻译：半导体器件的铜膜电阻降低
公开(公告)号：US08067836B2
公开(公告)日：2011-11-29
申请号：US12431944
申请日：2009-04-29
申请人： Masaki Haneda , Noriyoshi Shimizu , Nobuyuki Ohtsuka , Yoshiyuki Nakao , Michie Sunayama , Takahiro Tabira
发明人： Masaki Haneda , Noriyoshi Shimizu , Nobuyuki Ohtsuka , Yoshiyuki Nakao , Michie Sunayama , Takahiro Tabira
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L21/4763 , H01L21/28 , H01L21/44
CPC分类号： H01L23/53238 , H01L21/2855 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L21/76858 , H01L21/76867 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen formed on the refractory metal film, and a copper film formed on the metal film to fill in the recess.
摘要翻译：半导体器件包括在半导体衬底上形成的氧的绝缘膜，在绝缘膜中形成的凹部，形成在凹部的内壁上的难熔金属膜，在耐火材料上形成的包含铜，锰和氮的金属膜金属膜和形成在金属膜上的铜膜以填充凹部。

27. 发明授权

US08027796B2 S/N ratio measuring method in eddy current testing on internal surface of pipe or tube 有权
标题翻译：管/内管涡流检测中的S / N比测量方法
公开(公告)号：US08027796B2
公开(公告)日：2011-09-27
申请号：US12084380
申请日：2006-10-27
申请人： Shoji Kinomura , Yoshiyuki Nakao , Toshiya Kodai , Shugo Nishiyama
发明人： Shoji Kinomura , Yoshiyuki Nakao , Toshiya Kodai , Shugo Nishiyama
IPC分类号： G01R29/26
CPC分类号： G01N27/9046
摘要： A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: V ⁢ ⁢ 1 = π / n · ∑ i = 1 n ⁢ ( X ⁡ ( i ) 2 + Y ⁡ ( i ) 2 ) 1 / 2 ( 1 ) where n represents the number of samplings of the signal waveform data.
摘要翻译：根据本发明的方法包括以下步骤：将涡流信号分离成X轴分量和Y轴分量，以获得各个分量的信号波形数据; 从这样获得的各个信号波形数据中分别排除预定的低频分量; 基于X轴分量和Y轴分量的信号波形数据的电压值X（i）和Y（i），计算由下式（1）定义的噪声电压值V1，其中低频组件已被排除; 并且通过将对应于预定人造缺陷的涡流信号的电压值D除以噪声电压值V1来计算S / N比：V ud 1 =＆pgr; / n·Σi = 1 n（X⁡（i）2 + Y⁡（i）2）1/2（1）其中n表示信号波形数据的采样次数。

28. 发明授权

US07816279B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07816279B2
公开(公告)日：2010-10-19
申请号：US12369297
申请日：2009-02-11
申请人： Michie Sunayama , Yoshiyuki Nakao , Noriyoshi Shimizu
发明人： Michie Sunayama , Yoshiyuki Nakao , Noriyoshi Shimizu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L23/53295 , H01L21/2855 , H01L21/76805 , H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , Y10S438/914 , H01L2924/00
摘要： A semiconductor device includes a first conductor disposed on a semiconductor substrate; an oxygen-containing insulation film disposed on the semiconductor substrate and on the first conductor, the insulation film having a contact hole which extends to the first conductor and a trench which is connected to an upper portion of the contact hole; a zirconium oxide film disposed on a side surface of the contact hole and a side surface and a bottom surface of the trench; a zirconium film disposed on the zirconium oxide film inside the contact hole and inside the trench; and a second conductor composed of Cu embedded into the contact hole and into the trench.
摘要翻译：半导体器件包括设置在半导体衬底上的第一导体; 设置在所述半导体衬底上和所述第一导体上的含氧绝缘膜，所述绝缘膜具有延伸到所述第一导体的接触孔和与所述接触孔的上部连接的沟槽; 设置在所述接触孔的侧表面上的氧化锆膜和所述沟槽的侧表面和底表面; 在所述接触孔内部和所述沟槽内部设置在所述氧化锆膜上的锆膜; 以及由嵌入接触孔并进入沟槽的Cu构成的第二导体。

29. 发明申请

US20100148767A1 Eddy Current Testing Method and Eddy Current Testing Apparatus 有权
标题翻译：涡流测试方法和涡流测试仪
公开(公告)号：US20100148767A1
公开(公告)日：2010-06-17
申请号：US12531840
申请日：2008-03-17
申请人： Shigetoshi Hyodo , Yoshiyuki Nakao
发明人： Shigetoshi Hyodo , Yoshiyuki Nakao
IPC分类号： G01N27/82
CPC分类号： G01N27/9013
摘要： It is an object of the present invention to provide an eddy current testing apparatus capable of accurately detecting any flaws occurring in a columnar or cylindrical subject to be tested regardless of their extending directions, with the use of the same probe coil.The eddy current testing apparatus 100 according to the present invention comprises a spinning plate 1 and a probe coil 2 disposed on the spinning plate 1. The probe coil is a probe coil capable of obtaining a differential output about a scanning direction of a detection signal which corresponds to a detected eddy current induced in the subject to be tested. The spinning plate is disposed in such a position that a spinning center RC of the spinning plate faces with an axial center PC of the subject to be tested. A distance R between the spinning center of the spinning plate and a center of the probe coil is set so that a difference between a maximum amplitude of a differential output at an axially extending artificial flaw provided in the subject to be tested and a maximum amplitude of a differential output at a circumferentially extending artificial flaw provided in the subject to be tested falls within a predetermined range.
摘要翻译：本发明的目的是提供一种涡流测试装置，其能够使用相同的探针线圈来精确地检测在被测试的柱状或圆柱体中发生的任何缺陷，而不管其延伸方向如何。根据本发明的涡流检测装置100包括设置在纺丝板1上的纺丝板1和探针线圈2.探针线圈是能够获得关于检测信号的扫描方向的差分输出的探针线圈，对应于在待测试对象中感测的检测到的涡流。纺丝板被设置在纺纱板的纺纱中心RC与待测试对象的轴心中心PC相对的位置。将纺丝板的纺纱中心与探针线圈的中心之间的距离R设定为使被测试对象物内轴向延伸的人造缺陷的差动输出的最大振幅与最大振幅在待测试对象中设置的周向延伸的人造缺陷的差分输出落在预定范围内。

30. 发明申请

US20090138222A1 S/N Ratio Measuring Method in Eddy Current Testing on Internal Surface of Pipe or Tube 有权
公开(公告)号：US20090138222A1
公开(公告)日：2009-05-28
申请号：US12084380
申请日：2006-10-27
申请人： Shoji Kinomura , Yoshiyuki Nakao , Toshiya Kodai , Shugo Nishiyama
发明人： Shoji Kinomura , Yoshiyuki Nakao , Toshiya Kodai , Shugo Nishiyama
IPC分类号： G01R29/26 , G01R23/16
CPC分类号： G01N27/9046
摘要： A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: V   1 = π / n · ∑ i = 1 n  ( X  ( i ) 2 + Y  ( i ) 2 ) 1 / 2 ( 1 ) where n represents the number of samplings of the signal waveform data.

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