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21. 发明申请

US20110237075A1 Method for Manufacturing Interconnect Structures Incorporating Air-Gap Spacers 审中-公开
标题翻译：制造连接结构的空气间隙隔离器的方法
公开(公告)号：US20110237075A1
公开(公告)日：2011-09-29
申请号：US13096757
申请日：2011-04-28
申请人： Satya V. Nitta , Shom Ponoth
发明人： Satya V. Nitta , Shom Ponoth
IPC分类号： H01L21/28 , B82Y99/00
CPC分类号： H01L21/76808 , H01L21/31144 , H01L21/7682 , H01L2221/1063
摘要： A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure.
摘要翻译：双镶嵌制品包括包含导电金属柱的沟槽，其中沟槽和导电金属柱向下延伸并且与通孔邻接。沟槽和导电金属柱和通孔具有共同的轴线。这些物品包括包含用于超大规模集成（VLSI）和超大规模集成（ULSI）设备和包装的金属/绝缘体结构的气隙间隔物的互连结构。在这方面的沟槽包括紧邻沟槽的侧壁和导电金属柱的侧壁气隙，侧壁气隙向下延伸到通孔，深度低于由沟槽的底部固定的线，以及在通孔中向下延伸距离线下方约1埃至通孔的整个深度。在另一方面，制品包括封盖的双镶嵌结构。

22. 发明授权

US08183694B2 Reversing tone of patterns on integrated circuit and nanoscale fabrication 有权
标题翻译：集成电路和纳米级制造中图案的反转色调
公开(公告)号：US08183694B2
公开(公告)日：2012-05-22
申请号：US13021774
申请日：2011-02-06
申请人： Lawrence A. Clevenger , Maxime Darnon , Anthony D. Lisi , Satya V. Nitta
发明人： Lawrence A. Clevenger , Maxime Darnon , Anthony D. Lisi , Satya V. Nitta
IPC分类号： H01L29/40
CPC分类号： H01L21/31144 , H01L21/7682
摘要： A process to produce an airgap on a substrate having a dielectric layer comprises defining lines by lithography where airgaps are required. The lines' dimensions are shrunk by a trimming process (isotropic etching). The tone of the patterns is reversed by applying a planarizing layer which is etched down to the top of the patterns. The photoresist is removed, leading to sub-lithographic trenches which are transferred into a cap layer and eventually into the dielectric between two metal lines. The exposed dielectric is eventually damaged, and is etched out, leading to airgaps between metal lines. The gap is sealed by the pinch-off occurring during the deposition of the subsequent dielectric.
摘要翻译：在具有电介质层的基板上产生气隙的方法包括通过需要气隙的光刻来定义线。线的尺寸通过修整工艺（各向同性蚀刻）收缩。图案的色调通过施加被向下蚀刻到图案的顶部的平坦化层来反转。去除光致抗蚀剂，导致亚光刻沟槽，其转移到盖层中，最终转移到两条金属线之间的电介质中。暴露的电介质最终被损坏，并被蚀刻掉，导致金属线之间的气隙。间隙通过在随后的电介质的沉积期间发生的夹断来密封。

23. 发明授权

US08034710B2 Bilayer metal capping layer for interconnect applications 失效
标题翻译：用于互连应用的双层金属覆盖层
公开(公告)号：US08034710B2
公开(公告)日：2011-10-11
申请号：US12901176
申请日：2010-10-08
申请人： Chih-Chao Yang , Satya V. Nitta
发明人： Chih-Chao Yang , Satya V. Nitta
IPC分类号： H01L21/4763
CPC分类号： H01L21/76849 , H01L21/76805 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a surface of the conductive feature embedded within a first dielectric material. Both the first and second metallic capping layers are located beneath an opening, e.g., a via opening, the is present within an overlying second dielectric material. The second metallic capping layer protects the first dielectric capping layer from being removed (either completely or partially) during subsequent processing steps. Interconnect structures including via gouging features as well as non-via gouging features are disclosed. The present invention provides methods of fabricating such semiconductor interconnect structures.
摘要翻译：本发明提供了具有改进的可靠性和技术可扩展性的半导体互连结构。在本发明中，第二金属覆盖层位于第一金属覆盖层的表面上，第一金属覆盖层又位于第一电介质材料中的导电特征的表面上。第一和第二金属覆盖层都位于开口下方，例如通孔开口处，存在于覆盖的第二介电材料内。第二金属覆盖层保护第一介电覆盖层在随后的处理步骤期间被去除（完全或部分地）。公开了包括通过气刨特征以及非通孔气刨功能的互连结构。本发明提供制造这种半导体互连结构的方法。

24. 发明申请

US20110024909A1 BILAYER METAL CAPPING LAYER FOR INTERCONNECT APPLICATIONS 失效
标题翻译：双层金属覆盖层用于互连应用
公开(公告)号：US20110024909A1
公开(公告)日：2011-02-03
申请号：US12901176
申请日：2010-10-08
申请人： Chih-Chao Yang , Satya V. Nitta
发明人： Chih-Chao Yang , Satya V. Nitta
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76849 , H01L21/76805 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a surface of the conductive feature embedded within a first dielectric material. Both the first and second metallic capping layers are located beneath an opening, e.g., a via opening, the is present within an overlying second dielectric material. The second metallic capping layer protects the first dielectric capping layer from being removed (either completely or partially) during subsequent processing steps. Interconnect structures including via gouging features as well as non-via gouging features are disclosed. The present invention provides methods of fabricating such semiconductor interconnect structures.
摘要翻译：本发明提供了具有改进的可靠性和技术可扩展性的半导体互连结构。在本发明中，第二金属覆盖层位于第一金属覆盖层的表面上，第一金属覆盖层又位于第一电介质材料中的导电特征的表面上。第一和第二金属覆盖层都位于开口下方，例如通孔开口处，存在于覆盖的第二介电材料内。第二金属覆盖层保护第一介电覆盖层在随后的处理步骤期间被去除（完全或部分地）。公开了包括通过气刨特征以及非通孔气刨功能的互连结构。本发明提供制造这种半导体互连结构的方法。

25. 发明授权

US07834457B2 Bilayer metal capping layer for interconnect applications 失效
标题翻译：用于互连应用的双层金属覆盖层
公开(公告)号：US07834457B2
公开(公告)日：2010-11-16
申请号：US12039280
申请日：2008-02-28
申请人： Chih-Chao Yang , Satya V. Nitta
发明人： Chih-Chao Yang , Satya V. Nitta
IPC分类号： H01L21/768
CPC分类号： H01L21/76849 , H01L21/76805 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a surface of the conductive feature embedded within a first dielectric material. Both the first and second metallic capping layers are located beneath an opening, e.g., a via opening, the is present within an overlying second dielectric material. The second metallic capping layer protects the first dielectric capping layer from being removed (either completely or partially) during subsequent processing steps. Interconnect structures including via gouging features as well as non-via gouging features are disclosed. The present invention provides methods of fabricating such semiconductor interconnect structures.
摘要翻译：本发明提供了具有改进的可靠性和技术可扩展性的半导体互连结构。在本发明中，第二金属覆盖层位于第一金属覆盖层的表面上，第一金属覆盖层又位于第一电介质材料中的导电特征的表面上。第一和第二金属覆盖层都位于开口下方，例如通孔开口处，存在于覆盖的第二介电材料内。第二金属覆盖层保护第一介电覆盖层在随后的处理步骤期间被去除（完全或部分地）。公开了包括通过气刨特征以及非通孔气刨功能的互连结构。本发明提供制造这种半导体互连结构的方法。

26. 发明授权

US09263391B2 Interconnect structures incorporating air-gap spacers 有权
公开(公告)号：US09263391B2
公开(公告)日：2016-02-16
申请号：US13089958
申请日：2011-04-19
申请人： Satya V. Nitta , Shom Ponoth
发明人： Satya V. Nitta , Shom Ponoth
IPC分类号： H01L23/52 , H01L23/532 , H01L23/48 , H01L23/522 , H01L21/768
CPC分类号： H01L21/76807 , H01L21/31111 , H01L21/76802 , H01L21/76808 , H01L21/7682 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76877 , H01L23/48 , H01L23/481 , H01L23/52 , H01L23/522 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1063 , H01L2924/0002 , H01L2924/00
摘要： A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure.

27. 发明申请

US20090218691A1 BILAYER METAL CAPPING LAYER FOR INTERCONNECT APPLICATIONS 失效
标题翻译：双层金属覆盖层用于互连应用
公开(公告)号：US20090218691A1
公开(公告)日：2009-09-03
申请号：US12039280
申请日：2008-02-28
申请人： Chih-Chao Yang , Satya V. Nitta
发明人： Chih-Chao Yang , Satya V. Nitta
IPC分类号： H01L21/768 , H01L23/538
CPC分类号： H01L21/76849 , H01L21/76805 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a surface of the conductive feature embedded within a first dielectric material. Both the first and second metallic capping layers are located beneath an opening, e.g., a via opening, the is present within an overlying second dielectric material. The second metallic capping layer protects the first dielectric capping layer from being removed (either completely or partially) during subsequent processing steps. Interconnect structures including via gouging features as well as non-via gouging features are disclosed. The present invention provides methods of fabricating such semiconductor interconnect structures.
摘要翻译：本发明提供了具有改进的可靠性和技术可扩展性的半导体互连结构。在本发明中，第二金属覆盖层位于第一金属覆盖层的表面上，第一金属覆盖层又位于第一电介质材料中的导电特征的表面上。第一和第二金属覆盖层都位于开口下方，例如通孔开口处，存在于覆盖的第二介电材料内。第二金属覆盖层保护第一介电覆盖层在随后的处理步骤期间被去除（完全或部分地）。公开了包括通过气刨特征以及非通孔气刨功能的互连结构。本发明提供制造这种半导体互连结构的方法。

28. 发明申请

US20090200668A1 INTERCONNECT STRUCTURE WITH HIGH LEAKAGE RESISTANCE 审中-公开
公开(公告)号：US20090200668A1
公开(公告)日：2009-08-13
申请号：US12027677
申请日：2008-02-07
申请人： Chih-Chao Yang , Satya V. Nitta
发明人： Chih-Chao Yang , Satya V. Nitta
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76834 , H01L21/76849 , H01L21/76877 , H01L21/76883 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure is provided in which the conductive feature (i.e., conductive material) is not coplanar with the upper surface of the dielectric material, but instead the conductive material is recessed below an upper surface of the dielectric material. In addition to being recessed below the upper surface of the dielectric material, the conductive material of the interconnect structure is surrounded on all sides (i.e., sidewall surfaces, upper surface and bottom surface) by a diffusion barrier material. Unlike prior art interconnect structures, the barrier material located on the upper surface of the recessed conductive material is located with an opening including the recessed conductive material.

29. 发明申请

US20090072409A1 Interconnect Structures Incorporating Air-Gap Spacers 审中-公开
标题翻译：互连结构包含气隙隔离器
公开(公告)号：US20090072409A1
公开(公告)日：2009-03-19
申请号：US11855211
申请日：2007-09-14
申请人： Satya V. Nitta , Shom Ponoth
发明人： Satya V. Nitta , Shom Ponoth
IPC分类号： H01L23/52
CPC分类号： H01L21/76807 , H01L21/31111 , H01L21/76802 , H01L21/76808 , H01L21/7682 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76877 , H01L23/48 , H01L23/481 , H01L23/52 , H01L23/522 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1063 , H01L2924/0002 , H01L2924/00
摘要： A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure.
摘要翻译：双镶嵌制品包括包含导电金属柱的沟槽，其中沟槽和导电金属柱向下延伸并且与通孔邻接。沟槽和导电金属柱和通孔具有共同的轴线。这些物品包括包含用于超大规模集成（VLSI）和超大规模集成（ULSI）设备和包装的金属/绝缘体结构的气隙间隔物的互连结构。在这方面的沟槽包括紧邻沟槽的侧壁和导电金属柱的侧壁气隙，侧壁气隙向下延伸到通孔，深度低于由沟槽的底部固定的线，以及在通孔中向下延伸距离线下方约1埃至通孔的整个深度。在另一方面，制品包括封盖的双镶嵌结构。

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