专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06798684B2 Methods and systems for programmable memory using silicided poly-silicon fuses 有权
标题翻译：使用硅化多晶硅保险丝的可编程存储器的方法和系统
公开(公告)号：US06798684B2
公开(公告)日：2004-09-28
申请号：US10355237
申请日：2003-01-31
申请人： Khim L. Low , Todd L. Brooks , Agnes Woo , Akira Ito
发明人： Khim L. Low , Todd L. Brooks , Agnes Woo , Akira Ito
IPC分类号： G11C1700
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： The present invention is directed to methods and systems for evaluating one-time programmable memory cells. A threshold current is applied to a resistive circuit, thereby generating a threshold voltage. A read current is applied to a first memory cell, thereby generating a memory cell voltage. The memory cell voltage is compared to the threshold voltage, thereby determining the state of the memory cell. In a further embodiment of the invention, a second threshold voltage is generated and compared the memory cell voltage, thereby verifying the state of the memory cell. The threshold current is optionally a substantial replica of said read current. The threshold current is optionally a proportional substantial replica of said read current. In an embodiment, the resistive circuit includes a second memory cell, which can be programmed or unprogrammed. The second memory cell is optionally arranged to average the memory cell resistance.
摘要翻译：本发明涉及用于评估一次性可编程存储器单元的方法和系统。阈值电流被施加到电阻电路，从而产生阈值电压。读取电流被施加到第一存储器单元，由此产生存储单元电压。将存储单元电压与阈值电压进行比较，从而确定存储单元的状态。在本发明的另一实施例中，产生第二阈值电压并比较存储单元电压，由此验证存储单元的状态。阈值电流可选地是所述读取电流的实质复制品。阈值电流可选地是所述读取电流的比例实质复制品。在一个实施例中，电阻电路包括可被编程或未编程的第二存储单元。可选地，第二存储单元布置成平均存储单元电阻。

22. 发明授权

US5936562A High-speed sigma-delta ADCs 失效
标题翻译：高速Σ-ΔADC
公开(公告)号：US5936562A
公开(公告)日：1999-08-10
申请号：US870429
申请日：1997-06-06
申请人： Todd L. Brooks , David Robertson
发明人： Todd L. Brooks , David Robertson
IPC分类号： H03M1/14 , H03M1/16 , H03M3/02 , H03M3/04
CPC分类号： H03M3/46 , H03M1/145
摘要： An ADC system includes a sigma-delta modulator that receives an analog input and provides a first digital output and an analog output. An ADC, coupled to the sigma-delta modulator, receives the analog output as an input and provides a second digital output. A digital processor, coupled to the sigma-delta modulator and the ADC, receives the first and second digital outputs and provides a digital representation of the analog input.
摘要翻译： ADC系统包括接收模拟输入并提供第一数字输出和模拟输出的Σ-Δ调制器。耦合到Σ-Δ调制器的ADC接收模拟输出作为输入并提供第二数字输出。耦合到Σ-Δ调制器和ADC的数字处理器接收第一和第二数字输出并提供模拟输入的数字表示。

23. 发明授权

US5220288A Continuous-time differential amplifier with low offset voltage 失效
标题翻译：具有低失调电压的连续时差分放大器
公开(公告)号：US5220288A
公开(公告)日：1993-06-15
申请号：US891018
申请日：1992-06-01
申请人： Todd L. Brooks
发明人： Todd L. Brooks
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F2203/45508 , H03F2203/45658
摘要： A continuous-time differential amplifier (52, 100) preserves fast settling time while reducing a relatively-high offset voltage-normally associated with a continuous-time differential amplifier using MOS load transistors. The differential amplifier (52, 100) includes a first transistor (81) biased as a current source to provide current into emitters of second (82) and third (83) emitter-coupled input transistors. Fourth (84) and fifth (85) load transistors are respectively coupled between collectors of the second (82) and third (83) input transistors and a power supply voltage terminal. An amplifier (70) having a positive input terminal coupled to the collector of the second input transistor (82) and a negative input terminal receiving a bias voltage biases the control electrodes of the load transistors (84, 85). The amplifier (70) increases the effective transconductance of the load transistors (84, 85) to allow larger control electrode areas, which reduces the effect of transistor mismatch.
摘要翻译：连续时间差分放大器（52,100）保持快速建立时间，同时减少通常与使用MOS负载晶体管的连续时间差分放大器相关联的相对高的偏移电压。差分放大器（52,100）包括被偏置为电流源的第一晶体管（81），以向第二发光二极管（82）和第三发射极耦合输入晶体管（83）的发射极提供电流。第四（84）和第五（85）负载晶体管分别耦合在第二（82）和第三（83）输入晶体管的集电极和电源电压端子之间。具有耦合到第二输入晶体管（82）的集电极的正输入端的放大器（70）和接收偏压的负输入端偏置负载晶体管（84,85）的控制电极。放大器（70）增加负载晶体管（84,85）的有效跨导，以允许更大的控制电极面积，这降低了晶体管失配的影响。

24. 发明申请

US20110200048A1 Modem with Voice Processing Capability 失效
标题翻译：具有语音处理能力的调制解调器
公开(公告)号：US20110200048A1
公开(公告)日：2011-08-18
申请号：US13092255
申请日：2011-04-22
申请人： James C. Thi , Theodore F. Rabenko , David Hartman , Robert M. Lukas , Kenneth J. Unger , Ramin Borazjani , Shane P. Lansing , Robert J. Lee , Todd L. Brooks , Kevin L. Miller
发明人： James C. Thi , Theodore F. Rabenko , David Hartman , Robert M. Lukas , Kenneth J. Unger , Ramin Borazjani , Shane P. Lansing , Robert J. Lee , Todd L. Brooks , Kevin L. Miller
IPC分类号： G10L21/02 , H04L12/56
CPC分类号： H04M7/0087 , H04B3/23 , H04B3/234 , H04J3/0632 , H04J3/0638 , H04L12/2801 , H04L12/2834 , H04L12/5692 , H04L12/66 , H04L29/06027 , H04L65/1069 , H04M7/006 , H04M7/125 , H04N7/10 , H04N21/2383 , H04N21/4382
摘要： A system is configured to facilitate bidirectional voice communication between a number of data and/or telephony devices.
摘要翻译：系统被配置为促进多个数据和/或电话设备之间的双向语音通信。

25. 发明授权

US06727729B2 Linear buffer 有权
标题翻译：线性缓冲区
公开(公告)号：US06727729B2
公开(公告)日：2004-04-27
申请号：US09949662
申请日：2001-09-12
申请人： Todd L. Brooks , Anilkumar V. Tammineedi
发明人： Todd L. Brooks , Anilkumar V. Tammineedi
IPC分类号： H03K190175
CPC分类号： H03F1/3205 , H03F3/005 , H03F3/45475 , H03F3/505 , H03F2200/168 , H03F2200/331 , H03F2200/417 , H03F2200/453 , H03F2203/45101 , H03F2203/5031
摘要： A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.
摘要翻译：基于源极跟随器晶体管的缓冲器提供高线性度。复制晶体管用于产生基本上等于缓冲器的输出电压的复制电压。复制电压由电平移位电路电平移位并施加在源极跟随器晶体管的漏极处，以提高缓冲器的线性。缓冲器可以与开关电容器采样电路结合使用。可以使用阻尼电路来减少由于取样引起的充电毛刺。阻尼电路可以是低通滤波器。缓冲器可以用在从输入信号产生输出信号并控制输出信号电平的接口电路中。

26. 发明授权

US06577261B2 Method and apparatus for mismatched shaping of an oversampled converter 有权
公开(公告)号：US06577261B2
公开(公告)日：2003-06-10
申请号：US09949815
申请日：2001-09-12
申请人： Todd L. Brooks , David S. P. Ho , Kevin L. Miller , Eric Fogleman
发明人： Todd L. Brooks , David S. P. Ho , Kevin L. Miller , Eric Fogleman
IPC分类号： H03M166
CPC分类号： H03M1/067 , H03M1/74 , H03M1/742 , H03M3/464 , H03M3/502
摘要： Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, a range signal is produced based on the digital input code. The range signal specifies which one of a plurality of ranges the digital input code is within. A density code is also produced, preferably, using a shuffling algorithm. The density code specifies a level within the range expressed by the range signal. The range signal and the density code are then combined to produce a plurality of sub-codes, a sum of the plurality of sub-codes equaling the digital input code.

27. 发明授权

US5909131A Low-distortion technique to bandlimit a switched-capacitor sampling circuit 失效
标题翻译：低失真技术来限幅开关电容采样电路
公开(公告)号：US5909131A
公开(公告)日：1999-06-01
申请号：US695823
申请日：1996-07-31
申请人： Lawrence A. Singer , Todd L. Brooks
发明人： Lawrence A. Singer , Todd L. Brooks
IPC分类号： G11C27/02
CPC分类号： G11C27/024
摘要： In a switched-capacitor input sampling structure, a resistor connected in series with the input structure, but after the output of the input switch limits the noise bandwidth of the input structure. The selected placement of the resistor does not appreciably limit the slewing or settling time of downstream circuit elements, resulting in a low noise bandwidth, high speed system.
摘要翻译：在开关电容输入采样结构中，与输入结构串联的电阻器，但输入开关输出端限制输入结构的噪声带宽。所选择的电阻放置不会明显限制下游电路元件的回转或稳定时间，导致低噪声带宽，高速系统。

28. 发明授权

US5847600A Multi-stage high-gain high-speed amplifier 失效
标题翻译：多级高增益高速放大器
公开(公告)号：US5847600A
公开(公告)日：1998-12-08
申请号：US638287
申请日：1996-04-26
申请人： Todd L. Brooks , Lawrence Singer
发明人： Todd L. Brooks , Lawrence Singer
IPC分类号： H03F3/00 , H03F3/45 , H03F3/72
CPC分类号： H03F3/4521 , H03F3/005 , H03F3/45188 , H03F3/45242 , H03F3/72 , H03F2203/45356 , H03F2203/45644 , H03F2203/45651 , H03F2203/45682
摘要： A two-stage switched-capacitor residue amplifier having novel circuitry in the first and second stages provides fast and accurate settling while configured with a large closed-loop gain, and also provides low power consumption while powered from a five volt supply. The invention is particularly well suited for use in a multi-stage, pipe-lined analog-to-digital converter (ADC) that converts multiple bits in the first pipeline stage. Complementary PMOS and NMOS differential pairs are used in the first and/or second stage to increase the current slew capability of the amplifier. Current mirror gain and/or positive feedback is used in the second stage to increase transonductance and bandwidth. Cascode transistors are used in the output of the first and/or second stages and active cascode gain enhancement is used in the first stage to increase dc gain and accuracy. The common mode level at the output of the second stage is controlled by injecting a pair of control currents (representative of the difference between a common-mode level actually at the output of the second stage and a desired common mode level) into a pair of mirror input nodes in the second stage. The common mode level of the first stage is controlled from a common node of a differential pair of the second stage. The two-stage amplifier of the invention provides a gain bandwidth product of 800 MHz, a closed-loop bandwidth of 50 MHz, a dc gain 90 dB, and a power consumption 80 mW.
摘要翻译：在第一和第二阶段具有新颖电路的两级开关电容器残余放大器提供快速和准确的稳定，同时配置有大的闭环增益，并且在由五伏电源供电时也提供低功耗。本发明特别适用于在第一流水线级中转换多个比特的多级管线模数转换器（ADC）。互补PMOS和NMOS差分对用于第一和/或第二级以增加放大器的电流转换能力。在第二阶段使用电流镜增益和/或正反馈来增加电导率和带宽。串级晶体管用于第一级和/或第二级的输出，并且在第一级中使用有源共源共轭增益增强以增加直流增益和精度。第二级输出端的共模电平通过将一对控制电流（代表第二级输出端的共模电平与期望的共模电平之间的差）代入一对第二阶段的镜像输入节点。第一级的共模级由第二级的差分对的公共节点控制。本发明的两级放大器提供800MHz的增益带宽乘积，50MHz的闭环带宽，直流增益90dB，功耗80mW。

29. 发明授权

US5789981A High-gain operational transconductance amplifier offering improved bandwidth 失效
标题翻译：高增益运算跨导放大器提供更高的带宽
公开(公告)号：US5789981A
公开(公告)日：1998-08-04
申请号：US638195
申请日：1996-04-26
申请人： Lawrence Singer , Todd L. Brooks
发明人： Lawrence Singer , Todd L. Brooks
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/3001 , H03F2203/30096 , H03F2203/30129
摘要： A high-gain, low-power transconductance amplifier suitable for use in switched-capacitor circuits provides improved accuracy and high-speed operation. The transconductance amplifier includes an input circuit that receives an input voltage. A current mirror circuit is coupled to the input circuit. At least one active cascode circuit, coupled to the current mirror circuit, receives current from the current mirror circuit and provides an output current. The active cascode circuit provides gain enhancement to the transconductance amplifier by increasing the output impedance of the transconductance amplifier.
摘要翻译：适用于开关电容电路的高增益，低功耗跨导放大器提供更高的精度和高速运行。跨导放大器包括接收输入电压的输入电路。电流镜电路耦合到输入电路。耦合到电流镜电路的至少一个有源共源共栅电路从电流镜电路接收电流并提供输出电流。有源共源共栅电路通过增加跨导放大器的输出阻抗来为跨导放大器提供增益增益。

30. 发明授权

US5359296A Self-biased cascode current mirror having high voltage swing and low power consumption 失效
标题翻译：具有高电压摆幅和低功耗的自偏置共源共栅电流镜
公开(公告)号：US5359296A
公开(公告)日：1994-10-25
申请号：US119940
申请日：1993-09-10
申请人： Todd L. Brooks , Mathew A. Rybicki
发明人： Todd L. Brooks , Mathew A. Rybicki
IPC分类号： G05F3/26 , H03F3/343 , H03F3/345 , H03F3/16
CPC分类号： H03F3/345 , G05F3/26
摘要： A self-biased cascode current mirror includes a current mirror (60), and a cascode bias generator (50). The cascode bias generator (50) includes a resistor (51) to provide a bias voltage for the current mirror (60). The current mirror (60) includes cascode transistor (64) and two mirror transistors (62, 63). The bias voltage is approximately equal to a minimum saturation voltage of the cascode transistor (64) plus a gate-source voltage of the transistor (63) of the current mirror (60). The self-biased cascode current mirror (60) has a high output impedance and high voltage swing while providing low power consumption and requiring a small layout area.
摘要翻译：自偏置共源共栅电流镜包括电流镜（60）和共源共栅偏压发生器（50）。共射共栅偏压发生器（50）包括用于为电流镜（60）提供偏置电压的电阻（51）。电流镜（60）包括共源共栅晶体管（64）和两个反射镜晶体管（62,63）。偏置电压近似等于共源共栅晶体管（64）的最小饱和电压加上电流镜（60）的晶体管（63）的栅极 - 源极电压。自偏置共源共栅电流镜（60）具有高输出阻抗和高电压摆幅，同时提供低功耗并且需要较小的布局面积。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式