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21. 发明授权

US06392922B1 Passivated magneto-resistive bit structure and passivation method therefor 有权
标题翻译：钝化磁阻位结构及其钝化方法
公开(公告)号：US06392922B1
公开(公告)日：2002-05-21
申请号：US09638419
申请日：2000-08-14
申请人： Harry Liu , Lonny Berg , William L. Larson , Shaoping Li , Theodore Zhu , Joel Drewes
发明人： Harry Liu , Lonny Berg , William L. Larson , Shaoping Li , Theodore Zhu , Joel Drewes
IPC分类号： H01L2982
CPC分类号： H01L27/222 , B82Y10/00 , G11C11/15 , H01L43/08 , H01L43/12
摘要： A passivated magneto-resistive bit structure is disclosed in which surfaces subject to oxidation or corrosion are protected. In one embodiment a bit structure is encapsulated by means of an etch stop barrier material. In another embodiment an etch stop barrier material protects the top of a bit structure and dielectric spacers protect the side walls.
摘要翻译：公开了钝化的磁阻钻头结构，其中受到氧化或腐蚀的表面被保护。在一个实施例中，位结构通过蚀刻停止阻挡材料被封装。在另一个实施例中，蚀刻停止阻挡材料保护位结构的顶部并且电介质间隔件保护侧壁。

22. 发明授权

US07029923B2 Method for manufacture of magneto-resistive bit structure 有权
标题翻译：磁阻位结构的制造方法
公开(公告)号：US07029923B2
公开(公告)日：2006-04-18
申请号：US10734663
申请日：2003-12-11
申请人： Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
发明人： Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , G11C11/15 , H01L43/08
摘要： A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
摘要翻译：公开了一种用于磁阻存储器的磁头结构，其具有足够大的位端以适应最小尺寸的接触或通孔。通过提供这种布置，可以使用常规的接触和/或通孔处理步骤来制造磁头结构。因此，可以降低制造装置的成本，并且可以提高总体可实现的产量。

23. 发明授权

US06992918B2 Methods of increasing write selectivity in an MRAM 有权
公开(公告)号：US06992918B2
公开(公告)日：2006-01-31
申请号：US10614709
申请日：2003-07-07
申请人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
发明人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/15 , H01L27/222
摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

24. 发明授权

US06806546B2 Passivated magneto-resistive bit structure 有权
公开(公告)号：US06806546B2
公开(公告)日：2004-10-19
申请号：US10078234
申请日：2002-02-14
申请人： Harry Liu , Lonny Berg , William L Larson , Shaoping Li , Theodore Zhu , Joel Drewes
发明人： Harry Liu , Lonny Berg , William L Larson , Shaoping Li , Theodore Zhu , Joel Drewes
IPC分类号： H01L4300
CPC分类号： H01L27/222 , B82Y10/00 , G11C11/15 , H01L43/08 , H01L43/12
摘要： A passivated magneto-resistive bit structure is disclosed in which surfaces subjects to oxidation or corrosion are protected. In one embodiment, a bit structure is encapsulated by means of an etch stop barrier material. In another embodiment an etch stop barrier material protects the top of a bit structure and dielectric spacers protect the side walls.

25. 发明授权

US06424564B1 MRAM architectures for increased write selectivity 有权
公开(公告)号：US06424564B1
公开(公告)日：2002-07-23
申请号：US09964217
申请日：2001-09-26
申请人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
发明人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
IPC分类号： G11C1100
摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

26. 发明授权

US06424561B1 MRAM architecture using offset bits for increased write selectivity 有权
标题翻译： MRAM架构使用偏移位来增加写选择性
公开(公告)号：US06424561B1
公开(公告)日：2002-07-23
申请号：US09618504
申请日：2000-07-18
申请人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
发明人： Shaoping Li , Theodore Zhu , Anthony S. Arrott , Harry Liu , William L. Larson , Yong Lu
IPC分类号： G11C1100
CPC分类号： G11C11/16 , G11C11/15 , H01L27/222
摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.
摘要翻译：公开了在不显着降低存储器的封装密度的情况下产生增加的写入裕度和写入选择性的MRAM架构。磁阻位的主轴相对于数字线的轴线偏移，以从沿着磁阻位的长轴延伸的数字线电流产生磁场分量。

27. 发明授权

US07948045B2 Magnet-assisted transistor devices 有权
标题翻译：磁铁辅助晶体管器件
公开(公告)号：US07948045B2
公开(公告)日：2011-05-24
申请号：US12193065
申请日：2008-08-18
申请人： Yang Li , Insik Jin , Harry Liu , Song S. Xue , Shuiyuan Huang , Michael X. Tang
发明人： Yang Li , Insik Jin , Harry Liu , Song S. Xue , Shuiyuan Huang , Michael X. Tang
IPC分类号： H01L29/82 , H01L21/00 , H01L21/336
CPC分类号： H01L29/7881 , H01L27/11521 , H01L29/66825
摘要： A transistor device includes a magnetic field source adapted to deflect a flow of free electron carriers within a channel of the device, between a source region and a drain region thereof. According to preferred configurations, the magnetic field source includes a magnetic material layer extending over a side of the channel that is opposite a gate electrode of the transistor device.
摘要翻译：晶体管器件包括适于在器件的沟道内的源极区域和漏极区域之间偏转自由电子载流子的磁场源。根据优选的构造，磁场源包括在与晶体管器件的栅极相对的沟道侧延伸的磁性材料层。

28. 发明申请

US20100038735A1 MAGNET-ASSISTED TRANSISTOR DEVICES 有权
标题翻译：磁铁辅助晶体管器件
公开(公告)号：US20100038735A1
公开(公告)日：2010-02-18
申请号：US12193065
申请日：2008-08-18
申请人： Yang Li , Insik Jin , Harry Liu , Song S. Xue , Shuiyuan Huang , Michael X. Tang
发明人： Yang Li , Insik Jin , Harry Liu , Song S. Xue , Shuiyuan Huang , Michael X. Tang
IPC分类号： H01L29/82 , H01L21/00
CPC分类号： H01L29/7881 , H01L27/11521 , H01L29/66825
摘要： A transistor device includes a magnetic field source adapted to deflect a flow of free electron carriers within a channel of the device, between a source region and a drain region thereof. According to preferred configurations, the magnetic field source includes a magnetic material layer extending over a side of the channel that is opposite a gate electrode of the transistor device.
摘要翻译：晶体管器件包括适于在器件的沟道内的源极区域和漏极区域之间偏转自由电子载流子的磁场源。根据优选的构造，磁场源包括在与晶体管器件的栅极相对的沟道侧延伸的磁性材料层。

29. 发明申请

US20090316462A1 MAGNETIC TRACKS WITH DOMAIN WALL STORAGE ANCHORS 有权
标题翻译：磁性轨迹与域墙存储锚
公开(公告)号：US20090316462A1
公开(公告)日：2009-12-24
申请号：US12144705
申请日：2008-06-24
申请人： Haiwen Xi , Xiaobin Wang , Dimitar V. Dimitrov , Paul E. Anderson , Harry Liu , Song S. Xue , Andreas Roelofs , Markus Siegert
发明人： Haiwen Xi , Xiaobin Wang , Dimitar V. Dimitrov , Paul E. Anderson , Harry Liu , Song S. Xue , Andreas Roelofs , Markus Siegert
IPC分类号： G11C19/08
CPC分类号： G11C19/0808 , G11C11/14 , Y10S977/933
摘要： Magnetic shift registers in which data writing and reading is accomplished by moving the magnetic domain walls by electric current. Various embodiments of domain wall nodes or anchors that stabilize a domain wall are provided. In some embodiments, the wall anchors are elements separate from the magnetic track. In other embodiments, the wall anchors are disturbances in the physical configuration of the magnetic track. In still other embodiments, the wall anchors are disturbances in the material of the magnetic track.
摘要翻译：磁性移位寄存器，其中通过电流移动磁畴壁来实现数据写入和读取。提供了稳定域壁的畴壁节点或锚的各种实施例。在一些实施例中，壁锚是与磁迹分离的元件。在其他实施例中，壁锚是磁轨的物理构型的扰动。在另外的其它实施例中，壁锚是磁迹材料中的干扰。

30. 发明授权

US07233518B2 Radiation-hardened SRAM cell with write error protection 有权
标题翻译：具有写入错误保护的辐射硬化SRAM单元
公开(公告)号：US07233518B2
公开(公告)日：2007-06-19
申请号：US11051916
申请日：2005-02-04
申请人： Harry Liu
发明人： Harry Liu
IPC分类号： G11C11/00
CPC分类号： G11C11/4125
摘要： A method and system is disclosed for preventing write errors in a Single Event Upset (SEU) hardened static random access memory (SRAM) cell. A compensating element has been connected to a feedback path of the SRAM cell. The compensating element operates to cancel out capacitive coupling generated in an active delay element of the SRAM cell. If the compensating element sufficiently cancels the effects of the capacitive coupling, a write error will not occur in the SRAM cell. The compensating element also occupies a smaller silicon area than other proposed solutions.
摘要翻译：公开了一种用于防止单事件颠覆（SEU）硬化静态随机存取存储器（SRAM）单元中的写入错误的方法和系统。补偿元件已经连接到SRAM单元的反馈路径。补偿元件用于抵消在SRAM单元的有源延迟元件中产生的电容耦合。如果补偿元件充分抵消了电容耦合的影响，则在SRAM单元中不会发生写入错误。补偿元件的硅面积也比其他提出的解决方案要小。

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