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21. 发明授权

US07552043B2 Method, system and program product for selectively removing instrumentation logic from a simulation model 失效
标题翻译：用于从仿真模型中选择性地移除仪表逻辑的方法，系统和程序产品
公开(公告)号：US07552043B2
公开(公告)日：2009-06-23
申请号：US11226969
申请日：2005-09-15
申请人： Gabor Bobok , Wolfgang Roesner , Matyas A. Sustik , Derek E. Williams
发明人： Gabor Bobok , Wolfgang Roesner , Matyas A. Sustik , Derek E. Williams
IPC分类号： G06F17/50 , G06F9/45 , G06F9/455 , G06G7/62
CPC分类号： G06F17/5022
摘要： According to a method of simulation processing, a simulation model is received that includes a plurality of design entity instances modeling a digital system and one or more instrumentation entity instances, separate from the plurality of design entity instances, that generate instances of instrumentation events for testing purposes during simulation. In response to receiving an exclusion list identifying at least one instance of one or more instrumentation events to be removed from the simulation model, at least one instance of the one or more instrumentation events and associated logic elements are removed from the one or more instrumentation entity instances of the simulation model prior to simulation, such that a more compact simulation model is obtained.
摘要翻译：根据模拟处理的方法，接收模拟模型，其包括建立数字系统的多个设计实体实例和与多个设计实体实例分开的一个或多个仪表实体实例，其生成用于测试的仪表事件的实例模拟过程中的目的。响应于接收到排除列表，其识别要从仿真模型中移除的一个或多个仪器事件的至少一个实例，所述一个或多个检测事件和相关逻辑元件的至少一个实例从所述一个或多个检测实体中移除在模拟之前的仿真模型的实例，使得获得更紧凑的模拟模型。

22. 发明申请

US20120192133A1 LOGIC DESIGN VERIFICATION TECHNIQUES FOR LIVENESS CHECKING WITH RETIMING 有权
标题翻译：用于生活垃圾检查的LOGIC设计验证技术
公开(公告)号：US20120192133A1
公开(公告)日：2012-07-26
申请号：US13436196
申请日：2012-03-30
申请人： Jason R. Baumgartner , Gabor Bobok , Paul Joseph Roessler , Mark Allen Williams
发明人： Jason R. Baumgartner , Gabor Bobok , Paul Joseph Roessler , Mark Allen Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F17/504 , G06F2217/84
摘要： A technique for verification of a retimed logic design using liveness checking includes assigning a liveness gate to a liveness property for an original netlist and assigning a fairness gate to a fairness constraint for the original netlist. In this case, the fairness gate is associated with the liveness gate and is asserted for at least one time-step during any valid behavioral loop associated with the liveness gate. The original netlist is retimed, using a retiming engine, to provide a retimed netlist. The liveness and fairness gates of the retimed netlist are retimed such that a lag of the fairness gate is no greater than a lag of the liveness gate. Verification analysis is then performed on the retimed netlist. Finally, when the verification analysis yields a valid counter-example trace for the retimed netlist, a liveness violation for the original netlist is returned.
摘要翻译：用于使用活动检查验证重新定时逻辑设计的技术包括将活跃门分配给原始网表的活动属性，并将公平门分配给原始网表的公平约束。在这种情况下，公平门与活跃门相关联，并且在与活跃门相关联的任何有效行为循环期间被断言至少一个时间步长。使用重新定时引擎重新计算原始网表，以提供重新定时的网表。重新定义的网表的活跃和公平的门被重新定位，使得公平门的滞后不大于活跃门的滞后。然后在重新定时的网表上进行验证分析。最后，当验证分析为重新定时的网表产生有效的对照示例时，返回原始网表的活动违反。

23. 发明授权

US07711537B2 Signals for simulation result viewing 失效
标题翻译：用于模拟结果查看的信号
公开(公告)号：US07711537B2
公开(公告)日：2010-05-04
申请号：US11381437
申请日：2006-05-03
申请人： Gabor Bobok , Wolfgang Roesner , Derek E. Williams
发明人： Gabor Bobok , Wolfgang Roesner , Derek E. Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： According to a method of data processing, a data set including at least one entry specifying a signal group by a predetermined signal group name is received by a data processing system. In response to receipt of the data set, the entry in the data set is processed to identify the signal group name. Signal group information associated with an event trace file containing simulation results is accessed to determine signal names of multiple signals that are members of the signal group. Simulation results from the event trace file that are associated with instances of the multiple signals are then included within a presentation of simulation results.
摘要翻译：根据数据处理的方法，由数据处理系统接收包括由预定信号组名称指定信号组的至少一个条目的数据集。响应于数据集的接收，处理数据集中的条目以识别信号组名称。与包含模拟结果的事件跟踪文件相关联的信号组信息被访问以确定作为信号组成员的多个信号的信号名称。然后将与多个信号的实例相关联的事件跟踪文件的仿真结果包含在仿真结果的呈现中。

24. 发明授权

US07617085B2 Program product supporting specification of signals for simulation result viewing 失效
标题翻译：程序产品支持模拟结果查看信号的规范
公开(公告)号：US07617085B2
公开(公告)日：2009-11-10
申请号：US12129813
申请日：2008-05-30
申请人： Gabor Bobok , Wolfgang Roesner , Derek E. Williams
发明人： Gabor Bobok , Wolfgang Roesner , Derek E. Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： According to a method of data processing, a data set including at least one entry specifying a signal group by a predetermined signal group name is received by a data processing system. In response to receipt of the data set, the entry in the data set is processed to identify the signal group name. Signal group information associated with an event trace file containing simulation results is accessed to determine signal names of multiple signals that are members of the signal group. Simulation results from the event trace file that are associated with instances of the multiple signals are then included within a presentation of simulation results.
摘要翻译：根据数据处理的方法，由数据处理系统接收包括由预定信号组名称指定信号组的至少一个条目的数据集。响应于数据集的接收，处理数据集中的条目以识别信号组名称。与包含模拟结果的事件跟踪文件相关联的信号组信息被访问以确定作为信号组成员的多个信号的信号名称。然后将与多个信号的实例相关联的事件跟踪文件的仿真结果包含在仿真结果的呈现中。

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