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21. 发明授权

US07017095B2 Functional pattern logic diagnostic method 失效
标题翻译：功能模式逻辑诊断方法
公开(公告)号：US07017095B2
公开(公告)日：2006-03-21
申请号：US10064398
申请日：2002-07-10
申请人： Donato Forlenza , Franco Motika , Phillip J. Nigh
发明人： Donato Forlenza , Franco Motika , Phillip J. Nigh
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/318586 , G01R31/318544
摘要： A method of diagnosing semiconductor device functional testing failures by combining deterministic and functional testing to create a new test pattern based on the functional failure by determining the location of and type of error in the failing circuit. This is accomplished by identifying the failing vector during the functional test, observing the states of the failed device by unloading the values of the latches from the LSSD scan chain before the failing vector, generating a LOAD from the unloaded states of the latches, applying the generated LOAD as the first event of a newly created independent LSSD deterministic pattern, applying the primary inputs and Clocks that produced the failure to a correctly operating device, unloading the output of the correctly operating device to generate a deterministic LSSD pattern; and applying the generated deterministic LSSD pattern to the failing device to diagnose the failure using existing LSSD deterministic tools.
摘要翻译：通过组合确定性和功能测试，通过确定故障电路中的错误的位置和类型，基于功能故障来创建新的测试模式来诊断半导体器件功能测试故障的方法。这是通过在功能测试期间识别故障向量来实现的，通过在故障向量之前从LSSD扫描链中卸载锁存器的值来观察故障设备的状态，从锁存器的未加载状态生成LOAD，应用生成LOAD作为新创建的独立LSSD确定性模式的第一个事件，将产生故障的主输入和时钟应用于正确操作的设备，卸载正确操作设备的输出以生成确定性LSSD模式; 以及将生成的确定性LSSD模式应用于故障设备，以使用现有的LSSD确定性工具来诊断故障。

22. 发明授权

US07007380B2 TFI probe I/O wrap test method 失效
标题翻译： TFI探针I / O包装测试方法
公开(公告)号：US07007380B2
公开(公告)日：2006-03-07
申请号：US10707926
申请日：2004-01-26
申请人： Gobinda Das , Franco Motika
发明人： Gobinda Das , Franco Motika
IPC分类号： H01K3/10
CPC分类号： H01L22/34 , G01R31/318536 , G01R31/318558 , G01R31/318563 , G01R31/318572 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165 , Y10T29/49764
摘要： A method for testing external connections to semiconductor devices. The method includes providing an external electrical path between selected external connections on the semiconductor devices.
摘要翻译：一种用于测试与半导体器件的外部连接的方法。该方法包括在半导体器件上的选定外部连接之间提供外部电路径。

23. 发明授权

US06967556B2 High power space transformer 失效
标题翻译：大功率空间变压器
公开(公告)号：US06967556B2
公开(公告)日：2005-11-22
申请号：US10604185
申请日：2003-06-30
申请人： Paul M. Gaschke , Franco Motika
发明人： Paul M. Gaschke , Franco Motika
IPC分类号： G01R1/073 , H01F5/00
CPC分类号： G01R1/07378
摘要： A space transformer for use in an integrated circuit wafer test system, the space transformer including: a ground conductor; a power conductor; and one or more decoupling capacitors physically located between the ground conductor and the power conductor and electrically connected between a bottom surface of the ground conductor and a top surface of the power conductor.
摘要翻译：一种用于集成电路晶片测试系统的空间变压器，所述空间变压器包括：接地导体; 电导体以及物理上位于接地导体和电源导体之间并电连接在接地导体的底表面和电源导体的顶表面之间的一个或多个去耦电容器。

24. 发明申请

US20050183022A1 System, method and program product for control of a presentation 审中-公开
标题翻译：用于控制演示的系统，方法和程序产品
公开(公告)号：US20050183022A1
公开(公告)日：2005-08-18
申请号：US10777961
申请日：2004-02-12
申请人： Edward Kelley , Franco Motika , Tijs Wilbrink
发明人： Edward Kelley , Franco Motika , Tijs Wilbrink
IPC分类号： G06F3/00 , G06F17/24
CPC分类号： G06F17/241
摘要： A system, method and program product for making a presentation of screens to one or more invitees. A preliminary sequence of screens is defined to a computer. Before presenting one of the screens in the sequence to the one or more invitees, the computer presents to a presenter the one screen. Subsequently, the presenter decides whether to present the one screen to the one or more invitees and conveys the decision about the one screen to the computer. If the presenter decides to present the one screen to the one or more invitees, then the computer sends the one screen to a display device for each of the one or more invitees. If the presenter decides not to present the one screen to the one or more invitees, then the computer does not send the one screen to the display devices for the one or more invitees whereby the one or more invitees will not see the one screen. The one screen is presented to the presenter on a computer local to the presenter, one of the display devices is a projector local and coupled to the presenter's computer and another of the display devices is a computer remote from but coupled to the local computer. The foregoing process is then repeated for the next screen in the sequence.
摘要翻译：一种用于向一个或多个被邀请者呈现屏幕的系统，方法和程序产品。屏幕的初步序列被定义到计算机。在将序列中的一个屏幕呈现给一个或多个被邀请者之前，计算机向演示者呈现一个屏幕。随后，演示者决定是否向一个或多个受邀者呈现一个屏幕，并将关于一个屏幕的决定传达给计算机。如果演示者决定将一个屏幕呈现给一个或多个受邀者，则计算机将一个屏幕发送到一个或多个受邀者中的每一个的显示设备。如果演示者决定不向一个或多个受邀者呈现一个屏幕，则计算机不会向一个或多个受邀者的显示设备发送一个屏幕，从而一个或多个受邀者将不会看到一个屏幕。一个屏幕在呈现者本地的计算机上呈现给演示者，其中一个显示设备是本地的投影仪并且耦合到演示者的计算机，而另一个显示设备是远离但耦合到本地计算机的计算机。然后对序列中的下一个屏幕重复上述过程。

25. 发明授权

US06308290B1 Look ahead scan chain diagnostic method 失效
标题翻译：展望扫描链诊断方法
公开(公告)号：US06308290B1
公开(公告)日：2001-10-23
申请号：US09315461
申请日：1999-05-20
申请人： Orazio P. Forlenza , Mary P. Kusko , Franco Motika
发明人： Orazio P. Forlenza , Mary P. Kusko , Franco Motika
IPC分类号： G06F1100
CPC分类号： G01R31/31853 , G11C19/00 , G11C29/32
摘要： Look ahead testing process diagnoses broken or stuck-at scan chains to a failing shift register latch for improving the final manufacturing process and suggesting potentials for design change prior to manufacturing in order to improve yield levels. Post test data collection, analysis, and diagnosis can be eliminated.
摘要翻译：展望未来，测试过程可以将扫描链中的断开或卡入到失败的移位寄存器锁存器中，以改进最终的制造过程，并提出在制造之前设计更改的潜力，以提高产量水平。可以消除测试后数据的收集，分析和诊断。

26. 发明授权

US06205454B1 Web browser row control 失效
标题翻译： Web浏览器行控制
公开(公告)号：US06205454B1
公开(公告)日：2001-03-20
申请号：US08879717
申请日：1997-06-20
申请人： Norman J. Dauerer , Edward E. Kelley , Franco Motika
发明人： Norman J. Dauerer , Edward E. Kelley , Franco Motika
IPC分类号： G06F1721
CPC分类号： G06F17/30905
摘要： The present invention is a process for visually organizing multiple information and headings on a computer screen of a Web browser. A single file containing data and integrated headings is translated by a Web browser. Hypertext markup language is used to control the integrated headings determining which headings are scrollable or non-scrollable. Top and bottom headings are non-scrollable. Scrollable middle headings scroll with the data and replace top headings when they reach the top of the screen.
摘要翻译：本发明是一种用于在Web浏览器的计算机屏幕上视觉组织多个信息和标题的过程。包含数据和集成标题的单个文件由Web浏览器翻译。超文本标记语言用于控制集合标题，确定哪些标题是可滚动的或不可滚动的。顶部和底部标题是不可滚动的。可滚动的中间标题随数据滚动，并在顶部标题到达屏幕顶部时替换顶部标题。

27. 发明授权

US5982189A Built-in dynamic stress for integrated circuits 失效
标题翻译：内置动态应力集成电路
公开(公告)号：US5982189A
公开(公告)日：1999-11-09
申请号：US856414
申请日：1997-05-14
申请人： Franco Motika , Phil Nigh , John Shushereba
发明人： Franco Motika , Phil Nigh , John Shushereba
IPC分类号： G01R31/30 , G01R27/26
CPC分类号： G01R31/30
摘要： A built-in stress circuit for an integrated circuit that has a frequency generator, at least one self-test circuit, a temperature regulator and a controller is disclosed. The frequency generator receives a reference clock and an adjusted temperature frequency from the temperature regulator and outputs the test frequencies needed for the self-test circuits. The self-test circuits, which are coupled to the frequency generator, receive the test frequencies and dissipate power as the self-test circuits are being used. The temperature regulator, which is coupled to the self-test circuits and the frequency generator, senses the power dissipated (i.e., the temperature), adjusts a temperature frequency corresponding to the temperature desired, and outputs the adjusted temperature frequency. The controller, which is coupled to the frequency generator, the self-test circuits, and the temperature regulator, provides the control data necessary for testing both electrical and thermal stress conditions.
摘要翻译：公开了一种用于具有频率发生器，至少一个自检电路，温度调节器和控制器的集成电路的内置应力电路。频率发生器从温度调节器接收参考时钟和调整的温度频率，并输出自检电路所需的测试频率。耦合到频率发生器的自测电路在使用自检电路时接收测试频率并耗散功率。耦合到自检电路和频率发生器的温度调节器感测功率消耗（即，温度），调节对应于期望温度的温度频率，并输出调节的温度频率。耦合到频率发生器，自检电路和温度调节器的控制器提供测试电和热应力条件所需的控制数据。

28. 发明授权

US5973928A Multi-layer ceramic substrate decoupling 有权
标题翻译：多层陶瓷基板去耦
公开(公告)号：US5973928A
公开(公告)日：1999-10-26
申请号：US135663
申请日：1998-08-18
申请人： Charles J. Blasi , Gobinda Das , Franco Motika
发明人： Charles J. Blasi , Gobinda Das , Franco Motika
IPC分类号： H01L23/12 , G01R1/067 , H01L23/50 , H01L23/64 , H01L25/00 , H01L25/16 , H05K1/02 , H05K7/02
CPC分类号： H05K1/0231 , H01L23/50 , H01L23/642 , H01L25/16 , H01L2224/16225 , H01L2924/15312 , H01L2924/16152 , H01L2924/19105 , H01L2924/19106 , H05K2201/1053 , H05K2201/10704
摘要： A multi-layer ceramic module comprises a multi-layer ceramic substrate having an upper side and a lower side, at least one semiconductor chip mounted on the upper side of the substrate, a plurality of module pins projecting from the lower side of the substrate and at least one decoupling capacitor mounted on the lower side of the substrate between adjacent ones of the module pins.
摘要翻译：多层陶瓷模块包括具有上侧和下侧的多层陶瓷基板，安装在基板的上侧的至少一个半导体芯片，从基板的下侧突出的多个模块销和至少一个去耦电容器安装在相邻模块引脚之间的衬底的下侧。

29. 发明授权

US08840030B2 Secure credit card with near field communications 有权
标题翻译：安全的信用卡与近场通信
公开(公告)号：US08840030B2
公开(公告)日：2014-09-23
申请号：US11462814
申请日：2006-08-07
申请人： Edward E. Kelley , Franco Motika
发明人： Edward E. Kelley , Franco Motika
IPC分类号： G06K5/00 , G06K19/06 , G06Q20/34 , G07F7/10 , G06K19/073 , G06K7/10 , G06Q20/40 , G06Q20/32 , G06K19/07 , G06K7/00 , G06K17/00
CPC分类号： G06Q20/352 , G06K7/0008 , G06K7/10237 , G06K7/10297 , G06K19/0723 , G06K19/073 , G06K2017/0067 , G06Q20/32 , G06Q20/3278 , G06Q20/341 , G06Q20/3415 , G06Q20/355 , G06Q20/35785 , G06Q20/382 , G06Q20/40 , G06Q20/4093 , G07F7/1008
摘要： A near field communication device included in a secure transaction card provides an addition and/or transitional communication link for communicating secure transaction information. The near field communication device may be selectively engaged or disengaged and, when engaged, either active or passive modes of operation of the near field communication device can be selected. in the active mode, secure transaction information is transmitted upon establishment of a communication link with a complementary near field communication device. In the passive mode, secure transaction information is transmitted upon interrogation from a complementary near field communication device. Secure transaction information is generated and stored for transmission in a memory and at least a portion of the memory is erased or nulled upon transmission or upon expiration of a selected period of time.
摘要翻译：包括在安全交易卡中的近场通信设备提供用于传送安全交易信息的附加和/或过渡通信链路。近场通信设备可以选择性地接合或分离，并且当接合时，可以选择近场通信设备的主动或被动操作模式。在活动模式下，在与互补近场通信设备建立通信链路时发送安全交易信息。在被动模式中，安全交易信息是从互补近场通信设备询问时发送的。产生和存储安全交易信息以便发送到存储器中，并且至少一部分存储器在传输时或在所选择的时间段期满时被擦除或置零。

30. 发明授权

US08769360B2 Dynamic detection and identification of the functional state of multi-processor cores 有权
标题翻译：动态检测和识别多处理器内核的功能状态
公开(公告)号：US08769360B2
公开(公告)日：2014-07-01
申请号：US12904205
申请日：2010-10-14
申请人： Franco Motika , John D. Parker
发明人： Franco Motika , John D. Parker
IPC分类号： G06F11/00
CPC分类号： G06F11/2242 , G06F11/27
摘要： Exemplary embodiments include a sequential and concurrent status detection and evaluation method for multiple processor cores, including receiving data from a plurality of processor cores, for each of the plurality of processor cores, simultaneously running a built-in self test to determine if each of the plurality of cores has failed, checking the data for a dominant logic state and recording a subset of the plurality of processor cores that have failed.
摘要翻译：示例性实施例包括用于多个处理器核的顺序和并发状态检测和评估方法，包括从多个处理器核心接收数据，用于多个处理器核心中的每一个，同时运行内置自我测试以确定每个处理器核心多个核心已经失败，检查数据以获得主导逻辑状态并记录已经失败的多个处理器核心的子集。

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