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21. 发明授权

US07541255B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07541255B2
公开(公告)日：2009-06-02
申请号：US11481520
申请日：2006-07-05
申请人： Seung Bum Kim , Ki Won Nam
发明人： Seung Bum Kim , Ki Won Nam
IPC分类号： H01L21/76 , H01L23/544
CPC分类号： H01L21/32137
摘要： A method for manufacturing a semiconductor device includes forming a key open mask for coating a cell region in order to a gate polysilicon layer over an overlay vernier region formed in a gate forming process, and removing the gate polysilicon layer of the overlay vernier region while regulating an etching process so that the overlay vernier region has a superior shape.
摘要翻译：一种制造半导体器件的方法包括：形成用于在栅极形成工艺中形成的覆盖游标区上的栅极多晶硅层，形成用于涂覆单元区域的键开口掩模，并且在调节栅极多晶硅层的同时调整覆盖游标区域蚀刻处理，使得覆盖游标区域具有优异的形状。

22. 发明申请

US20080200006A1 Method for Forming Shallow Trench Isolation of Semiconductor Device 失效
标题翻译：形成半导体器件浅沟槽隔离方法
公开(公告)号：US20080200006A1
公开(公告)日：2008-08-21
申请号：US11944748
申请日：2007-11-26
申请人： Seung Bum Kim , Jong Kuk Kim
发明人： Seung Bum Kim , Jong Kuk Kim
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/02233 , H01L21/02252 , H01L21/3065 , H01L21/31654
摘要： A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.
摘要翻译：用于形成半导体器件的浅沟槽隔离（STI）的方法包括在具有限定的下部结构的半导体衬底上形成氮化物膜图案，使用氮化物膜图案作为掩模蚀刻半导体衬底的预定厚度以形成沟槽，其在预定为器件隔离区的衬底的一部分中具有垂直侧壁，对沟槽的侧壁进行等离子体处理处理以形成等离子体氧化物膜，在所得结构上形成氧化膜以填充沟槽，并对结果进行平坦化处理。

23. 发明申请

US20080025785A1 Electric lipstick 审中-公开
标题翻译：电动口红
公开(公告)号：US20080025785A1
公开(公告)日：2008-01-31
申请号：US11806455
申请日：2007-05-31
申请人： Seog Jin Ma , Seung Bum Kim , Dae Young Kim , Hyo Young Kim
发明人： Seog Jin Ma , Seung Bum Kim , Dae Young Kim , Hyo Young Kim
IPC分类号： A45D40/02 , B43K21/00
CPC分类号： A45D40/06
摘要： Disclosed herein is electric lipstick. The electric lipstick includes a body for accommodating a battery therein, a lipstick container provided with a pair of guide protrusions on the circumferential surface thereof, a guide provided with a pair of guide holes formed along the length of the circumferential wall thereof so as to support the guide protrusions in a vertical direction, a rotary element provided with a pair of spiral grooves on the inner circumferential surface thereof so as to help the guide protrusions be raised and lowered as desired, a motor assembly for rotating the rotary element, and a switch for selectively connecting the motor assembly and the battery to each other and controlling the turning on, turning off, driving duration and driving direction of the motor assembly.
摘要翻译：本文公开了电动口红。该电动口红包括用于容纳电池的本体，在其周面上设置有一对引导突起的口红容器，具有沿着其周壁的长度形成的一对引导孔的引导件，以便支撑引导突起沿垂直方向，在其内圆周表面上设置有一对螺旋槽的旋转元件，以帮助引导突起根据需要升高和降低，用于使旋转元件旋转的马达组件和开关用于将电动机组件和电池彼此选择性地连接并控制电动机组件的接通，关闭，驱动持续时间和驱动方向。

24. 发明申请

US20090298271A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20090298271A1
公开(公告)日：2009-12-03
申请号：US12346409
申请日：2008-12-30
申请人： Seung Bum Kim , Jae Min Lee
发明人： Seung Bum Kim , Jae Min Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76897 , H01L29/66621
摘要： A method for manufacturing a semiconductor device prevents failure of self-aligned contacts to improve the yield of the semiconductor device. A height of a device isolating film is larger than a height of an active region. A recess region of the device isolating film is planarized by a wet etching process to remove a hard mask layer when a recess gate is etched. A contact plug is then formed in the recess region between adjacent recess gates.
摘要翻译：半导体器件的制造方法防止自对准触点的故障，从而提高半导体器件的产量。器件隔离膜的高度大于有源区的高度。当蚀刻凹槽时，通过湿式蚀刻工艺对器件隔离膜的凹陷区域进行平坦化处理，以去除硬掩模层。然后在相邻的凹口之间的凹陷区域中形成接触塞。

25. 发明授权

US07615461B2 Method for forming shallow trench isolation of semiconductor device 失效
标题翻译：半导体器件浅沟槽隔离的形成方法
公开(公告)号：US07615461B2
公开(公告)日：2009-11-10
申请号：US11944748
申请日：2007-11-26
申请人： Seung Bum Kim , Jong Kuk Kim
发明人： Seung Bum Kim , Jong Kuk Kim
IPC分类号： H01L21/30
CPC分类号： H01L21/76224 , H01L21/02233 , H01L21/02252 , H01L21/3065 , H01L21/31654
摘要： A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.
摘要翻译：用于形成半导体器件的浅沟槽隔离（STI）的方法包括在具有限定的下部结构的半导体衬底上形成氮化物膜图案，使用氮化物膜图案作为掩模蚀刻半导体衬底的预定厚度以形成沟槽，其在预定为器件隔离区的衬底的一部分中具有垂直侧壁，对沟槽的侧壁进行等离子体处理处理以形成等离子体氧化物膜，在所得结构上形成氧化膜以填充沟槽，并对结果进行平坦化处理。

26. 发明申请

US20080206567A1 Plastic Conductive Particles and Manufacturing Method Thereof 审中-公开
标题翻译：塑料导电颗粒及其制造方法
公开(公告)号：US20080206567A1
公开(公告)日：2008-08-28
申请号：US11794634
申请日：2005-12-28
申请人： Byung Hoon Min , Kyung Heum Kim , Seung Bum Kim , Sung Soo Lee , Kyoung Bae Park , Nam Gyol Kim , Byoung Jae Yoo
发明人： Byung Hoon Min , Kyung Heum Kim , Seung Bum Kim , Sung Soo Lee , Kyoung Bae Park , Nam Gyol Kim , Byoung Jae Yoo
IPC分类号： B05D5/12 , B32B15/02 , B32B37/02 , C25D5/00 , C25D3/12 , B32B37/24
CPC分类号： H01B1/02 , C23C18/1635 , C23C18/1641 , C23C18/1653 , C23C18/22 , C23C18/285 , C23C18/30 , C23C18/36 , C23C18/405 , C23C28/00 , C23C28/021 , C23C28/023 , C25D3/60 , C25D7/00 , C25D17/20 , H01L23/49816 , H01L24/01 , H01L24/80 , H01L2224/2939 , H01L2224/294 , H01L2224/2989 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01052 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19042 , H01L2924/351 , H05K3/3436 , H05K2201/0212 , H05K2201/0221 , Y02P70/613 , Y10T428/2991 , Y10T428/2993 , H01L2924/00
摘要： Plastic conductive particles having an outer diameter of 2.5 μm˜1 mm obtained by sequentially plating a 0.1˜10 μm thick metal plating layer and a 1˜100 μm thick Pb solder layer or a Pb-free solder layer on plastic core beads having a high elastic modulus of compression, and a method of manufacturing thereof. The method of manufacturing the plastic conductive particles includes preparing plastic core beads having excellent thermal properties and a high elastic modulus of compression, etching surfaces of the plastic core beads for surface treatment thereof, forming a metal plating layer via electroless plating to improve adhesion between the bead surface and the metal plating layer, and then forming a solder layer such that a sealed hexagonal barrel is immersed in an electroplating solution and then an electroplating process is conducted using a mesh barrel rotating 360° at 6˜10 rpm or a mesh barrel having a structure in which one surface of a conventional sealed hexagonal barrel is open, and rotating 200° in right and left directions at 1˜5 rpm, to manufacture plastic conductive particles having a size of 1 mm or less. The plastic conductive particles of this invention enable the maintenance of packaging gaps, and thus can be applied to IC packaging, LCD packaging and other conductive materials.
摘要翻译：通过在具有高的塑料芯珠上顺序镀覆0.1〜10μm厚的金属镀层和1〜100μm厚的Pb焊料层或无铅焊料层，得到外径为2.5μm〜1mm的塑料导电性颗粒弹性模量，及其制造方法。制造塑料导电颗粒的方法包括制备具有优异的热性能和高弹性模量的塑性芯珠，用于表面处理的塑料芯珠的蚀刻表面，通过无电镀形成金属镀层，以改善珠表面和金属镀层，然后形成焊接层，使得将密封的六边形圆筒浸入电镀溶液中，然后使用以6〜10rpm旋转360°的网筒进行电镀工艺，或者具有常规密封六角筒的一个表面打开并以1〜5rpm左右旋转200度左右的结构，制造尺寸为1mm以下的塑料导电性粒子。本发明的塑料导电颗粒能够保持包装间隙，因此可以应用于IC封装，LCD封装和其他导电材料。

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