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21. 发明申请

US20130243969A1 CHEMICAL VAPOR DEPOSITION OF GRAPHENE ON DIELECTRICS 有权
标题翻译：石墨化学蒸气沉积在电介质上
公开(公告)号：US20130243969A1
公开(公告)日：2013-09-19
申请号：US13592957
申请日：2012-08-23
申请人： Po-Yuan TENG , Yung-Chang Lin , Po-Wen Chiu
发明人： Po-Yuan TENG , Yung-Chang Lin , Po-Wen Chiu
IPC分类号： C23C16/26 , C23C16/02 , B82Y40/00
CPC分类号： C23C16/02 , B82Y30/00 , B82Y40/00 , C01B32/186 , C23C16/26
摘要： A method for synthesizing graphene films is disclosed. Monolayer or multilayer graphene can be directly grown on the dielectric materials. The method includes the following steps: disposing dielectric materials and metals in a reactor, introducing reaction gases into the reactor and decomposing the reaction gases by heating, thus directly depositing graphene films on the surfaces of the dielectrics. High crystalline quality and low-defect graphene films can be synthesized directly on dielectric materials, without the process of wet etching and transfer. The method opens up a more direct route to apply graphene on electronics, optoelectronics, and bio-medical devices.
摘要翻译：公开了一种用于合成石墨烯薄膜的方法。单层或多层石墨烯可直接生长在电介质材料上。该方法包括以下步骤：将电介质材料和金属放置在反应器中，将反应气体引入反应器并通过加热分解反应气体，从而在电介质的表面上直接沉积石墨烯膜。可以直接在电介质材料上合成高结晶质量和低缺陷石墨烯膜，无需湿蚀刻和转印。该方法开辟了一条更直接的途径，将石墨烯应用于电子，光电子和生物医疗设备。

22. 发明申请

US20120287976A1 NETWORK DEVICE RELATING TO DIGITAL SUBSCRIBER LINE 有权
标题翻译：与数字用户线相关的网络设备
公开(公告)号：US20120287976A1
公开(公告)日：2012-11-15
申请号：US13106885
申请日：2011-05-13
申请人： Yu-Sung Cho , Yung-Chang Lin
发明人： Yu-Sung Cho , Yung-Chang Lin
IPC分类号： H04B1/38
CPC分类号： H04L25/0264 , H04M11/062
摘要： A network device relating to a digital subscriber line (DSL) such as an asymmetrical DSL (ADSL) or a very high bit rate DSL (VDSL) is provided. In the present invention, the capacitors equipped into the network device are separated and grouped into two independent groups. When the network device runs out of power, the energy of one of the two independent groups is provided for generating the dying gasp signal, and the energy of the other of the two independent groups is provided for amplifying and transmitting the dying gasp signal to a Central Office (CO). Accordingly, the CO can be accurately known whether the network device runs out of power or not, and the respective capacitances of the two independent groups can be significantly reduced so as to reduce the cost of the network device.
摘要翻译：提供了与诸如不对称DSL（ADSL）或非常高比特率DSL（VDSL）的数字用户线（DSL）有关的网络设备。在本发明中，配置在网络装置中的电容器被分离并分组成两个独立的组。当网络设备耗尽电力时，提供两个独立组中的一个的能量用于产生垂死的气体信号，并且提供两个独立组中的另一个的能量用于放大并将垂直气体信号传输到中央办公室（CO）。因此，可以准确地知道CO网络设备是否断电，并且可以显着地减少两个独立组的各自的电容，从而降低网络设备的成本。

23. 发明授权

US08283715B2 Method and apparatus for buried word line formation 有权
标题翻译：掩埋字线形成的方法和装置
公开(公告)号：US08283715B2
公开(公告)日：2012-10-09
申请号：US12855436
申请日：2010-08-12
申请人： Yung-Chang Lin , Sheng-Chang Liang
发明人： Yung-Chang Lin , Sheng-Chang Liang
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L21/823487 , H01L27/10876 , H01L27/10885 , H01L27/10891 , H01L29/0642 , H01L29/0653 , H01L29/66666 , H01L29/7827
摘要： An integrated circuit with a memory cell is disclosed. The integrated circuit with a memory cell includes: a word line disposed in a word line trench of a substrate; a bit line disposed below the word line in a bit line trench and extending orthogonal to the word line; and, a separating layer disposed above the bit line in the bit line trench that separates the word line from the bit line; wherein an etching rate of the separating layer approaches that of the substrate.
摘要翻译：公开了一种具有存储单元的集成电路。具有存储单元的集成电路包括：设置在基板的字线沟槽中的字线; 布置在位线下方的字线下方且与字线正交延伸的位线; 以及分离层，其设置在所述位线沟槽中的位线之上，所述位线沟槽将所述字线与所述位线分离; 其中所述分离层的蚀刻速率接近所述衬底的蚀刻速率。

24. 发明授权

US08035191B2 Contact efuse structure 有权
标题翻译：联系efuse结构
公开(公告)号：US08035191B2
公开(公告)日：2011-10-11
申请号：US12326106
申请日：2008-12-02
申请人： Yung-Chang Lin , Kuei-Sheng Wu , San-Fu Lin , Hui-Shen Shih
发明人： Yung-Chang Lin , Kuei-Sheng Wu , San-Fu Lin , Hui-Shen Shih
IPC分类号： H01L29/00
CPC分类号： H01L27/112 , H01L23/5256 , H01L27/11206 , H01L29/665 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： A contact efuse structure includes a silicon layer and a contact contacting the silicon layer with one end. When a voltage is applied to the contact, a void is formed at the end of the contact, and thus the contact is open. Such structure may be utilized in an efuse device or a read only memory. A method of making a contact efuse device and a method of making a read only memory are also disclosed.
摘要翻译：接触式熔点结构包括硅层和接触硅层与一端的接触。当对触点施加电压时，在接触端部形成空隙，因此触点断开。这种结构可以用在efuse设备或只读存储器中。还公开了制造接触式充电装置的方法和制造只读存储器的方法。

25. 发明授权

US08035097B2 Phase change memory 有权
标题翻译：相变记忆
公开(公告)号：US08035097B2
公开(公告)日：2011-10-11
申请号：US12325801
申请日：2008-12-01
申请人： Chien-Li Kuo , Yung-Chang Lin , Kuei-Sheng Wu , Chien-Hsien Chen
发明人： Chien-Li Kuo , Yung-Chang Lin , Kuei-Sheng Wu , Chien-Hsien Chen
IPC分类号： H01L29/06 , H01L47/00
CPC分类号： H01L45/06 , G11C5/063 , G11C13/0004 , H01L27/2445 , H01L27/2463 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148
摘要： A phase change memory is provided, which includes a semiconductor substrate having a first conductive type, buried word lines having a second conductive type, doped semiconductor layers having the first conductive type, memory cells, metal silicide layers, and bit lines. The buried word lines are disposed in the semiconductor substrate. Each buried word line includes a line-shaped main portion extended along a first direction and protrusion portions. Each protrusion portion is connected to one long side of the line-shaped main portion. Each doped semiconductor layer is disposed on one protrusion portion. Each memory cell includes a phase change material layer and is disposed on and electrically connected to one of the doped semiconductor layers. Each metal silicide layer is disposed on one of the line-shaped main portions. Each bit line is connected to memory cells disposed on the word lines in a second direction substantially perpendicular to the first direction.
摘要翻译：提供了一种相变存储器，其包括具有第一导电类型的半导体衬底，具有第二导电类型的埋入字线，具有第一导电类型的掺杂半导体层，存储单元，金属硅化物层和位线。掩埋字线设置在半导体衬底中。每个掩埋字线包括沿着第一方向延伸的线状主体部分和突出部分。每个突起部分连接到线状主体部分的一个长边。每个掺杂半导体层设置在一个突出部分上。每个存储单元包括相变材料层，并且被布置在一个掺杂半导体层上并与其电连接。每个金属硅化物层设置在一个线状主要部分上。每个位线以基本上垂直于第一方向的第二方向连接到设置在字线上的存储单元。

26. 发明授权

US07888668B2 Phase change memory 有权
标题翻译：相变记忆
公开(公告)号：US07888668B2
公开(公告)日：2011-02-15
申请号：US12174642
申请日：2008-07-17
申请人： Chien-Li Kuo , Kuei-Sheng Wu , Yung-Chang Lin
发明人： Chien-Li Kuo , Kuei-Sheng Wu , Yung-Chang Lin
IPC分类号： H01L47/00 , H01L21/82 , G11C11/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L27/2472 , H01L27/249 , H01L45/06 , H01L45/122 , H01L45/1226 , H01L45/126 , H01L45/1666
摘要： A phase change memory and the method for manufacturing the same are disclosed. The phase change memory includes a word line, a phase change element, a plurality of heating parts, and a plurality of bit lines. The phase change material layer is electrically connected to the word line and the heating parts. Each heating part is electrically connected to a respective bit line.
摘要翻译：公开了一种相变存储器及其制造方法。相变存储器包括字线，相变元件，多个加热部件和多个位线。相变材料层电连接到字线和加热部件。每个加热部件电连接到相应的位线。

27. 发明申请

US20100133649A1 Contact efuse structure, method of making a contact efuse device containing the same, and method of making a read only memory containing the same 有权
标题翻译：联系efuse结构，制造包含该接触式efuse器件的接触式设备的方法以及制造只读存储器的方法
公开(公告)号：US20100133649A1
公开(公告)日：2010-06-03
申请号：US12326106
申请日：2008-12-02
申请人： Yung-Chang Lin , Kuei-Sheng Wu , San-Fu Lin , Hui-Shen Shih
发明人： Yung-Chang Lin , Kuei-Sheng Wu , San-Fu Lin , Hui-Shen Shih
IPC分类号： H01L29/66 , H01L21/44 , H01L21/336
CPC分类号： H01L27/112 , H01L23/5256 , H01L27/11206 , H01L29/665 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： A contact efuse structure includes a silicon layer and a contact contacting the silicon layer with one end. When a voltage is applied to the contact, a void is formed at the end of the contact, and thus the contact is open. Such structure may be utilized in an efuse device or a read only memory. A method of making a contact efuse device and a method of making a read only memory are also disclosed.
摘要翻译：接触式熔点结构包括硅层和接触硅层与一端的接触。当对触点施加电压时，在接触端部形成空隙，因此触点断开。这种结构可以用在efuse设备或只读存储器中。还公开了制造接触式充电装置的方法和制造只读存储器的方法。

28. 发明申请

US20100133503A1 PHASE CHANGE MEMORY 有权
标题翻译：相变记忆
公开(公告)号：US20100133503A1
公开(公告)日：2010-06-03
申请号：US12325801
申请日：2008-12-01
申请人： Chien-Li Kuo , Yung-Chang Lin , Kuei-Sheng Wu , Chien-Hsien Chen
发明人： Chien-Li Kuo , Yung-Chang Lin , Kuei-Sheng Wu , Chien-Hsien Chen
IPC分类号： H01L45/00 , G11C11/00
CPC分类号： H01L45/06 , G11C5/063 , G11C13/0004 , H01L27/2445 , H01L27/2463 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148
摘要： A phase change memory is provided, which includes a semiconductor substrate having a first conductive type, buried word lines having a second conductive type, doped semiconductor layers having the first conductive type, memory cells, metal silicide layers, and bit lines. The buried word lines are disposed in the semiconductor substrate. Each buried word line includes a line-shaped main portion extended along a first direction and protrusion portions. Each protrusion portion is connected to one long side of the line-shaped main portion. Each doped semiconductor layer is disposed on one protrusion portion. Each memory cell includes a phase change material layer and is disposed on and electrically connected to one of the doped semiconductor layers. Each metal silicide layer is disposed on one of the line-shaped main portions. Each bit line is connected to memory cells disposed on the word lines in a second direction substantially perpendicular to the first direction.
摘要翻译：提供了一种相变存储器，其包括具有第一导电类型的半导体衬底，具有第二导电类型的埋入字线，具有第一导电类型的掺杂半导体层，存储单元，金属硅化物层和位线。掩埋字线设置在半导体衬底中。每个掩埋字线包括沿着第一方向延伸的线状主体部分和突出部分。每个突起部分连接到线状主体部分的一个长边。每个掺杂半导体层设置在一个突出部分上。每个存储单元包括相变材料层，并且被布置在一个掺杂半导体层上并与其电连接。每个金属硅化物层设置在一个线状主要部分上。每个位线以基本上垂直于第一方向的第二方向连接到设置在字线上的存储单元。

29. 发明授权

US07380026B2 Computer system with network signal level indication device 失效
标题翻译：带网络信号电平指示装置的计算机系统
公开(公告)号：US07380026B2
公开(公告)日：2008-05-27
申请号：US11257028
申请日：2005-10-25
申请人： Yung-Chang Lin
发明人： Yung-Chang Lin
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： H04L43/0817
摘要： A computer system with a device for indicating the network signal level of the LAN connected to the computer system is provided. The network signal level indication device includes a network signal level detection unit for detecting the signal level of the LAN connected to the computer and generating a set of network state signals, an indication unit interface circuit for receiving the set of network state signals generated by the network signal level detection unit, and a network signal level indication unit for receiving the set of network state signals and generating a light signal indicating the network signal level. The network signal level detection unit is the keyboard controller of the computer system.
摘要翻译：提供一种具有用于指示连接到计算机系统的LAN的网络信号电平的设备的计算机系统。网络信号电平指示装置包括网络信号电平检测单元，用于检测连接到计算机的LAN的信号电平并产生一组网络状态信号;指示单元接口电路，用于接收由该信号电平产生的一组网络状态信号网络信号电平检测单元和网络信号电平指示单元，用于接收一组网络状态信号并产生指示网络信号电平的光信号。网络信号电平检测单元是计算机系统的键盘控制器。

30. 发明授权

US06350646B1 Method for reducing thermal budget in node contact application 失效
标题翻译：节点接触应用中减少热预算的方法
公开(公告)号：US06350646B1
公开(公告)日：2002-02-26
申请号：US09484786
申请日：2000-01-18
申请人： Tung-Po Chen , Yung-Chang Lin
发明人： Tung-Po Chen , Yung-Chang Lin
IPC分类号： H01L218242
CPC分类号： H01L21/76831 , H01L21/76802 , H01L27/10855 , H01L27/10894
摘要： A method for manufacturing a semiconductor device is disclosed. The method can reduce thermal budget in node contact application. It includes mainly the following processes. A substrate is first provided, then a dielectric layer is formed over the substrate. Next, a node contact opening through the dielectric layer to top surface of the substrate is formed by coating the dielectric layer with a photoresist layer, patterning the photoresist layer with pattern of a node contact by exposure and development, then etching the dielectric layer until top surface of said substrate exposed using said patterned photoresist layer as a mask. Subsequently, the photoresist layer is removed. Finally, a silicon nitride layer is formed on inside wall of the node contact opening by rapid thermal chemical vapor deposition (RTCVD).
摘要翻译：公开了一种制造半导体器件的方法。该方法可以降低节点接触应用中的热预算。它主要包括以下过程。首先提供衬底，然后在衬底上形成电介质层。接下来，通过介电层到基板的顶表面的节点接触开口通过用光致抗蚀剂层涂覆介电层而形成，通过曝光和显影对具有节点接触图案的光致抗蚀剂层进行图案化，然后蚀刻介电层直到顶部使用所述图案化的光致抗蚀剂层作为掩模曝光所述衬底的表面。随后，去除光致抗蚀剂层。最后，通过快速热化学气相沉积（RTCVD）在节点接触开口的内壁上形成氮化硅层。

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