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21. 发明申请

US20080228707A1 Encoding and Decoding Data System and Method 有权
标题翻译：数据系统和方法的编码和解码
公开(公告)号：US20080228707A1
公开(公告)日：2008-09-18
申请号：US12031668
申请日：2008-02-14
申请人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
发明人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
IPC分类号： G06F17/30
CPC分类号： G06F21/572 , G06F21/88 , G06Q20/3674 , H04W12/12
摘要： A system and method for encoding and decoding data. A method includes selecting a subgroup of bits from one or more bytes of binary encrypted information, wherein the binary encrypted information is for tracking, locating, and disabling an electronic device; passing the subgroup of bits to an encoding function that performs binary mapping operations on the subgroup of bits to generate an encoded byte; and encoding the next one or more bytes of binary encrypted information if the end of the binary encrypted information has not been reached.
摘要翻译：一种用于对数据进行编码和解码的系统和方法。一种方法包括从二进制加密信息的一个或多个字节中选择一个比特组，其中二进制加密信息用于跟踪，定位和禁用电子设备; 将所述比特的子组传递到对所述子组进行二进制映射操作的编码功能，以生成编码字节; 并且如果未达到二进制加密信息的结束，则对下一个或多个字节的二进制加密信息进行编码。

22. 发明申请

US20080137843A1 Electronic Device Communication System and Method 有权
标题翻译：电子设备通信系统与方法
公开(公告)号：US20080137843A1
公开(公告)日：2008-06-12
申请号：US12030122
申请日：2008-02-12
申请人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
发明人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
IPC分类号： H04L9/28
CPC分类号： G06F21/572 , G06F21/88 , G06Q20/3674 , H04W12/12
摘要： A system and method for electronic device communication. A system includes a client device application including an encryption/decryption module, wherein the module directly transmits and receives data to and from the client device application; and a server device application including an encryption/decryption module coupled to the client device application through a communication medium, wherein the module directly transmits and receives data to and from the server device application.
摘要翻译：一种用于电子设备通信的系统和方法。一种系统包括包括加密/解密模块的客户端设备应用，其中模块直接向客户端设备应用发送和接收数据; 以及包括通过通信介质耦合到所述客户端设备应用的加密/解密模块的服务器设备应用，其中所述模块直接向所述服务器设备应用发送和接收数据。

23. 发明申请

US20080134284A1 Electronic Device Security and Tracking System and Method 有权
公开(公告)号：US20080134284A1
公开(公告)日：2008-06-05
申请号：US11928735
申请日：2007-10-30
申请人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
发明人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajan , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
IPC分类号： G06F17/00 , G06Q30/00
CPC分类号： G06F21/572 , G06F21/88 , G06Q20/3674 , H04W12/12
摘要： A system and method for securing and tracking an electronic device. The system includes hardware, software and firmware components that cooperate to allow tracking, disabling, and other interaction with the stolen electronic device. The system includes an application component, non-viewable component and Basic Input/Output Subsystem (BIOS) component that are present on the electronic device. The BIOS component maintains the secured environment of the application and non-viewable components. If only the application component was provided, a simple low level format of the hard disk drive would remove the application and bypass the security features. The system implements an “application and BIOS” based solution to electronic device security.

24. 发明申请

US20090300771A1 Electronic Device With Protection From Unauthorized Utilization 有权
标题翻译：电子设备防止未经授权的使用
公开(公告)号：US20090300771A1
公开(公告)日：2009-12-03
申请号：US12538099
申请日：2009-08-07
申请人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajab , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
发明人： Apurva Mahendrakumar Bhansali , Manoj Kumar Jain , Shradha Dube , Gayathri Rangarajab , Mehul Ramjibhai Patel , Rayesh Kashinath Raikar , Kamal Mansukhlal Dhanani , Ranjit Kapila , Elza Abraham Varghese , Thomas David Tucker
IPC分类号： G06F21/00 , G06F9/00
CPC分类号： G06F21/572 , G06F21/88 , G06Q20/3674 , H04W12/12
摘要： An electronic device has software for protecting the electronic device from unauthorized utilization. When executed, the software causes the electronic device to execute an application component, wherein the application component is configured to automatically ascertain whether the electronic device has been reported stolen, based on information received from a server system. The electronic device also automatically determines whether the application component is operating correctly, and if so, automatically provides a basic input/output system (BIOS) component of the electronic device with information indicating that the application component is operating correctly. During a subsequent boot process for the electronic device, the software automatically prevents the electronic device from completing the boot process if the BIOS component does not find the information from the application component indicating that the application component was operating correctly. Other embodiments are described and claimed.
摘要翻译：电子设备具有用于保护电子设备免受未经授权的使用的软件。当执行时，软件使得电子设备执行应用组件，其中应用组件被配置为基于从服务器系统接收的信息来自动确定电子设备是否已被报告为被盗。电子设备还自动确定应用组件是否正常运行，如果是，则自动提供电子设备的基本输入/输出系统（BIOS）组件，其中包含指示应用组件正常运行的信息。在电子设备的随后引导过程中，如果BIOS组件没有从应用组件中找到指示应用组件正确操作的信息，则软件自动防止电子设备完成引导过程。描述和要求保护其他实施例。

25. 发明申请

US20120327948A1 ADJUSTMENT OF NEGATIVE WEIGHTS IN WEIGHTED ROUND ROBIN SCHEDULING 审中-公开
标题翻译：加权ROBR调度中的负权重调整
公开(公告)号：US20120327948A1
公开(公告)日：2012-12-27
申请号：US13165852
申请日：2011-06-22
申请人： Govindarajan Mohandoss , Santosh Narayanan , Rayesh Kashinath Raikar , Prabhakar Ballapalle
发明人： Govindarajan Mohandoss , Santosh Narayanan , Rayesh Kashinath Raikar , Prabhakar Ballapalle
IPC分类号： H04L12/56
CPC分类号： H04L47/623 , H04L47/21
摘要： In one embodiment, a network processor services a plurality of queues having data using weighted round robin scheduling. Each queue is assigned an initial weight based on the queue's priority. During each cycle, an updated weight is generated for each queue by adding the corresponding initial weight to a corresponding previously generated decremented weight. Further, each queue outputs as many packets as it can without exceeding its updated weight. As each packet gets transmitted, the updated weight is decremented based on the number of blocks in that packet. If, after those packets are transmitted, the decremented weight is still positive and the queue still has data, then one more packet is transmitted, no matter how many blocks are in the packet. When a decremented weight becomes negative, the weights of the remaining queues are increased to restore the priorities of the queues as set by the initial weights.
摘要翻译：在一个实施例中，网络处理器使用加权轮询调度来服务具有数据的多个队列。每个队列根据队列的优先级分配初始权重。在每个周期期间，通过将相应的初始权重加到相应的先前产生的递减权重来为每个队列生成更新权重。此外，每个队列输出尽可能多的分组，而不超过其更新的权重。当每个分组被发送时，更新的权重基于该分组中的块的数量减少。如果在发送这些分组之后，递减的权重仍然是正的，并且队列仍然具有数据，则无论数据包中有多少个块，都会发送一个数据包。当递减的权重变为负值时，剩余队列的权重将增加，以恢复由初始权重设置的队列优先级。

26. 发明授权

US09319325B2 Adaptive method and system of regulation of yellow traffic in a network 有权
标题翻译：网络中黄色流量调节的自适应方法和系统
公开(公告)号：US09319325B2
公开(公告)日：2016-04-19
申请号：US12861852
申请日：2010-08-24
申请人： Govindarajan Mohandoss , Santosh Narayanan , Vijaya Bhaskar Kommineni , Rayesh Kashinath Raikar
发明人： Govindarajan Mohandoss , Santosh Narayanan , Vijaya Bhaskar Kommineni , Rayesh Kashinath Raikar
IPC分类号： H04L12/851 , H04L12/813 , H04L12/819
CPC分类号： H04L47/2425 , H04L47/20 , H04L47/215
摘要： A method, an apparatus and/or a system to regulate yellow traffic in a network is provided. In one embodiment, the method includes quantifying, an extent of violation of a transmission rate of a data traffic relative to a committed bandwidth profile in a network. The data traffic is generated through a client device coupled to the network. The method also includes regulating, a volume of the data traffic associated with a particular level of compliance relative to the committed bandwidth profile, at an edge node of the network, based on the quantification. The committed bandwidth profile specifies an average rate of committed and excess data traffic generated by the client device. The particular level of compliance is characterized by the transmission rate exceeding a committed information rate and lying within a peak information rate. The peak information rate is maximum allowable rate of admission of frames into the network.
摘要翻译：提供了一种用于调节网络中的黄色业务的方法，装置和/或系统。在一个实施例中，该方法包括量化相对于网络中的承诺带宽简档的数据流量的传输速率的程度。通过耦合到网络的客户端设备生成数据流量。该方法还包括基于量化来调节在网络的边缘节点处与相对于承诺的带宽简档相关联的特定的顺应性相关联的数据流量的量。承诺的带宽配置文件指定客户端设备生成的承诺和超量数据流量的平均速率。特定的合规级别的特征在于传输速率超过承诺信息速率并处于峰值信息速率内。峰值信息速率是帧进入网络的最大允许速率。

27. 发明授权

US08543893B2 Receiver for error-protected packet-based frame 有权
标题翻译：接收器，用于基于错误保护的基于分组的帧
公开(公告)号：US08543893B2
公开(公告)日：2013-09-24
申请号：US12837556
申请日：2010-07-16
申请人： Atul Kisanrao Hedaoo , Rayesh Kashinath Raikar
发明人： Atul Kisanrao Hedaoo , Rayesh Kashinath Raikar
IPC分类号： H03M13/00
CPC分类号： H03M13/05 , H03M13/13 , H04L1/0052 , H04L1/0057
摘要： In one embodiment, a receiver for a frame of media packets employing the real-time transmission protocol (RTP) and forward error correction (FEC) is disclosed. The receiver comprises a packet buffer and an FEC decoder. After a packet is received by the packet buffer, the FEC decoder reads the packet and, as part of FEC processing, performs an XOR operation on the packet, without waiting for the entire frame (or, indeed, for any subsequent packet of the frame) to be received. The XOR operation results are accumulated until sufficient packets are received to reconstruct a missing packet in the frame. Because the XOR operations are performed immediately after a packet is received, without any delay from waiting for subsequent packets, the receiver has a very low latency, and the packet buffer may be relatively small.
摘要翻译：在一个实施例中，公开了一种采用实时传输协议（RTP）和前向纠错（FEC）的媒体分组帧的接收机。接收机包括分组缓冲器和FEC解码器。在分组缓冲器接收到分组之后，FEC解码器读取分组，并且作为FEC处理的一部分，在分组上执行XOR操作，而不等待整个帧（或实际上，对于帧的任何后续分组））被接收。积累XOR运算结果，直到接收到足够的数据包来重构帧中丢失的数据包。由于在接收到分组之后立即执行XOR操作，所以接收机没有等待后续分组的任何延迟，所以接收机具有非常低的延迟，并且分组缓冲器可能相对较小。

28. 发明授权

US08291138B2 Skip based control logic for first in first out buffer 失效
标题翻译：基于跳过的控制逻辑，用于先进先出缓冲区
公开(公告)号：US08291138B2
公开(公告)日：2012-10-16
申请号：US13227482
申请日：2011-09-08
申请人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
发明人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F5/10 , H04L12/40058
摘要： Skip based control logic for first in first out buffer is disclosed. In one embodiment, a host controller interface (HCI) device includes an isochronous receive first in first out (IRFIFO) buffer. The IRFIFO buffer includes a storage for storing an isochronous data packet received from a guest device. Further, the IRFIFO buffer includes a write pointer for pointing to a write address of the storage for a write operation. Furthermore, the IRFIFO buffer includes a read pointer for pointing to a read address of the storage for a read operation. In addition, the IRFIFO includes a control logic for incrementing the read pointer by a value of a skip parameter of a skip register if the isochronous data packet is not valid for the read operation.
摘要翻译：披露了先进先出缓冲器中基于跳过的控制逻辑。在一个实施例中，主机控制器接口（HCI）设备包括先进先出（IRFIFO）缓冲器中的同步接收。 IRFIFO缓冲器包括用于存储从客户设备接收的同步数据分组的存储器。此外，IRFIFO缓冲器包括用于指向用于写入操作的存储器的写入地址的写入指针。此外，IRFIFO缓冲器包括读指针，用于指向用于读操作的存储器的读地址。此外，如果同步数据分组对于读取操作无效，则IRFIFO包括用于将读取指针递增跳跃寄存器的跳过参数的值的控制逻辑。

29. 发明授权

US08291133B2 Skip based control logic for first in first out buffer 失效
标题翻译：基于跳过的控制逻辑，用于先进先出缓冲区
公开(公告)号：US08291133B2
公开(公告)日：2012-10-16
申请号：US13229774
申请日：2011-09-12
申请人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
发明人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F5/10 , H04L12/40058
摘要： Skip based control logic for first in first out buffer is disclosed. In one embodiment, an isochronous data packet placed in an isochronous receive first in first out (IRFIFO) buffer coupled to an isochronous receive direct memory access (IRDMA) is detected. Further, a header of the isochronous data packet is read. Furthermore, a validity of the isochronous data packet is determined. Also, a read operation of remaining data of the isochronous data packet is skipped if the isochronous data packet is determined as invalid.
摘要翻译：披露了先进先出缓冲器中基于跳过的控制逻辑。在一个实施例中，检测到被配置在同步接收直接存储器访问（IRDMA）中的先进先出（IRFIFO）缓冲器中的等时同步接收的等时数据分组。此外，读取等时数据分组的报头。此外，确定同步数据分组的有效性。此外，如果同步数据分组被确定为无效，则跳过同步数据分组的剩余数据的读取操作。

30. 发明授权

US08041856B2 Skip based control logic for first in first out buffer 有权
标题翻译：基于跳过的控制逻辑，用于先进先出缓冲区
公开(公告)号：US08041856B2
公开(公告)日：2011-10-18
申请号：US12241108
申请日：2008-09-30
申请人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
发明人： Rayesh Kashinath Raikar , Vijaya Bhaskar Kommineni , Santosh Kumar Akula , Ranjith Kumar Kotikalapudi , Vinay Gangadhar
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F5/10 , H04L12/40058
摘要： A system and method of a skip based control logic for a first in first out (FIFO) buffer is disclosed. In one embodiment, a FIFO buffer system includes a storage for storing data, a write pointer for pointing to a write address of the storage for a write operation, and a read pointer for pointing to a read address of the storage for a read operation. Further, the FIFO buffer system includes a control logic for incrementing the read pointer based on a skip parameter of a skip register. The skip parameter is used to characterize a validity of the data for the read operation.
摘要翻译：公开了一种用于先进先出（FIFO）缓冲器的基于跳过的控制逻辑的系统和方法。在一个实施例中，FIFO缓冲器系统包括用于存储数据的存储器，用于指向用于写入操作的存储器的写入地址的写入指针，以及用于指向用于读取操作的存储器的读取地址的读取指针。此外，FIFO缓冲器系统包括用于基于跳过寄存器的跳过参数递增读指针的控制逻辑。 skip参数用于表征读取操作的数据的有效性。

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