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21. 发明授权

US06483956B1 Fiber frequency locker 失效
标题翻译：光纤储物柜
公开(公告)号：US06483956B1
公开(公告)日：2002-11-19
申请号：US09637480
申请日：2000-08-11
申请人： Yaakov Shevy , Amnon Yariv , Dan Provenzano
发明人： Yaakov Shevy , Amnon Yariv , Dan Provenzano
IPC分类号： G02B600
CPC分类号： H01S3/131 , H01S3/1303 , H01S3/1305 , H01S5/0687
摘要： Techniques and devices using a fiber cavity formed of two spaced fiber gratings to construct a laser frequency locker.
摘要翻译：使用由两个隔开的光纤光栅形成的光纤腔的技术和设备来构造激光频率锁定器。

22. 发明授权

US5916711A Phase-shifting masks for photolithography 失效
标题翻译：用于光刻的相移掩模
公开(公告)号：US5916711A
公开(公告)日：1999-06-29
申请号：US947475
申请日：1997-10-10
申请人： Boaz Salik , Amnon Yariv
发明人： Boaz Salik , Amnon Yariv
IPC分类号： G03F1/30 , G03F9/00
CPC分类号： G03F1/30
摘要： A method of designing phase shifting masks with improved resolution. Auxiliary transmissive phase regions with properly selected locations and dimensions are introduced to eliminate unwanted interference patterns. A usual opaque region between the transmissive features that are phase-conflicting to one another is partially or entirely replaced with a transmissive region of an opposite phase with respect to the phase of the transmissive features. In positive photoresist layouts, the light-absorbing features are partially or entirely made transmissive while an opposite and uniform phase is maintained throughout the transmissive background. Segmenting features with at least one auxiliary phase region and adjusting attenuation of different features can further improve the performance.
摘要翻译：一种改进分辨率设计相移掩模的方法。引入具有适当选择的位置和尺寸的辅助透射相位区域以消除不需要的干涉图案。相互相互冲突的透射特征之间的通常不透明区域部分地或全部地被相对于透射特征的相位的相反相位的透射区域替代。在正光致抗蚀剂布局中，光吸收特征部分或完全透射，而在整个透射背景下保持相反且均匀的相。具有至少一个辅助相位区域的分段特征和调整不同特征的衰减可以进一步提高性能。

23. 发明授权

US5724269A Single clock cycle two-dimensional median filter 失效
标题翻译：单时钟周期二维中值滤波器
公开(公告)号：US5724269A
公开(公告)日：1998-03-03
申请号：US514626
申请日：1995-08-14
申请人： Volnei A. Pedroni , Amnon Yariv
发明人： Volnei A. Pedroni , Amnon Yariv
IPC分类号： H03H17/02 , G06F17/00
CPC分类号： H03H17/0202
摘要： A median circuit operates over a single-clock-cycle to determine the median of the group. Each value is compared with a plurality of other values. One of those other values become the eventual median. The possible median which is closest to all of the elements being compared is taken as the overall closest value and established as the median. Most specifically, this is done by applying the higher voltage of the pair to one end of a capacitor at the same time as a precharge. After the precharge is complete, the lower voltage of the pair is applied to the capacitor. The capacitor acts as a charge pump, lowering its other end by an amount proportional to the distance between the higher voltage of the pair and the lower voltage of the pair. A plurality of the capacitors are connected together, so that the output from the group of cells represents the average capacitors among all elements. The highest group represents the eventual median.
摘要翻译：中值电路在单个时钟周期内工作，以确定组的中位数。将每个值与多个其他值进行比较。其中一个值成为最终的中位数。最接近所有要比较的元素的可能中位数作为总体最接近的值，并被确定为中位数。最具体地说，这是通过在预充电的同时将该对的较高电压施加到电容器的一端来完成的。预充电完成后，该对的较低电压被施加到电容器。电容器充当电荷泵，将其另一端的数量与成对的较高电压和对电压的较低电压之间的距离成正比。多个电容器连接在一起，使得来自该单元组的输出表示所有元件之间的平均电容器。最高组代表最终中位数。

24. 发明授权

US5440669A Photorefractive systems and methods 失效
$Photorefractive systems and methods$
标题翻译：光折射系统和方法
公开(公告)号：US5440669A
公开(公告)日：1995-08-08
申请号：US908298
申请日：1992-07-02
申请人： George A. Rakuljic , Amnon Yariv
发明人： George A. Rakuljic , Amnon Yariv
IPC分类号： G02B5/18 , G02B5/20 , G02B5/32 , G02B6/02 , G02B6/34 , G03H1/02 , G03H1/04 , G03H1/26 , G03H1/28 , G06K9/76 , G11B7/0065 , G11C13/04 , H01S3/06 , H01S3/08 , H01S3/109 , H01S3/16 , G03H1/18
CPC分类号： H01S3/16 , G02B5/1857 , G02B5/203 , G02B5/32 , G02B6/12007 , G02B6/29308 , G02B6/2931 , G02B6/29311 , G02B6/4215 , G03H1/02 , G03H1/0248 , G03H1/28 , G06K9/76 , G11B7/0065 , G11C13/044 , H01S3/08009 , H01S3/109 , G02B6/2706 , G02B6/29314 , G02B6/29395 , G03H2001/026 , G03H2001/0268 , G03H2001/0415 , G03H2001/0439 , G03H2001/2231 , G03H2001/266
摘要： A new type of holographic recording in photorefractive crystals is disclosed, termed orthogonal data storage, in which counterpropagating, reflection mode holograms are wavelength multiplexed to form gratings lying along a common axis. It is shown that this configuration provides substantial improvements in data storage capacity in comparison to prior art systems and that higher coupling coefficients are achieved. In consequence, not only storage of data but a wide range of other devices including wavelength selective filters, lenses and optical correlation systems are disclosed. Further, methods of writing and processing metastable images are disclosed which substantially improve the strength of the gratings that are permanently developed in the medium. These methods include advantageous use of electrical potentials and photovoltaic properties, together with different interrelationships during processing.
摘要翻译：公开了一种新型的光折变晶体中的全息记录，称为正交数据存储，其中反向传播的反射模式全息图被波长多路复用以形成沿着公共轴的光栅。显示出与现有技术系统相比，该配置提供了数据存储容量的实质性改进，并且实现了更高的耦合系数。因此，不仅公开了数据的存储，而且公开了包括波长选择滤光器，透镜和光学相关系统在内的宽范围的其它器件。此外，公开了写入和处理亚稳态图像的方法，其基本上改善了在介质中永久显影的光栅的强度。这些方法包括在处理期间有利地使用电势和光伏特性以及不同的相互关系。

25. 发明授权

US5353382A Programmable synapse for neural network applications 失效
标题翻译：神经网络应用的可编程突触
公开(公告)号：US5353382A
公开(公告)日：1994-10-04
申请号：US597390
申请日：1990-10-15
申请人： Amnon Yariv , Charles F. Neugebauer , Aharon J. Agranat
发明人： Amnon Yariv , Charles F. Neugebauer , Aharon J. Agranat
IPC分类号： G06N3/063 , H03K19/21
CPC分类号： G06N3/063
摘要： A synapse for neural network applications providing four quadrant feed-forward and feed-back modes in addition to an outer-product learning capability allowing learning in-situ. The invention, in its preferred embodiment, utilizes a novel two-transistor implementation which permits each synapse to be built in an integrated circuit chip surface area of only 20 by 20 micrometers. One of the two transistors at each synapse of the present invention comprises a floating gate structure composed of a floating gate electrode and a control electrode which permits learning upon application of incident ultraviolet light. During ultraviolet light application, a floating gate electrode voltage may be altered to modify the weight of each synapse in accordance with preselected criteria, based upon the input and output weight change vector elements corresponding to that particular matrix element. The second transistor corresponding to each synapse of the present invention provides a novel method for applying a voltage to the control electrode of the aforementioned floating gate structure of the first transistor. The voltage applied to the control electrode and thus the proportionate change in the floating gate electrode of the first transistor may be made proportional to the product of the corresponding input weight change vector element and the corresponding output weight change vector element, by using slope controllable ramp generators and phase controllable pulse generators, only one set of which must be provided for the entire matrix of synapses herein disclosed.
摘要翻译：提供四象限前馈和反馈模式的神经网络应用程序的突触，以及允许原位学习的外部产品学习能力。在其优选实施例中，本发明利用了一种新颖的双晶体管实现，其允许每个突触内置在只有20×20微米的集成电路芯片表面积中。在本发明的每个突触处的两个晶体管中的一个包括由浮置栅极电极和控制电极构成的浮动栅极结构，其允许在施加入射的紫外光时学习。在紫外线照射期间，可以根据与特定矩阵元素对应的输入和输出权重变化向量元素，根据预先选择的标准改变浮栅电极电压以改变每个突触的重量。对应于本发明的每个突触的第二晶体管提供了一种向第一晶体管的上述浮置栅极结构的控制电极施加电压的新方法。施加到控制电极的电压以及因此第一晶体管的浮置栅电极的比例变化可以通过使用斜率可控斜坡与相应的输入权重变化向量元素和相应的输出权重变化向量元素的乘积成比例发生器和相位可控脉冲发生器，必须为本文公开的突触整个基体提供其中一组。

26. 发明授权

US5258934A Charge domain bit serial vector-matrix multiplier and method thereof 失效
标题翻译：电荷域位串行矢量矩阵乘法器及其方法
公开(公告)号：US5258934A
公开(公告)日：1993-11-02
申请号：US522772
申请日：1990-05-14
申请人： Aharon J. Agranat , Charles F. Neugebauer , Amnon Yariv
发明人： Aharon J. Agranat , Charles F. Neugebauer , Amnon Yariv
IPC分类号： G06E1/04 , G06N3/067 , G06G7/16 , G06J7/12
CPC分类号： G06E1/045 , G06N3/0675
摘要： A charge domain bit serial vector matrix multiplier for real time signal processing of mixed digital/analog signals for implementing opto-electronic neural networks and other signal processing functions. A combination of CCD and DCSD arrays permits vector/matrix multiplication with better than 10.sup.11 multiply accumulates per second on a one square centimeter chip. The CCD array portion of the invention is used to load and move charge packets into the DCSD array for processing therein. The CCD array is also used to empty the matrix of unwanted charge. The DCSD array is designed to store a plurality of charge packets representing the respective matrix values such as the synaptic interaction matrix of a neural network. The vector multiplicand may be applied in bit serial format. The row or sensor lines of the DCSD array are used to accumulate the results of the multiply operation. Each such row output line is provided with a divide-by-two/accumulate CCD circuit which automatically compensates for the increasing value of the input vector element's bits from least significant bit to most significant bit. In a similar fashion each row output line can be provided with a multiply-by-two/accumulate CCD circuit which automatically accounts for the decreasing value of the input vector element's bits from most significant bit to least significant bit. The accumulated charge packet output of the array may be preferably converted to a digital signal compatible with the input vector configuration by utilizing a plurality of analog-to-digital converters.
摘要翻译：一种电荷域位串行矢量矩阵乘法器，用于实现光电神经网络和其他信号处理功能的混合数字/模拟信号的实时信号处理。 CCD和DCSD阵列的组合允许在一平方厘米芯片上以每秒1011次乘积累加的向量/矩阵乘法。本发明的CCD阵列部分用于加载和移动电荷包到DCSD阵列中以在其中进行处理。 CCD阵列也用于清空不需要的电荷的矩阵。 DCSD阵列被设计为存储表示各个矩阵值的多个电荷分组，例如神经网络的突触相互作用矩阵。向量被乘数可以位串行格式应用。 DCSD阵列的行或传感器线用于累加乘法运算的结果。每个这样的行输出线被提供有二分频/累积CCD电路，其自动补偿从最低有效位到最高有效位的输入向量元素的比特的增加值。以类似的方式，每行输出线可以被提供有乘以二/累积的CCD电路，其自动地将输入向量元素的位的值从最高有效位到最低有效位解算。通过利用多个模数转换器，阵列的累积电荷分组输出可以优选地被转换成与输入矢量配置兼容的数字信号。

27. 发明授权

US5258759A Method and apparatus for monotonic algorithmic digital-to-analog and analog-to-digital conversion 失效
标题翻译：用于单调算法数字到模拟和模数转换的方法和装置
公开(公告)号：US5258759A
公开(公告)日：1993-11-02
申请号：US962451
申请日：1992-10-16
申请人： Gert Cauwenberghs , Amnon Yariv
发明人： Gert Cauwenberghs , Amnon Yariv
IPC分类号： G11C11/56 , G11C27/00 , G11C27/02 , H03M1/46 , H03M1/66 , H03M1/12
CPC分类号： G11C16/3418 , G11C11/565 , G11C16/3431 , G11C27/00 , G11C27/024 , H03M1/464 , H03M1/664 , G11C7/16
摘要： The present invention provides a compact and robust architecture and a corresponding method to implement a monotonic algorithmic D/A converter that processes the bits of the digital input in the order from MSB to LSB, and a successive approximation A/D converter employing the intermediate conversion results of this D/A converter. The invention is aimed at applications requiring a dense integration in general VLSI technologies of multiple D/A and A/D converters, where individual trimming of components to compensate for component offsets and mismatches is virtually impossible. The architecture comprises four charge holding components, one switch for charge sharing, two bi-directional replication elements for charge storage and recall, and one comparator. Also described is an efficient way of performing pseudo-logarithmic compression of conversion values merely by adjusting the relative sizes of two of the charge holding components.
摘要翻译：本发明提供了一种紧凑且坚固的架构和相应的方法来实现以从MSB到LSB的顺序处理数字输入的比特的单调算法D / A转换器，以及采用中间转换的逐次逼近A / D转换器该D / A转换器的结果。本发明的目的是要求在多个D / A和A / D转换器的通用VLSI技术中进行密集集成的应用，其中单独修整组件以补偿组件偏移和错配实际上是不可能的。该架构包括四个电荷保持组件，一个电荷共享开关，两个用于电荷存储和调用的双向复制元件，以及一个比较器。还描述了仅通过调整两个电荷保持组件的相对尺寸来执行转换值的伪对数压缩的有效方式。

28. 发明授权

US5008833A Parallel optoelectronic neural network processors 失效
标题翻译：平行光电神经网络处理器
公开(公告)号：US5008833A
公开(公告)日：1991-04-16
申请号：US495781
申请日：1990-03-19
申请人： Aharon J. Agranat , Charles F. Neugebauer , Amnon Yariv
发明人： Aharon J. Agranat , Charles F. Neugebauer , Amnon Yariv
IPC分类号： G06N3/063 , G06N3/067
CPC分类号： G06N3/0675 , G06N3/063
摘要： Several embodiments of neural processors implemented on a VLSI circuit chip are disclosed, all of which are capable of entering a matrix T into an array of photosensitive devices which may be charge coupled or charge injection devices (CCD or CID). Using CCD's to receive and store the synapses of the matrix T from a spatial light modulator, or other optical means of projecting an array of pixels, semiparallel synchronous operation is achieved. Using CID's, full parallel synchronous operation is achieved. And using phototransistors to receive the array of pixels, full parallel and asynchronous operation is achieved. In the latter case, the source of the pixel matrix must provide the memory necessary for the matrix T. In the other cases, the source of the pixel matrix may be turned off after the matrix T has been entered and stored by the CCD's or CID's.
摘要翻译：公开了在VLSI电路芯片上实现的神经处理器的几个实施例，所有这些实施例都能够将矩阵T输入到可以是电荷耦合或电荷注入装置（CCD或CID）的光敏器件的阵列中。使用CCD从空间光调制器或投影像素阵列的其他光学装置接收和存储矩阵T的突触，实现了半平行同步操作。使用CID，实现了全并行同步操作。并且使用光电晶体管接收像素阵列，实现完全并行和异步操作。在后一种情况下，像素矩阵的源必须提供矩阵T所需的存储器。在其他情况下，可以在矩阵T被输入并被CCD或CID的存储器。

29. 发明授权

US4674096A Lateral coupled cavity semiconductor laser 失效
标题翻译：侧面耦合腔半导体激光器
公开(公告)号：US4674096A
公开(公告)日：1987-06-16
申请号：US707672
申请日：1985-03-04
申请人： Joseph Salzman , Robert J. Lang , Amnon Yariv
发明人： Joseph Salzman , Robert J. Lang , Amnon Yariv
IPC分类号： G02F3/02 , H01S5/062 , H01S5/10 , H01S5/40 , H01S3/08 , H01S3/10
CPC分类号： G02F3/026 , H01S5/4031 , H01S5/0622 , H01S5/1021 , H01S5/1039 , H01S5/4068
摘要： Two or more parallel waveguide lasers of different effective length are coupled together by their evanescent waves such that the composite structure functions as a single cavity having a longitudinal mode with resonances related to the resonances of the separate cavities. A very strong selection of the composite operating frequency, and suppression of most or all of the other longitudinal modes, with frequency tuning of the composite structure (both continuously and by mode hopping), can be accomplished by varying the relative currents supplied to each laser. Upon holding one cavity at one current level for a selected operating point and shifting the other, bistable operation can be achieved.
摘要翻译：两个或更多个不同有效长度的平行波导激光器通过它们的ev逝波耦合在一起，使得复合结构用作具有与分离腔的谐振相关的谐振的纵向模式的单个腔。通过对复合结构进行频率调谐（连续和通过跳跃模式），可以通过改变提供给每个激光器的相对电流来实现复合工作频率的非常强的选择以及抑制大多数或所有其它纵向模式。在为所选择的操作点保持一个电流水平的一个腔并且移动另一个时，可以实现双稳态操作。

30. 发明授权

US4513423A Arrangement for damping the resonance in a laser diode 失效
标题翻译：用于阻尼激光二极管谐振的布置
公开(公告)号：US4513423A
公开(公告)日：1985-04-23
申请号：US385220
申请日：1982-06-04
申请人： Joseph Katz , Amnon Yariv , Shlomo Margalit
发明人： Joseph Katz , Amnon Yariv , Shlomo Margalit
IPC分类号： H01S5/042 , H01S5/062 , H01S5/227 , H01S3/19
CPC分类号： H01S5/227 , H01S5/0422 , H01S5/06203 , H01S5/2275
摘要： An arrangement for damping the resonance in a laser diode includes an additional layer (25) which together with the conventional laser diode form a structure (35) of a bipolar transistor. Therein, the additional layer serves as the collector, the cladding layer (12) next to it as the base, and the active region (11) and the other cladding layer (13) as the emitter. A capacitor (30) is connected across the base and the collector. It is chosen so that at any frequency above a certain selected frequency (f.sub.c) which is far below the resonance frequency (f.sub.res) the capacitor impedance is very low, effectively shorting the base to the collector.
摘要翻译：用于阻尼激光二极管中的谐振的装置包括与传统激光二极管一起形成双极晶体管的结构（35）的附加层（25）。其中，附加层用作集电体，其旁边的包层（12）作为基极，有源区（11）和另一覆层（13）作为发射极。电容器（30）跨越基极和集电极连接。这被选择为使得在远低于谐振频率（fres）的某一选定频率（fc）之上的任何频率处，电容器阻抗非常低，从而有效地将基极短路到集电极。

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