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    • 22. 发明授权
    • Image forming apparatus
    • 图像形成装置
    • US5845185A
    • 1998-12-01
    • US792759
    • 1997-02-04
    • Hidekazu SakagamiHideo MatsudaOsamu FujimotoAtsushi IdeKazuyuki Ohnishi
    • Hidekazu SakagamiHideo MatsudaOsamu FujimotoAtsushi IdeKazuyuki Ohnishi
    • G03G15/16G03G15/14
    • G03G15/162
    • An intermediate transfer drum has at least a drum main body having a volume resistivity of 10.sup.4 to 10.sup.8 .OMEGA.cm, and an insulating layer provided on an outer surface of the drum main body. A first transfer voltage applying roller is provided inside the intermediate transfer drum so as to be opposite to a photosensitive drum and so as to be in contact with an inner surface of the intermediate transfer drum. A transfer roller is provided inside the intermediate transfer drum so as to be opposite to a second transfer grounded roller and so as to be in contact with the inner surface of the intermediate transfer drum. By thus arranging an image forming apparatus wherein image formation is carried out with respect to recording paper through the intermediate transfer drum, an optimal first transfer voltage can be applied from the photosensitive drum to the intermediate transfer drum, while an optimal second transfer voltage can be applied from the intermediate transfer drum to the recording medium. As a result, the first transfer and the second transfer are individually and simultaneously carried out. Furthermore, since the intermediate transfer drum does not become large in size, it is avoidable that the image forming apparatus becomes bulkier, while the lowering of the copying speed can also be suppressed.
    • 中间转印鼓至少具有体积电阻率为104-108欧姆·厘米的鼓主体,以及设置在鼓主体的外表面上的绝缘层。 第一转印电压施加辊设置在中间转印鼓内部,以与感光鼓相对并且与中间转印鼓的内表面接触。 转印辊设置在中间转印鼓内部,以便与第二转印接地辊相对并且与中间转印鼓的内表面接触。 通过这样布置图像形成装置,其中通过中间转印鼓相对于记录纸进行图像形成,可以将最佳的第一转印电压从感光鼓施加到中间转印鼓,而最佳的第二转印电压可以 从中间转印鼓施加到记录介质。 结果,第一次转印和第二次转印单独并且同时进行。 此外,由于中间转印鼓的尺寸不会变大,所以可以避免图像形成装置变得更大,同时也可以抑制复印速度的降低。
    • 24. 发明授权
    • Press-packed semiconductor device with lateral fixing member
    • 具有侧向固定构件的压制半导体器件
    • US4587550A
    • 1986-05-06
    • US637336
    • 1984-08-03
    • Hideo Matsuda
    • Hideo Matsuda
    • H01L21/52H01L23/051H01L23/48H01L23/36H01L23/10
    • H01L24/72H01L23/051H01L2924/01005H01L2924/01013H01L2924/01033H01L2924/01042H01L2924/01074H01L2924/01079H01L2924/01082
    • A press-packed semiconductor device in which means for positioning and fixing a semiconductor element with respect to an electrode disk member is improved. In a press-packed semiconductor device, a semiconductor element is press-held between a pair of electrode disk members via heat buffer plates. According to this invention, a fixing member made of electrical insulating material is provided on the peripheral portions of at least one of main surfaces of a semiconductor substrate of the semiconductor element. The inner periphery of the fixing member is formed so as to substantially contact the outer periphery of at least one of the heat buffer plate. This contact provides a reliable and easy positioning and lateral fixing of the semiconductor element against the heat buffer plate. Accordingly, to braze the electrode to the heat buffer plate of the semiconductor device becomes unnecessary.
    • 一种压电半导体器件,其中相对于电极盘部件定位和固定半导体元件的装置得到改善。 在压制半导体器件中,通过热缓冲板将半导体元件压入一对电极盘部件之间。 根据本发明,在半导体元件的半导体衬底的至少一个主表面的周边部分上设置由电绝缘材料制成的固定部件。 固定构件的内周形成为与至少一个热缓冲板的外周基本接触。 该接触提供半导体元件抵靠热缓冲板的可靠且容易的定位和横向固定。 因此,不需要将电极钎焊到半导体器件的缓冲板。
    • 25. 发明授权
    • Constant voltage output circuit
    • 恒压输出电路
    • US07675725B2
    • 2010-03-09
    • US11934598
    • 2007-11-02
    • Hideo Matsuda
    • Hideo Matsuda
    • H02H3/20
    • G05F1/56G05F1/569
    • A constant voltage output circuit has an output power transistor supplied with electric power form a first input power source and a control circuit supplied with electric power from a second input power source. Here, when the voltage from the first input power source is equal to or higher than a predetermined level Va, an overcurrent protection circuit and a short-circuiting protection circuit operate. Furthermore, yet another protection circuit is provided that operates even when the voltage from the first input power source is lower than the predetermined level Va.
    • 恒定电压输出电路具有由第一输入电源供给电力的输出功率晶体管和从第二输入电源供给电力的控制电路。 这里,当来自第一输入电源的电压等于或高于预定电平Va时,过电流保护电路和短路保护电路工作。 此外,还提供另一保护电路,即使当来自第一输入电源的电压低于预定电平Va时也是这样。
    • 26. 发明授权
    • Light beam synchronization detector and printer
    • 光束同步检测器和打印机
    • US07518626B2
    • 2009-04-14
    • US10963812
    • 2004-10-14
    • Hideo Matsuda
    • Hideo Matsuda
    • B41J2/435
    • G06K15/1219
    • In this light beam synchronization detector, an enable circuit 34 outputs a first control signal Se1 to an output circuit 35 when at least one of the absolute values of a voltage signal V1 from a first amplifier 31 and a voltage signal V2 from a second amplifier 32 exceeds the absolute value of a threshold voltage −Vth, thereby putting the output circuit 35 into an operative state. The enable circuit 34 outputs a second control signal Se2 to the output circuit 35 when both the absolute values of the first output voltage V1 and the second output voltage V2 are equal to or lower than the absolute value of the threshold voltage −Vth, thereby putting the output circuit 35 into an inoperative state. This light beam synchronization detector can prevent the occurrence of an error in the detection timing of a light beam due to a change in the quantity of light of the light beam and preventing the occurrence of erroneous detection due to reflected light.
    • 在该光束同步检测器中,当来自第一放大器31的电压信号V1的绝对值和来自第二放大器32的电压信号V2的绝对值中的至少一个时,使能电路34将第一控制信号Se1输出到输出电路35 超过阈值电压-Vth的绝对值,从而使输出电路35进入工作状态。 当第一输出电压V1和第二输出电压V2的绝对值均等于或低于阈值电压-Vth的绝对值时,使能电路34将第二控制信号Se2输出到输出电路35,由此将 输出电路35成为不工作状态。 该光束同步检测器可以防止由于光束的光量的变化引起的光束的检测定时中的误差的发生,并且防止由反射光引起的错误检测的发生。
    • 27. 发明授权
    • Semiconductor device having two insulated gates and capable of thyristor
function and method for operating the same
    • 具有两个绝缘栅极并具有晶闸管功能的半导体器件及其操作方法
    • US5608238A
    • 1997-03-04
    • US544918
    • 1995-10-18
    • Hideo Matsuda
    • Hideo Matsuda
    • H01L29/74H01L29/10H01L29/739H01L29/745H01L29/749H01L29/78H01L31/111
    • H01L29/7395H01L29/1095H01L29/7455H01L29/749
    • A semiconductor device and a method for operating the same includes a first P-type semiconductor layer and a first N-type semiconductor layer provided thereon. A plurality of second P-type semiconductor layers and a plurality of third P-type semiconductor layers are formed on the surface of the first N-type semiconductor layer. A plurality of second N-type semiconductor layers are formed on their respective surfaces of the third P-type semiconductor layers. Emitter electrodes are provided on the second P-type semiconductor layers and second N-type semiconductor layers. A plurality of first gate electrodes is each provided above the first N-type semiconductor layer between the adjacent third P-type semiconductor layers. A plurality of second gate electrodes are each provided above the first N-type semi-conductor layer between the second P-type semiconductor layer and the third P-type semiconductor layer. A collector electrode is provided under the first P-type semiconductor layer. If the timing at which a bias is applied to the first gate electrodes and second gate electrodes is controlled, an operation mode in which the device serves as a thyristor and an operation mode in which the device serves as an IGBT can be switched to each other. Therefore, the semiconductor device, which can be turned on/turned off, is capable of being turned off at high speed when an on-state voltage is low.
    • 半导体器件及其操作方法包括第一P型半导体层和设置在其上的第一N型半导体层。 在第一N型半导体层的表面上形成有多个第二P型半导体层和多个第三P型半导体层。 在第三P型半导体层的各自表面上形成有多个第二N型半导体层。 发射极设置在第二P型半导体层和第二N型半导体层上。 多个第一栅电极分别设置在相邻的第三P型半导体层之间的第一N型半导体层的上方。 在第二P型半导体层和第三P型半导体层之间的第一N型半导体层的上方分别设置有多个第二栅电极。 集电极设置在第一P型半导体层的下方。 如果对第一栅电极和第二栅极施加偏压的定时,则可以将器件用作晶闸管的操作模式和器件用作IGBT的操作模式彼此切换 。 因此,当导通状态电压低时,能够接通/关断的半导体器件能够高速关断。