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21. 发明授权

US07598588B2 Semiconductor structure and method of manufacture 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US07598588B2
公开(公告)日：2009-10-06
申请号：US11925457
申请日：2007-10-26
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L23/66
CPC分类号： H01L21/76232 , H01L21/76229 , H01L21/764 , H01L23/66 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/371 , H01L2224/37599 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/49175 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures, wherein the plurality of rectilinear structures comprise silicon dioxide and extend from a surface of a semiconductor material to a distance of at least about three microns or greater below the surface of the semiconductor material and wherein a first rectilinear structure of the plurality of rectilinear structures is perpendicular to, or substantially perpendicular to, a second rectilinear structure of the plurality of rectilinear structures. Other embodiments are described and claimed.
摘要翻译：在各种实施例中，公开了制造这些结构的半导体结构和方法。在一个实施例中，半导体器件包括多个直线结构，其中多个直线结构包括二氧化硅并且从半导体材料的表面延伸到半导体材料的表面以下至少约三微米或更大的距离并且其中所述多个直线结构的第一直线结构垂直于所述多个直线结构的第二直线结构或基本垂直于所述多个直线结构的第二直线结构。描述和要求保护其他实施例。

22. 发明申请

US20090108392A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20090108392A1
公开(公告)日：2009-04-30
申请号：US11925457
申请日：2007-10-26
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L23/66
CPC分类号： H01L21/76232 , H01L21/76229 , H01L21/764 , H01L23/66 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/371 , H01L2224/37599 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/49175 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures, wherein the plurality of rectilinear structures comprise silicon dioxide and extend from a surface of a semiconductor material to a distance of at least about three microns or greater below the surface of the semiconductor material and wherein a first rectilinear structure of the plurality of rectilinear structures is perpendicular to, or substantially perpendicular to, a second rectilinear structure of the plurality of rectilinear structures. Other embodiments are described and claimed.
摘要翻译：在各种实施例中，公开了制造这些结构的半导体结构和方法。在一个实施例中，半导体器件包括多个直线结构，其中多个直线结构包括二氧化硅并且从半导体材料的表面延伸到半导体材料的表面以下至少约三微米或更大的距离并且其中所述多个直线结构的第一直线结构垂直于所述多个直线结构的第二直线结构或基本垂直于所述多个直线结构的第二直线结构。描述和要求保护其他实施例。

23. 发明授权

US06617252B2 Monolithic low dielectric constant platform for passive components and method 有权
公开(公告)号：US06617252B2
公开(公告)日：2003-09-09
申请号：US09933314
申请日：2001-08-20
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L21302
CPC分类号： H01L21/764 , H01L23/5227 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a low dielectric constant insulator in a monolithic substrate and the dielectric formed by the method. The method includes formation and patterning of a mask on a silicon substrate followed by anisotropic etching of the silicon to provide a dense array of deep holes. Isotropic etching may be used to form a cavity beneath the dense array of holes and coupling to bottoms of the holes. Sides of the holes are then thermally oxidized. A conventional dielectric is then formed, sealing tops of the holes. The conventional dielectric is optionally densified. Conventional chemical-mechanical polishing then planarizes the dielectric and further conventional processing may be carried out on the wafer to form active circuitry together with passive components such as high Q inductors.

24. 发明授权

US06512283B2 Monolithic low dielectric constant platform for passive components and method 失效
公开(公告)号：US06512283B2
公开(公告)日：2003-01-28
申请号：US09965991
申请日：2001-09-28
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L2900
CPC分类号： H01L21/764 , H01L23/5227 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a low dielectric constant insulator in a monolithic substrate and the dielectric formed by the method. The method includes formation and patterning of a mask on a silicon substrate followed by anisotropic etching of the silicon to provide a dense array of deep holes. Isotropic etching may be used to form a cavity beneath the dense array of holes and coupling to bottoms of the holes. Sides of the holes are then thermally oxidized. A conventional dielectric is then formed, sealing tops of the holes. The conventional dielectric is optionally densified. Conventional chemical-mechanical polishing then planarizes the dielectric and further conventional processing may be carried out on the wafer to form active circuitry together with passive components such as high Q inductors.

25. 发明授权

US06308609B1 Suppressor 有权
标题翻译：抑制器
公开(公告)号：US06308609B1
公开(公告)日：2001-10-30
申请号：US09207498
申请日：1998-12-08
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： F41A2130
CPC分类号： F41A21/30
摘要： A method and an apparatus for suppressing muzzle blast and/or muzzle crack in a weapon. An apparatus for reducing muzzle blast upon discharge of one or more projectiles from a gun includes an outer shell and a first end cap adapted to be secured to a muzzle of a weapon and including provisions for detachably coupling to a first end of the outer shell. The apparatus further includes a second end cap adapted to be secured to a distal end of the outer shell and a plurality of baffles disposed between the first end cap and the second end cap. The plurality of baffles each comprise a bore section having an inner diameter no smaller than a bore of the muzzle and a baffle section coupled to the bore section, the baffle section extending from the bore section to the outer shell.
摘要翻译：一种用于抑制武器中的枪口爆裂和/或枪口裂纹的方法和装置。一种用于在从枪射出一个或多个射弹时减少枪口爆炸的装置包括外壳和适于固定在武器枪口上的第一端帽，并且包括用于可拆卸地联接到外壳的第一端的装置。该装置还包括适于固定到外壳的远端的第二端盖和设置在第一端盖和第二端盖之间的多个挡板。所述多个挡板各自包括具有不小于所述枪口孔径的内径的孔部分和连接到所述孔部分的挡板部分，所述挡板部分从所述孔部分延伸到所述外壳。

26. 发明授权

US06307247B1 Monolithic low dielectric constant platform for passive components and method 有权
标题翻译：无源元件的单片低介电常数平台和方法
公开(公告)号：US06307247B1
公开(公告)日：2001-10-23
申请号：US09351714
申请日：1999-07-12
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L2900
CPC分类号： H01L21/764 , H01L23/5227 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a low dielectric constant insulator in a monolithic substrate and the dielectric formed by a method. The method includes formation and patterning of a mask on a silicon substrate followed by anisotropic etching of the silicon to provide a dense array of deep holes. Isotropic etching may be used to form a cavity beneath the dense array of holes and coupling to bottoms of the holes. Sides of the holes are then thermally oxidized. A conventional dielectric is then formed, sealing tops of the holes. The conventional dielectric is optionally densified. Conventional chemical-mechanical polishing then planarizes the dielectric and further conventional processing may be carried out on the wafer to form active circuitry together with passive components such as high Q inductors.
摘要翻译：一种用于在单片基板中形成低介电常数绝缘体的方法和通过一种方法形成的电介质。该方法包括在硅衬底上形成和图案化掩模，然后对硅进行各向异性蚀刻以提供致密的深孔阵列。可以使用各向同性蚀刻来形成孔密集阵列下方的空腔并与孔的底部相连。然后将孔的各个部分热氧化。然后形成常规电介质，密封孔的顶部。常规电介质可选地被致密化。常规的化学机械抛光然后使电介质平坦化，并且可以在晶片上进行进一步的常规处理，以与诸如高Q电感器的无源部件一起形成有源电路。

27. 发明授权

US06257147B1 Frangible shotshell 有权
标题翻译：易碎的镜头
公开(公告)号：US06257147B1
公开(公告)日：2001-07-10
申请号：US09305348
申请日：1999-05-03
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： F42B1256
CPC分类号： F42B7/04 , F41A21/30
摘要： A method and an apparatus for suppressing muzzle blast, muzzle crack and/or over penetration in a weapon. A frangible shotshell payload comprising a cup having a portion divided into petals, a payload having a mass disposed in the cup and a cap disposed at, and melted into, tips of the petals. The frangible shotshell may include a cup or wad formed from high density polyethylene. The cap may be formed from a disc of low density polyethylene having a diameter of 0.625″.
摘要翻译：一种用于抑制枪口爆炸，枪口裂缝和/或武器穿透过度的方法和装置。一种易碎的镜头有效载荷，包括具有分为花瓣的部分的杯子，具有设置在杯子中的质量的有效载荷和设置在瓣部的顶部并熔化成瓣部的帽子。易碎的外壳可以包括由高密度聚乙烯形成的杯子或瓦子。盖可以由直径为0.625“的低密度聚乙烯盘形成。

28. 发明授权

US08530963B2 Power semiconductor device and method therefor 有权
公开(公告)号：US08530963B2
公开(公告)日：2013-09-10
申请号：US11387209
申请日：2006-03-23
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L29/78
CPC分类号： H01L29/7811 , H01L21/2815 , H01L21/76224 , H01L29/0657 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/41766 , H01L29/42372 , H01L29/42376 , H01L29/4238 , H01L29/66719 , H01L29/66727 , H01L2224/05554 , H01L2224/48091 , H01L2924/1305 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a second electrode interconnection region overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform is used as an edge termination of an epitaxial layer to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.

29. 发明授权

US08230634B1 Two piece upper receiver for firearms 失效
标题翻译：两件火器上接收器
公开(公告)号：US08230634B1
公开(公告)日：2012-07-31
申请号：US13105893
申请日：2011-05-12
申请人： Robert Bruce Davies , Robert Lynch Hogan
发明人： Robert Bruce Davies , Robert Lynch Hogan
IPC分类号： F41A21/00 , F41A21/48
CPC分类号： F41A3/66 , F41C23/16 , F41G11/003
摘要： A two piece upper receiver for a firearm including a first piece having a front end, a rear end, a top, and a bottom, the first piece constructed to operatively carry a bolt carrier and bolt, and to have a barrel coupled to the front end. The bottom is constructed to have a lower receiver coupled thereto. The first piece includes a backbone extending along the top between the front end and the rear end, the back bone having upwardly directed indexing surfaces. A second piece overlies the backbone and includes mating surfaces engaging the indexing surfaces, aligning the second piece with the first piece. A receiving structure is opposite the mating surfaces for receiving accessory devices mounted thereon. Fasteners fixedly attach the second piece to the first piece to form a complete upper receiver.
摘要翻译：一种用于枪械的两件式上接收器，包括具有前端，后端，顶部和底部的第一件，第一件构造成可操作地承载螺栓承载件和螺栓，并且具有联接到前部的筒结束。底部构造成具有与其耦合的较低的接收器。第一件包括沿着前端和后端之间的顶部延伸的骨架，后骨具有向上指向的分度表面。第二件覆盖在骨架上并包括与分度表面接合的配合表面，使第二件与第一件对准。接收结构与配合表面相对，用于接收安装在其上的附件装置。紧固件将第二件固定在第一件上以形成一个完整的上部接收器。

30. 发明授权

US08022485B2 Transistor structure having reduced input capacitance 有权
标题翻译：具有降低的输入电容的晶体管结构
公开(公告)号：US08022485B2
公开(公告)日：2011-09-20
申请号：US12248816
申请日：2008-10-09
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L27/088
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/41766 , H01L29/42376 , H01L29/66727 , H01L29/7811
摘要： A semiconductor device having reduced input capacitance is disclosed. The semiconductor device includes a pedestal region having a gate overlying a sidewall of the pedestal region and gate interconnect overlying a major surface of the pedestal region. The pedestal region includes a conductive shield layer (260). The conductive shield layer (260) is isolated from the gate of the transistor by more than one dielectric layer (330, 340, and 350) to reduce input capacitance. The pedestal region includes an air gap region (1525) to further lower the dielectric constant of the pedestal region between the gate/gate interconnect and the conductive shield layer (260).
摘要翻译：公开了具有降低的输入电容的半导体器件。半导体器件包括具有覆盖基座区域的侧壁的栅极和覆盖基座区域的主表面的栅极互连的基座区域。基座区域包括导电屏蔽层（260）。导电屏蔽层（260）通过多于一个的介电层（330,340和350）与晶体管的栅极隔离以减小输入电容。基座区域包括气隙区域（1525），以进一步降低栅极/栅极互连和导电屏蔽层（260）之间的基座区域的介电常数。

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