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    • 24. 发明授权
    • Devices, methods, systems and software products for coordination of computer main microprocessor and second microprocessor coupled thereto
    • 用于协调计算机主微处理器和与其耦合的第二微处理器的装置,方法,系统和软件产品
    • US06179489B2
    • 2001-01-30
    • US08833267
    • 1997-04-04
    • John Ling Wing SoJeffrey L. KerrSteven R. MageeJun Tang
    • John Ling Wing SoJeffrey L. KerrSteven R. MageeJun Tang
    • G06F1300
    • G06F9/5044G06F9/544G06F9/545G06F2209/509
    • A process is provided for operating a computer system (100) having a storage holding an operating system (OS) and an application program (APP.exe) and a third program (VSP Kernel), a first processor (106) having an instruction set, and a second processor (1730) having a different instruction set. The process includes a first step of running the first processor (106) to determine whether a part of the application shall be run on the first processor or the second processor and then establishing a second processor object (VSP OBJECT1) if said part shall be run on the second processor and the first processor (106) sending a message that the second processor (1730) is to run said at least part of the application program. The third program establishes message handling functions and bus masters data transfer operations for the second processor between the host running the operating system and the second processor running the third program. The process concurrently runs the second processor to perform operations defined by the third program, including to access memory to detect the message that the second processor is to run said at least part of the application program, and runs the second processor (1730) to access the second processor object and thereby determine operations for the second processor to access second processor instructions for said part of the application program and data to be processed according to said second processor instructions.
    • 提供一种用于操作具有存储操作系统(OS)和应用程序(APP.exe)和第三程序(VSP内核)的存储器的计算机系统(100)的过程,具有指令集的第一处理器(106) ,以及具有不同指令集的第二处理器(1730)。 该过程包括运行第一处理器(106)以确定应用程序的一部分是否应在第一处理器或第二处理器上运行并且然后建立第二处理器对象(VSP OBJECT1)的第一步骤,如果所述部分将被运行 在第二处理器和第一处理器(106)上发送第二处理器(1730)要运行所述应用程序的至少一部分的消息。 第三程序在运行操作系统的主机和运行第三程序的第二处理器之间建立第二处理器的消息处理功能和总线主机数据传输操作。 该过程同时运行第二处理器以执行由第三程序定义的操作,包括访问存储器以检测第二处理器要运行所述应用程序的至少一部分的消息,并运行第二处理器(1730)以访问 第二处理器对象,从而确定第二处理器根据所述第二处理器指令访问应用程序的所述部分的第二处理器指令和要处理的数据的操作。
    • 27. 发明授权
    • Card edge connector with an improved retainer
    • 卡边连接器带有改进的保持架
    • US08235738B2
    • 2012-08-07
    • US12842051
    • 2010-07-23
    • Zhuang-Xing LiZe-Lin YaoWen-Jun Tang
    • Zhuang-Xing LiZe-Lin YaoWen-Jun Tang
    • H01R13/62
    • H01R13/639H01R12/721H05K7/1404
    • A card edge connector for mating with an electronic card includes an elongated housing (1), a number of contacts retained to the housing (1), and a retainer (2) at one end of the housing (1). The housing (1) has a pair of opposed side walls (11), a central slot (12) between the side walls and a fitting section at one end thereof. The fitting section defines a pair of axes holes (145). The retainer (2) has a base portion (21) with a pair of pivots (211) engaging with the axes holes (145), a latch projection (22) inwardly extending from the base portion for locking the electronic card, a flexible arm (23) unitarily extending from the base portion (21) to resist an inner wall of the fitting section for fastening the retainer (2) to the housing (1).
    • 用于与电子卡匹配的卡边缘连接器包括细长壳体(1),保持在壳体(1)上的多个触点以及在壳体(1)的一端的保持器(2)。 壳体(1)具有一对相对的侧壁(11),在侧壁之间的中心狭槽(12)和在其一端的配合部分。 装配部分限定一对轴孔(145)。 所述保持器(2)具有基部(21),其具有与所述轴孔(145)接合的一对枢轴(211),从所述基部向内延伸以锁定所述电子卡的闩锁突起(22) (23)从所述基部(21)整体延伸以抵抗所述装配部分的内壁,用于将所述保持器(2)紧固到所述壳体(1)。
    • 28. 发明授权
    • Method and system for processing multicast packets
    • 处理组播数据包的方法和系统
    • US07940764B2
    • 2011-05-10
    • US10567001
    • 2004-08-12
    • Yongxiang HanWei ShaoJian DouHang YuanJun Tang
    • Yongxiang HanWei ShaoJian DouHang YuanJun Tang
    • H04L12/56
    • H04L49/201H04L12/18
    • Provided are a method, system, and program for processing multicast packets. A multicast packet is received to transmit to destination addresses. A payload of the multicast packet is written to at least one packet entry in a packet memory. Headers are generated for the destination addresses and at least one descriptor is generated addressing the at least one packet entry in the packet memory including the payload to transmit to the destination addresses. For each destination address, at least one indicator is generated including information on the generated header for the destination address and the at least one descriptor, wherein indicators for the destination addresses address the at least one descriptor.
    • 提供了一种用于处理组播数据包的方法,系统和程序。 接收到组播数据包以发送到目的地址。 组播分组的有效载荷被写入分组存储器中的至少一个分组条目。 针对目的地地址生成标题,并且生成至少一个描述符,寻址包含有效载荷的分组存储器中的至少一个分组条目以发送到目的地址。 对于每个目的地地址,生成至少一个指示符,包括关于目的地地址的所生成的报头和至少一个描述符的信息,其中目的地地址的指示符寻址至少一个描述符。
    • 30. 发明授权
    • Card edge connector having an improved spacer
    • 具有改进间隔物的卡缘连接器
    • US07828560B2
    • 2010-11-09
    • US12535848
    • 2009-08-05
    • Ren-Fu WuWen-Jun TangZhuang-Xing Li
    • Ren-Fu WuWen-Jun TangZhuang-Xing Li
    • H01R12/00
    • H01R12/721
    • A card edge connector (100) includes an insulative housing (1) having a pair of side walls (10) with a central slot (11) formed therebetween, a set of terminals (5) including first terminals (51) and second terminals (52) and a spacer (3). Each side wall has a set of passageways (12). Each first terminal has a first contacting portion (511) protruding into the central slot, a first tail portion (513) mounted on a PCB, and a first connecting portion (512). The first connecting portions and the first tail portions are arranged in two rows. Each second terminal has a second contacting portion (521) protruding into the central slot, a second tail portion (523) mounted on the PCB, and a second connecting portion (522). The second connecting portions and the second tail portions are arranged in another two rows. The spacer (3) has a set of first protrusions (31) and forms a plurality of first grooves (32) located between each two adjacent first protrusions. The first protrusions each has a second groove (33) formed thereon. The spacer defines a set of second protrusions (34) and forms a plurality of third grooves (35) located between each two adjacent second protrusions (34). The second protrusions each has a fourth groove (36) formed thereon.
    • 卡边缘连接器(100)包括具有一对侧壁(10)的绝缘壳体(1),其中形成有中间狭槽(11),一组端子(5)包括第一端子(51)和第二端子 52)和间隔件(3)。 每个侧壁具有一组通道(12)。 每个第一端子具有突出到中心狭槽中的第一接触部分(511),安装在PCB上的第一尾部(513)和第一连接部分(512)。 第一连接部分和第一尾部部分布置成两排。 每个第二端子具有突出到中心狭槽中的第二接触部分(521),安装在PCB上的第二尾部(523)和第二连接部分(522)。 第二连接部分和第二尾部部分布置成另外两排。 间隔件(3)具有一组第一突起(31)并形成位于每个相邻的第二突起之间的多个第一槽(32)。 第一突起各自具有形成在其上的第二凹槽(33)。 间隔件限定一组第二突起(34),并形成位于每两个相邻的第二突起(34)之间的多个第三凹槽(35)。 第二突起各自具有形成在其上的第四凹槽(36)。