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11. 发明授权

US4360785A Transistor amplifiers exhibiting low input offset potentials 失效
标题翻译：具有低输入失调电位的晶体管放大器
公开(公告)号：US4360785A
公开(公告)日：1982-11-23
申请号：US153627
申请日：1980-05-27
申请人： Otto H. Schade, Jr.
发明人： Otto H. Schade, Jr.
IPC分类号： H03F3/45
CPC分类号： H03F3/4508 , H03F3/45183 , H03F3/45735 , H03F3/45744 , H03F3/45748 , H03F3/45766 , H03F2203/45214 , H03F2203/45342
摘要： The input offset potential of a transistor amplifier exhibited by a grounded-emitter bipolar transistor or a grounded source enhancement-mode field effect transistor can be too large for certain applications. A preceding differential-input amplifier overcomes this problem.
摘要翻译：接地 - 发射极双极晶体管或接地源增强型场效应晶体管所呈现的晶体管放大器的输入失调电位对于某些应用来说可能太大。前面的差分输入放大器克服了这个问题。

12. 发明专利

JP2008141356A Differential amplifier circuit 审中-公开
标题翻译：差分放大器电路
公开(公告)号：JP2008141356A
公开(公告)日：2008-06-19
申请号：JP2006324016
申请日：2006-11-30
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： KURIHARA SHINJI
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F3/45735 , H03F2203/45122 , H03F2203/45302
摘要： PROBLEM TO BE SOLVED: To allow stable differential amplification independently of an input voltage level.
SOLUTION: A differential amplifier circuit includes: a first transistor which has an electrode on one side, which generates a threshold voltage between the electrode itself and a control voltage, connected to a first constant current source and has an electrode on the other side connected to a second constant current source and has a first input voltage applied to the control electrode thereof; a second transistor which has an electrode on one side, which generates a threshold voltage between the electrode itself and a control voltage, connected to the first constant current source and has an electrode on the other side connected to a third constant current source and has a second input voltage applied to the control electrode thereof; and a third transistor which has an electrode on one side, which generates a threshold voltage between the electrode itself and a control voltage, connected to the electrode on the other side of the first or second transistor. A voltage corresponding to voltages of electrodes on one sides of the first and second transistors is applied to the control electrode of the third transistor.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：允许独立于输入电压电平的稳定的差分放大。解决方案：差分放大器电路包括：第一晶体管，其在一侧具有电极，其在电极本身和控制电压之间产生阈值电压，连接到第一恒流源并且在另一侧上具有电极一侧连接到第二恒流源，并具有施加到其控制电极的第一输入电压; 第二晶体管，其在一侧具有电极，其在电极本身和控制电压之间产生阈值电压，连接到第一恒流源并且具有连接到第三恒流源的另一侧的电极，并且具有施加到其控制电极的第二输入电压; 以及第三晶体管，其在一侧具有电极，其在电极本身和控制电压之间产生阈值电压，连接到第一或第二晶体管的另一侧上的电极。对应于第一和第二晶体管一侧的电极电压的电压被施加到第三晶体管的控制电极。版权所有（C）2008，JPO＆INPIT

13. 发明专利

JP2010147992A Amplifier circuit and a/d converter 审中-公开
标题翻译：放大器电路和A / D转换器
公开(公告)号：JP2010147992A
公开(公告)日：2010-07-01
申请号：JP2008325466
申请日：2008-12-22
申请人： Toshiba Corp , 株式会社東芝
发明人： NOZAWA MAI , FURUTA MASANORI
IPC分类号： H03F1/22 , H03F3/45 , H03M1/44
CPC分类号： H03F1/223 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F3/45735 , H03F2200/249 , H03F2200/405 , H03F2200/414 , H03F2200/78 , H03F2203/45292 , H03F2203/45302 , H03F2203/45356 , H03F2203/45396 , H03F2203/45424 , H03F2203/45446 , H03F2203/45536 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45726 , H03F2203/45728 , H03M1/002 , H03M1/0682 , H03M1/164
摘要： PROBLEM TO BE SOLVED: To reduce a starting time and suppress an increase of electric power consumption.
SOLUTION: The amplifier circuit includes a current source 101 which is connected between a power-supply voltage Vdd and an output node Vy and goes on when a switching control signal has a first value or goes off when it has a second value, a grounded voltage control current source 104 for which an amount of current is controlled by an input voltage Vin, a cascode transistor 102 connected between the voltage control current source and the output node, a boost amplifier 103 connected between a gate electrode and a source electrode of the cascode transistor, and a switch SW13 which is connected between an output node of the boost amplifier and a bias voltage Vb and goes on for a predetermined time period along with a change of the value of the switching control signal from the second value to the first value to force the boost amplifier to start up.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了减少启动时间并抑制电力消耗的增加。解决方案：放大器电路包括连接在电源电压Vdd和输出节点Vy之间的电流源101，当切换控制信号具有第一值或当其具有第二值时，其断开，接地电压控制电流源104，其电流量由输入电压Vin，连接在电压控制电流源和输出节点之间的共源共栅晶体管102，连接在栅电极和源极之间的升压放大器103 并且连接在升压放大器的输出节点和偏置电压Vb之间的开关SW13，并且随着开关控制信号的值从第二值的变化而变化到预定时间段第一个值强制升压放大器启动。版权所有（C）2010，JPO＆INPIT

14. 发明授权

US07327189B2 Differential structure programmable gain instrumentation amplifier 有权
标题翻译：差分结构可编程增益仪表放大器
公开(公告)号：US07327189B2
公开(公告)日：2008-02-05
申请号：US11205691
申请日：2005-08-17
申请人： Christopher G. Regier
发明人： Christopher G. Regier
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45183 , H03F3/45197 , H03F3/45735 , H03F3/45744 , H03F2200/261 , H03F2203/45356 , H03F2203/45496
摘要： In one embodiment, a programmable gain instrumentation amplifier (PGIA) comprises a pair of current conveyors, each current conveyor having a respective sense node and a respective voltage input, with a gain-setting resistor coupled between the respective sense nodes, and current being sensed on both sides of the gain setting resistor. In one embodiment, each current conveyor comprises a corresponding operational amplifier (op-amp) having a non-inverting input configured as the respective voltage input that may receive a respective input voltage signal, an output and an inverting input, with a respective current conveying element, which may be a FET, configured in a feedback loop between the output and the inverting input. Each current conveyor may be configured to sense a corresponding current flowing through its respective FET, with the corresponding currents forming a differential output current of the PGIA. The respective input voltage signals received by the respective voltage inputs may form a differential input voltage of the PGIA. In one set of embodiments, the PGIA may be implemented with a differential voltage output, leading to an increased output swing for higher signal-to-noise ratio and increased symmetry for a higher common mode rejection ratio.
摘要翻译：在一个实施例中，可编程增益仪表放大器（PGIA）包括一对当前输送机，每个当前输送机具有相应的感测节点和相应的电压输入，其中增益设置电阻耦合在相应感测节点之间，并且电流被感测在增益设置电阻的两侧。在一个实施例中，每个当前的输送机包括相应的运算放大器（运算放大器），其具有被配置为相应的电压输入的非反相输入，其可以接收相应的输入电压信号，输出和反相输入，元件，其可以是在输出和反相输入之间的反馈环路中配置的FET。每个当前输送机可以被配置为感测流过其相应FET的对应电流，其中相应的电流形成PGIA的差分输出电流。由各个电压输入接收的各个输入电压信号可以形成PGIA的差分输入电压。在一组实施例中，PGIA可以用差分电压输出来实现，导致增加的输出摆幅以获得较高的信噪比和对于更高的共模抑制比的增加的对称性。

15. 发明授权

US07215200B1 High-linearity differential amplifier with flexible common-mode range 有权
标题翻译：具有灵活共模范围的高线性差分放大器
公开(公告)号：US07215200B1
公开(公告)日：2007-05-08
申请号：US11116427
申请日：2005-04-28
申请人： Max Wolff Hauser
发明人： Max Wolff Hauser
IPC分类号： H03F3/45
CPC分类号： H03F1/3211 , H03F3/45197 , H03F3/45735 , H03F2203/45356 , H03F2203/45702
摘要： An amplifier includes differential current sensing circuitry and an input bridge. Two paths of the input bridge receive the input signals and provide proportional current flows to the differential current sensing circuitry. The input bridge is configured to provide a differential offset voltage in one current path, and a complimentary voltage drop of equal magnitude in the other current path. In the examples, the input bridge includes a matched pair of transistors. To remove parallel incremental or small-signal conductance-related error sources, both transistors are operated at matched VDS (drain-to-source) voltages. The voltage offset, provided in association with one of the input transistors, serves to extend the range of certain circuits using the amplifier. The complimentary voltage drop in association with the other input transistor maintains the match of the VDS voltages for the two transistors.
摘要翻译：放大器包括差分电流检测电路和输入桥。输入桥的两条路径接收输入信号，并向差动电流检测电路提供成比例的电流。输入桥被配置为在一个电流路径中提供差分失调电压，并且在另一个电流路径中提供相等幅度的补偿电压降。在示例中，输入桥包括一对匹配的晶体管。为了去除并行增量或小信号电导相关的误差源，两个晶体管在匹配的V DS（漏 - 源）电压下工作。与一个输入晶体管相关联地提供的电压偏移用于使用放大器来扩展某些电路的范围。与另一个输入晶体管相关联的互补电压降保持两个晶体管的V SUB电压的匹配。

16. 发明申请

US20060145728A1 SYSTEM AND METHOD FOR HIGH FREQUENCY, HIGH OUTPUT SWING BUFFERS 失效
标题翻译：高频，高输出振荡缓冲器的系统和方法
公开(公告)号：US20060145728A1
公开(公告)日：2006-07-06
申请号：US11026372
申请日：2004-12-30
申请人： John Leete
发明人： John Leete
IPC分类号： H03K5/22
CPC分类号： H03L7/1978 , H03F3/191 , H03F3/45188 , H03F3/45735 , H03F2200/331 , H03F2203/45008 , H03F2203/45248 , H03F2203/45316 , H03F2203/45528 , H03F2203/45544 , H03F2203/45638 , H03K19/018578 , H03L7/0891 , H03L7/10
摘要： Methods and systems for increasing gain for an electric circuit are disclosed herein. Aspects of the method may comprise receiving an input differential signal at a first configured pair of transistors and a second configured pair of transistors. The first and second configured pair of transistors may be inductively loaded. The first configured pair of transistors may be self-biased via the inductive loading. DC current may be generated via the second configured pair of transistors. The first and/or the second configured pair of transistors may be configured as input transconductors. A pair of inductors may be configured for the inductive loading and the configured pair of inductors may be tapped for the self-biasing. If the first configured pair of transistors comprises NMOS transistors, then the second configured pair of transistors may comprise PMOS transistors.
摘要翻译：本文公开了用于增加电路增益的方法和系统。方法的方面可以包括在第一配置的晶体管对和第二配置的晶体管对接收输入差分信号。第一和第二配置的晶体管对可以被感应加载。第一配置的晶体管对可以经由电感负载自偏置。可以经由第二配置的晶体管对产生DC电流。第一和/或第二配置的晶体管对可以被配置为输入跨导体。可以将一对电感器配置为用于感性负载，并且可以对构造的一对电感器进行点击以进行自偏压。如果第一配置的晶体管对包括NMOS晶体管，则第二配置的晶体管对可以包括PMOS晶体管。

17. 发明授权

US07061279B1 System and method for high frequency, high output swing buffers 失效
标题翻译：高频，高输出摆幅缓冲器的系统和方法
公开(公告)号：US07061279B1
公开(公告)日：2006-06-13
申请号：US11026372
申请日：2004-12-30
申请人： John Leete
发明人： John Leete
IPC分类号： H03K5/22
CPC分类号： H03L7/1978 , H03F3/191 , H03F3/45188 , H03F3/45735 , H03F2200/331 , H03F2203/45008 , H03F2203/45248 , H03F2203/45316 , H03F2203/45528 , H03F2203/45544 , H03F2203/45638 , H03K19/018578 , H03L7/0891 , H03L7/10
摘要： Methods and systems for increasing gain for an electric circuit may include receiving an input differential signal at a first configured pair of transistors and a second configured pair of transistors. The first and second configured pair of transistors may be inductively loaded. The first configured pair of transistors may be self-biased via the inductive loading. DC current may be generated via the second configured pair of transistors. The first and/or the second configured pair of transistors may be configured as input transconductors. A pair of inductors may be configured for the inductive loading and the configured pair of inductors may be tapped for the self-biasing. If the first configured pair of transistors comprises NMOS transistors, then the second configured pair of transistors may comprise PMOS transistors.
摘要翻译：用于增加电路的增益的方法和系统可以包括在第一配置的晶体管对和第二配置的晶体管对接收输入差分信号。第一和第二配置的晶体管对可以被感应加载。第一配置的晶体管对可以经由电感负载自偏置。可以经由第二配置的晶体管对产生DC电流。第一和/或第二配置的晶体管对可以被配置为输入跨导体。可以将一对电感器配置为用于感性负载，并且可以对构造的一对电感器进行点击以进行自偏压。如果第一配置的晶体管对包括NMOS晶体管，则第二配置的晶体管对可以包括PMOS晶体管。

18. 发明申请

US20050227646A1 Detecting and maintaining linearity in a power amplifier system through comparing peak and RMS power levels 审中-公开
标题翻译：通过比较峰值和RMS功率电平，在功率放大器系统中检测和维持线性度
公开(公告)号：US20050227646A1
公开(公告)日：2005-10-13
申请号：US10803760
申请日：2004-03-18
申请人： Ryo Yamazaki , William Noellert , Stephen Pratt
发明人： Ryo Yamazaki , William Noellert , Stephen Pratt
IPC分类号： H03F3/45 , H03G3/00 , H03G3/30 , H04B1/04
CPC分类号： H03G3/3042 , H03F3/45192 , H03F3/45735 , H03F2200/513 , H03F2203/45424 , H03G3/004 , H04B1/0475
摘要： Small portable communication devices that support multiple modulation techniques cannot gain the benefits of using an isolator at the output of a power amplifier to provide stability in the load impedance. However, for communication devices that include amplitude modulation schemes, maintaining linear operation of the power amplifier is still required. In the presence of unstable load impedance, this can be a difficult task. As a solution, the linearity of the power amplifier is detected by determining the peak power of the output signal and the average or root-mean-square of a portion of the output signal, such as a mid-amble). The ratio of the peak power and the average power of the output signal are used to determine if the power amplifier is operating in the linear region. If the ratio is too high, then the power amplifier may be operating in the linear region. By adjusting the power level of the input signal to the power amplifier when the ratio increases, linearity of the power amplifier is maintained.
摘要翻译：支持多种调制技术的小型便携式通信设备无法获得在功率放大器的输出端使用隔离器以提供负载阻抗稳定性的好处。然而，对于包括幅度调制方案的通信设备，仍然需要保持功率放大器的线性操作。在存在不稳定的负载阻抗的情况下，这可能是一项艰巨的任务。作为解决方案，通过确定输出信号的峰值功率和输出信号的一部分（例如中间码）的平均或均方根来检测功率放大器的线性度。使用峰值功率和输出信号的平均功率的比率来确定功率放大器是否在线性区域中操作。如果该比率太高，则功率放大器可以在线性区域中操作。当比率增加时，通过调整功率放大器的输入信号的功率电平，保持功率放大器的线性度。

19. 发明授权

US4345213A Differential-input amplifier circuitry with increased common-mode _voltage range 失效
标题翻译：具有增加共模电压范围的差分输入放大器电路
公开(公告)号：US4345213A
公开(公告)日：1982-08-17
申请号：US125645
申请日：1980-02-28
申请人： Otto H. Schade, Jr.
发明人： Otto H. Schade, Jr.
IPC分类号： H03F3/45 , G06G7/24
CPC分类号： H03F3/45278 , H03F3/45183 , H03F3/45735 , H03F3/45766 , H03F2203/45071 , H03F2203/45342 , H03F2203/45631
摘要： A differential-input amplifier suitable for the input stage of a CMOS operational amplifier has the capability of amplifying input signals with common-mode voltage components in a range including the entirety of its operating voltage. To provide this capability for one end of the common-mode range a long-tailed pair connection of depletion-mode field effect transistors with gates at the inverting and non-inverting input terminals of the amplifier is used; and to provide this capability for the other end of the common-mode range the substrates of the transistors are biased to operate them in effect as enhancement-mode transistors allowing their drains to work into a current mirror amplifier used for converting their balanced drain variations to single-ended form. Current mirror amplifier configurations are disclosed which are preferable for such conversion since they operate with reduced potential requirements, but are integrable in CMOS.
摘要翻译：适用于CMOS运算放大器的输入级的差分输入放大器具有在包括其整个工作电压的范围内的共模电压分量放大输入信号的能力。为了为共模范围的一端提供这种能力，使用在放大器的反相和非反相输入端的栅极的耗尽型场效应晶体管的长尾对连接; 并且为了为共模范围的另一端提供这种能力，晶体管的衬底被偏置以将其作为增强型晶体管起作用，使其漏极工作到用于将它们的平衡漏极变化转换成电流镜放大器单端形式公开了电流镜放大器配置，这对于这种转换是优选的，因为它们以降低的电位要求运行，但是可以在CMOS中集成。

20. 发明申请

US20100156683A1 AMPLIFIER CIRCUIT AND A/D CONVERTER 有权
标题翻译：放大器电路和A / D转换器
公开(公告)号：US20100156683A1
公开(公告)日：2010-06-24
申请号：US12547973
申请日：2009-08-26
申请人： Mai NOZAWA , Masanori FURUTA
发明人： Mai NOZAWA , Masanori FURUTA
IPC分类号： H03F3/16 , H03M1/00 , H03M1/12
CPC分类号： H03F1/223 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F3/45735 , H03F2200/249 , H03F2200/405 , H03F2200/414 , H03F2200/78 , H03F2203/45292 , H03F2203/45302 , H03F2203/45356 , H03F2203/45396 , H03F2203/45424 , H03F2203/45446 , H03F2203/45536 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45726 , H03F2203/45728 , H03M1/002 , H03M1/0682 , H03M1/164
摘要： An amplifier circuit includes a current source that is connected between a power supply voltage and an output node and that is turned on when a switching control signal takes a first value and is turned off when the switching control signal takes a second value; a grounded voltage control current source whose amount of current is controlled by an input voltage; a cascode transistor connected between the voltage control current source and the output node; a boost amplifier connected between a gate electrode and a source electrode of the cascode transistor; and a switch that is connected between an output node of the boost amplifier and a bias voltage and that is turned on for a predetermined period of time when a value of the switching control signal is switched from the second value to the first value, to forcefully rise the boost amplifier.
摘要翻译：放大器电路包括连接在电源电压和输出节点之间的电流源，并且当开关控制信号取第一值时导通，并且当开关控制信号取第二值时被关断; 接地电压控制电流源，其电流量由输入电压控制; 连接在电压控制电流源和输出节点之间的共源共栅晶体管; 连接在共栅二极管的栅电极和源电极之间的升压放大器; 以及开关，其连接在所述升压放大器的输出节点和偏置电压之间，并且当所述开关控制信号的值从所述第二值切换到所述第一值时，所述开关被接通预定时间段，以强制地升高放大器。

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