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11. 发明公开

CN106571777A 双模振荡器及多相位振荡器无效
公开(公告)号：CN106571777A
公开(公告)日：2017-04-19
申请号：CN201610966245.9
申请日：2016-11-04
申请人：华为技术有限公司
发明人：舒一洋 , 钱慧珍 , 罗讯
IPC分类号： H03B1/02
CPC分类号： H03B5/02 , H03B5/1212 , H03B5/1218 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03B5/1296 , H03B27/00 , H03B2200/0074 , H03B2200/009 , H03B2201/0266 , H03B1/02 , H03B2202/02
摘要：本申请实施例公开了一种双模振荡器及多相位振荡器。该双模振荡器通过模式切换电路实现两个工作模式之间的切换，可以得到两个不同频段的振荡信号，同时，其采用两个变压器耦合振荡器构成双模振荡器，每个变压器耦合振荡器中的升压变压器将第一MOS管的漏极电压摆幅进行倍增后再注入第二MOS管的栅极，从而在不增大振荡器的供电电压的情况下获得更大的栅极电压摆幅，提高双模振荡器的相位噪声性能。该多相位振荡器，由多个双模变压器耦合振荡器通过多相位耦合电路连接成莫比乌斯环，不仅可以产生多相位振荡信号，还可以提高整个振荡器的相位噪声性能。

12. 发明公开

CN104079250A 振子的制造方法、振子、以及振荡器有权
公开(公告)号：CN104079250A
公开(公告)日：2014-10-01
申请号：CN201410119979.4
申请日：2014-03-27
申请人：精工爱普生株式会社
发明人：吉泽隆彦
IPC分类号： H03H3/02 , H03H9/02 , H03H9/17
CPC分类号： H03H9/17 , H03B5/02 , H03B5/30 , H03B5/32 , H03H3/02 , H03H9/02338 , H03H9/2447 , H03H2003/021 , H03H2003/022 , H03H2009/02291
摘要：本发明提供一种振子的制造方法、振子以及振荡器。本发明所涉及的振子的制造方法包括：成膜覆盖层的工序，所述覆盖层覆盖硅基板；对覆盖层进行图案形成的工序；成膜半导体层的工序，所述半导体层覆盖硅基板和覆盖层；对半导体层进行图案形成，从而在覆盖层上形成成为梁状的振动部、和对振动部进行支承的支承部的工序；形成使硅基板露出的开口部的工序；穿过开口部去除硅基板，并形成凹陷部的工序；去除覆盖层的工序，在形成振动部和支承部的工序中，形成具有第一部分和第二部分的支承部，其中，所述第一部分位于硅基板上，所述第二部分对第一部分和振动部进行连接，并位于覆盖层上。

13. 发明公开

CN103124176A N分频合成器有权转让
公开(公告)号：CN103124176A
公开(公告)日：2013-05-29
申请号：CN201210480569.3
申请日：2012-11-16
申请人：美国频顺通讯科技公司
发明人：莫世雄 , 崔岩 , 张崇兴
IPC分类号： H03L7/18
CPC分类号： H03K21/08 , H03B5/02 , H03B19/00 , H03B2200/0048 , H03B2200/0072 , H03K5/00006 , H03K21/023
摘要：本发明的一个实施方式提供了一种N分频合成器。该合成器包括一个或多个可调谐振荡器、耦合到该可调谐振荡器的分频电路、和耦合到该分频电路的多路复用器。该分频电路包括多个分频器，并被配置为产生多个分频输出。至少一个分频输出具有不同的分频因子。多路复用器被配置为选择分频输出。

14. 发明公开

CN1627630A 频率合成器用电压控制振荡器失效
公开(公告)号：CN1627630A
公开(公告)日：2005-06-15
申请号：CN200410095270.1
申请日：2004-11-22
申请人：阿尔卑斯电气株式会社
发明人：五十岚康博
IPC分类号： H03B25/00
CPC分类号： H03B5/02 , H03B25/00 , H03B2200/0034 , H03B2200/007
摘要：一种简化频率合成器构成的电压控制振荡器，其具备振荡晶体管(8a)，和相互串联连接地、且设置在振荡晶体管(8a)的输出端与高频接地点Vcc之间的第一和第二电感元件(8c)和(8d)。分别从振荡晶体管(8a)的输出端和第一电感元件(8c)与第二电感元件(8d)之间的连接点，这两处输出振荡信号，从振荡晶体管的输出端输出电平高的基波，从两个电感元件之间的连接点输出基波被抑制的高次谐波。

15. 发明公开

EP1542355A1 Voltage controlled oscillator for frequency synthesizer 有权
标题翻译： Spannungsgesteuerter Oszillatorfüreinen Frequenzsynthetisierer
公开(公告)号：EP1542355A1
公开(公告)日：2005-06-15
申请号：EP04028845.8
申请日：2004-12-06
申请人： ALPS ELECTRIC CO., LTD.
发明人： Ikarashi, Yasuhiro, c/o Alps Electric Co., Ltd.
IPC分类号： H03B25/00 , H03B5/02
CPC分类号： H03B5/02 , H03B25/00 , H03B2200/0034 , H03B2200/007
摘要： The present invention provides a voltage controlled oscillator capable of simplifying the structure of a frequency synthesizer. The voltage controlled oscillator includes an oscillating transistor 8a, and first and second inductance elements 8c and 8d which are connected in series and provided between an output terminal of the oscillating transistor 8a and a high frequency ground point Vcc. Oscillating signals are output from the output terminal of the oscillating transistor 8a and a connecting point between the first inductance element 8c and the second inductance element 8d, respectively. The output terminal of the oscillating transistor outputs a fundamental wave having a high level, and the connecting point between two inductance elements outputs the harmonic wave, suppressing the fundamental wave.
摘要翻译：本发明提供一种能够简化频率合成器的结构的压控振荡器。压控振荡器包括振荡晶体管8a以及串联连接并设置在振荡晶体管8a的输出端子与高频接地点Vcc之间的第一和第二电感元件8c和8d。振荡信号从振荡晶体管8a的输出端子和第一电感元件8c和第二电感元件8d之间的连接点分别输出。振荡晶体管的输出端子输出高电平的基波，两个电感元件之间的连接点输出谐波，抑制基波。

16. 发明公开

EP0755112A1 Tunable voltage-controlled oscillator 失效
标题翻译： Abstimmbarer spannungsgesteuerter Oszillator
公开(公告)号：EP0755112A1
公开(公告)日：1997-01-22
申请号：EP96660011.6
申请日：1996-04-09
申请人： NOKIA MOBILE PHONES LTD.
发明人： Kukkonen, Osmo
IPC分类号： H03B5/02
CPC分类号： H03B5/02 , H03B2201/0208
摘要： The invention is related to an electrically tunable voltage-controlled oscillatory circuit, wherein the negative bias voltage (-Vcf') of a capacitance diode (5) needed for tuning the center frequency of the oscillatory circuit is generated on the basis of an electric oscillating signal (RFout) produced by the oscillatory circuit itself. Said oscillating signal is used for generating a negative voltage with a clamp/voltage multiplier type circuit (15) and it is adjusted to a desired value with an adjustment circuit (14), in which the values of the components (R2) can be permanently adjusted suitable in the tuning stage. Alternatively, the adjustment circuit (14) may include an active component (Q1) which can have an effect on the value of the negative bias voltage (-Vcf') during the use of the oscillatory circuit.
摘要翻译：本发明涉及一种电可调电压控制振荡电路，其中，用于调谐振荡电路的中心频率所需的电容二极管（5）的负偏置电压（-Vcf'）是基于电振荡信号（RFout）由振荡电路本身产生。所述振荡信号用于利用钳位/电压倍增器型电路（15）产生负电压，并且通过调节电路（14）将其调节到期望值，其中分量（R2）的值可以永久地调整适合调音阶段。或者，调节电路（14）可以包括在使用振荡电路期间可以对负偏置电压（-Vcf'）的值产生影响的有源分量（Q1）。

17. 发明公开

EP0326202A1 Voltage-controlled oscillator 失效
标题翻译：压控振荡器
公开(公告)号：EP0326202A1
公开(公告)日：1989-08-02
申请号：EP89200078.7
申请日：1989-01-13
申请人： CATENA MICROELECTRONICS B.V.
发明人： Nordholt, Ernst Hugo , Nauta, Hendrikus Cornelis
IPC分类号： H03B5/02 , H03L7/02
CPC分类号： H03L7/02 , H03B5/02
摘要： Voltage-controlled oscillator provided with a frequency-determining element and an oscillator loop having a phase-rotating network, in which the value of one or more elements depends on a control signal which is fed to a control input and with which the phase rotation and thereby the oscillator frequency can be changed. The oscillator is further provided with a phase control loop, at least comprising a phase-rotating network to the input of which the oscillator signal is fed, a phase detector to the two inputs of which the input signal and the output signal of said phase-rotating network are fed, and an amplifier which amplifies the output signal of the phase detector and feeds it to the control input of the phase-rotating network of the oscillator loop. The phase detector has an accurately known and temperature-independent input-output relation. The phase-rotating network of the phase control loop may be formed by the phase-rotating network of the oscillator loop (Fig. 2). Said oscillator loop may have at least two cascaded phase-rotating subnetworks, at least one of which has said phase control loop with phase detector and amplifier (Figs. 3, 4, 5).
摘要翻译：具有频率确定元件和具有相位旋转网络的振荡器回路的电压控制振荡器，其中一个或多个元件的值取决于被馈送到控制输入的控制信号，并且相位旋转和从而可以改变振荡器的频率。该振荡器还设置有相位控制回路，至少包括相位旋转网络，相位旋转网络的振荡器信号被馈送到该相位旋转网络的输入端;相位检测器，其两个输入端的输入信号和相位旋转网络的输出信号; 旋转网络馈送，放大器放大相位检测器的输出信号并将其馈送到振荡器回路的相位旋转网络的控制输入端。相位检测器具有精确已知且与温度无关的输入 - 输出关系。相位控制环路的相位旋转网络可以由振荡器环路的相位旋转网络构成（图2）。所述振荡器环路可以具有至少两个级联的相位旋转子网络，其中至少一个具有带相位检测器和放大器（图3,4,5）的所述相位控制环路。

18. 发明申请

WO2015102924A1 SYSTEM AND METHOD FOR CALIBRATING CAPACITOR-BASED OSCILLATORS IN CRYSTAL-LESS DEVICES 审中-公开
标题翻译：用于在无结构的设备中校准基于电容器的振荡器的系统和方法
公开(公告)号：WO2015102924A1
公开(公告)日：2015-07-09
申请号：PCT/US2014/071125
申请日：2014-12-18
申请人： SANDISK TECHNOLOGIES INC.
发明人： PANCHOLI, Deepak , ODEDARA, Bhavin
IPC分类号： H03B5/12 , G06F1/12
CPC分类号： H03B5/1228 , H03B5/02 , H03B5/1215 , H03B5/1265 , H03J2200/09 , H03J2200/10
摘要： A method for calibrating an oscillator in an electronic device and an electronic device configured for calibration are provided. Multiple signals are sent to the electronic device from another electronic device, such as from a host device. With knowledge of the time interval between the multiple signals, the electronic device may calibrate the oscillator in the electronic device. For example, the electronic device may be a USB-compliant electronic device. The USB-compliant electronic device may receive Start of Frame (SoF) signals from a host device, which in one USB implementation is received at 1 mSec intervals. The USB-compliant electronic device may count the output of the oscillator between receipt of different SoF signals in order to determine the frequency of the oscillator at different oscillator settings.
摘要翻译：提供了一种用于校准电子设备中的振荡器的方法和被配置用于校准的电子设备。多个信号从另一个电子设备（例如从主机设备）发送到电子设备。通过了解多个信号之间的时间间隔，电子设备可以校准电子设备中的振荡器。例如，电子设备可以是符合USB的电子设备。符合USB标准的电子设备可以从主机设备接收起始帧（SoF）信号，这在一个USB实现中以1mSec的间隔被接收。符合USB标准的电子设备可以在收到不同SoF信号之前对振荡器的输出进行计数，以便在不同的振荡器设置下确定振荡器的频率。

19. 发明申请

WO01018951A1 AN ARRANGEMENT AND METHOD RELATING TO OSCILLATORS 审中-公开
标题翻译：关于振荡器的安排和方法
公开(公告)号：WO01018951A1
公开(公告)日：2001-03-15
申请号：PCT/SE2000/001651
申请日：2000-08-29
IPC分类号： H03B5/02 , H03B5/12 , H03B1/04 , H03B5/18
CPC分类号： H03B5/02 , H03B5/1203 , H03B5/1231 , H03B5/1243 , H03B5/1296
摘要： The present invention relates to an oscillator (200, 300, 600, 800) comprising a first substrate (210) on which a resonator circuit (310, 400, 610, H) and an amplifier circuit (320, 620, A) are arranged, said resonator circuit comprising first set of components (LR, CR, VD1, VD2, RFC1, RFC2, RFC2, VD3, CC) and said amplifier circuit comprising a second set of components (C1, C2, Cout, RFC) and an amplifier transistor (T). The first substrate comprises at least two additional substrates (220, 230; 820, 830): a second substantially insulating substrate (220, 820) and a third substantially semiconducting substrate (230, 830), and in that at least said transistor (T) is arranged on said third substrate while said first and second set of components (LR, CR, VD1, VD2, RFC1, RFC2, RFC2, VD3, CC; C1, C2, Cout, RFC) are arranged on said second substantially insulating substrate (220).
摘要翻译：本发明涉及一种包括第一衬底（210）的振荡器（200,300,600,800），谐振器电路（310,400,610H）和放大器电路（320,620A）布置在该第一衬底上，，所述谐振器电路包括第一组组件（LR，CR，VD1，VD2，RFC1，RFC2，RFC2，VD3，CC），并且所述放大器电路包括第二组组件（C1，C2，Cout，RFC）晶体管（T）。第一衬底包括至少两个附加衬底（220,230; 820,830）：第二基本上绝缘的衬底（220,820）和第三基本半导体衬底（230,830），并且至少所述晶体管（T ）被布置在所述第三基板上，而所述第一和第二组分组件（LR，CR，VD1，VD2，RFC1，RFC2，RFC2，VD3，CC; C1，C2，Cout，（220）。

20. 发明公开

EP3130074A1 REDUCING MISMATCH CAUSED BY POWER/GROUND ROUTING IN MULTI-CORE VCO STRUCTURE 审中-公开
标题翻译： ERHÖHUNGDERÜBEREINSTIMMUNGDURCH LEISTUNGS- /MASSENLEITUNGSFÜHRUNGIN EINER MEHRADRIGEN VCO-STRUKTUR
公开(公告)号：EP3130074A1
公开(公告)日：2017-02-15
申请号：EP15714712.5
申请日：2015-03-17
申请人： Qualcomm Incorporated
发明人： SHI, Jianlei , YANG, Jeongsik , KIM, Young Gon
IPC分类号： H03B5/12
CPC分类号： H03B5/08 , H03B5/02 , H03B5/1212 , H03B27/00
摘要： Reducing coupling and mismatch in multi-core VCOs, including: arranging a plurality of inductors in a plurality of VCO cores in a parallel differential inductor configuration with shared leads to form a single node, wherein the plurality of inductors includes at least a first inductor and a second inductor; connecting power/ground traces to the first inductor from a first side only; and connecting the power/ground traces to the second inductor from another side different from the first side only to avoid making a current loop.
摘要翻译：减少多核VCO中的耦合和失配，包括：在具有共用引线的并联差分电感器配置中的多个VCO核心中布置多个电感器以形成单个节点，其中所述多个电感器至少包括第一电感器和第二电感器; 将电源/接地迹线仅从第一侧连接到第一电感器; 并且将电源/接地迹线与不同于第一侧的另一侧连接到第二电感器，以避免产生电流回路。

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