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11. 发明公开

EP0184963A3 Synchronous power rectifier and applications thereof 失效
标题翻译：同步电源整流器及其应用
公开(公告)号：EP0184963A3
公开(公告)日：1987-08-19
申请号：EP85402424
申请日：1985-12-06
申请人： UNITRODE CORPORATION
发明人： Patel, Raoji
IPC分类号： H02M07/217 , H02M03/335
CPC分类号： H02M3/3353 , H02M3/33592 , Y02B70/1475
摘要： @ A synchronous power rectifier of high efficiency incorporates a bipolar power transistor (Q33) operable by a control circuit (80) in a switching mode to rectify the energy from a secondary winding (N32) of a power transformer (T31). The synchronous rectifier reduces or eliminates the need of rectifier diodes, which provides power rectification without the power loss associated with the rectifier diode voltage drops. Moreover, the rectifier switching time is adjustable to accommodate delayed turn-off times of bipolar power devices, as well as the switching signal duration to provide regulation of the output voltage (Vo) independent of the excitation of the primary of the transformer (T31).
摘要翻译：高效率的同步电力整流器包括在开关模式下由控制电路（80）操作的双极功率晶体管（33），以对来自电力变压器（T31）的次级绕组（N32）的能量进行整流。同步整流器减少或消除了整流二极管的需要，其提供功率整流，而没有与整流二极管电压降相关联的功率损耗。此外，整流器开关时间是可调节的，以适应双极功率器件的延迟关断时间，以及开关信号持续时间，以提供与变压器的初级（T31）的激励无关的输出电压（Vo）的调节，。

12. 发明授权

EP0523807B1 A method and a controller for switching high voltage using low voltage CMOS transistors 失效
标题翻译：用于切换的高电压的方法和装置CMOS低压晶体管
公开(公告)号：EP0523807B1
公开(公告)日：1997-10-15
申请号：EP92202158.9
申请日：1992-07-14
申请人： UNITRODE CORPORATION
发明人： Neidorff, Robert A. , McKenzie, James A.
IPC分类号： H03K17/687
CPC分类号： H03K17/6872

13. 发明公开

EP0523807A2 Cmos high voltage switching controller 失效
标题翻译： CMOS-Schaltsteuerungsvorrichtungfürhohe Spannungen。
公开(公告)号：EP0523807A2
公开(公告)日：1993-01-20
申请号：EP92202158.9
申请日：1992-07-14
申请人： UNITRODE CORPORATION
发明人： Neidorff, Robert A. , McKenzie, James A.
IPC分类号： H03K17/687
CPC分类号： H03K17/6872
摘要： A low-voltage CMOS switching controller which utilizes pMOS and nMOS devices to control the switching of a high voltage power supply. Two pMOS devices (86,88) are used as switches to control the high voltage level on an output terminal (80) and an nMOS device (100) is used to switch the output terminal (80) to ground once the high voltage has been reduced to a safe level. The controller also includes circuitry which prevents both pMOS devices (86,88) from being on at the same time, thereby shunting the high voltage supply to ground.
摘要翻译：一种利用pMOS和nMOS器件控制高压电源开关的低压CMOS开关控制器。使用两个pMOS器件（86,88）作为开关来控制输出端子（80）上的高电压电平，并且nMOS器件（100）用于一旦高电压已经被输出端子（80）接地降至安全水平。控制器还包括防止pMOS器件（86,88）同时接通的电路，从而将高压电源分流到地。

14. 发明公开

EP0494598A1 Method of processing a semiconductor substrate 有权
标题翻译： Verfahren zum Verarbeiten eines Halbleitersubstrats。
公开(公告)号：EP0494598A1
公开(公告)日：1992-07-15
申请号：EP92100028.7
申请日：1992-01-02
申请人： UNITRODE CORPORATION
发明人： Blackstone, Scott C.
IPC分类号： H01L21/74 , H01L21/20 , H01L21/18
CPC分类号： H01L21/76264 , H01L21/2257 , H01L21/32155 , H01L21/74 , H01L21/76275 , H01L21/76283 , Y10S148/012 , Y10S148/147 , Y10S438/923
摘要： A method for processing at least two semiconductor wafers for producing a partially processed semiconductor substrate which can be subsequently further processed utilizing conventional planar semiconductor processing techniques to achieve a complementary semiconductor structure in which a plurality of matched semiconductor elements can be formed. An embedded silicide layer (104) in the bonded semiconductor substrate acts as a conduit for horizontally dispersing dopant during the diffusion process. The dopant subsequently up-diffuses into an adjacent silicon region (100) forming generally uniform and shallow, buried layer regions (134, 136).
摘要翻译：一种用于处理至少两个用于制造部分处理的半导体衬底的半导体晶片的方法，该半导体衬底随后可以利用常规的平面半导体处理技术进一步处理，以实现其中可以形成多个匹配的半导体元件的互补半导体结构。粘结半导体衬底中的嵌入硅化物层（104）用作在扩散过程中水平分散掺杂剂的导管。掺杂剂随后向上扩散到形成大致均匀且浅的掩埋层区域（134,136）的相邻硅区域（100）中。

15. 发明公开

EP0184963A2 Synchronous power rectifier and applications thereof 失效
标题翻译： Synchronleistungsgleichrichter和Anwendungen davon。
公开(公告)号：EP0184963A2
公开(公告)日：1986-06-18
申请号：EP85402424.7
申请日：1985-12-06
申请人： UNITRODE CORPORATION
发明人： Patel, Raoji
IPC分类号： H02M7/217 , H02M3/335
CPC分类号： H02M3/3353 , H02M3/33592 , Y02B70/1475
摘要： @ A synchronous power rectifier of high efficiency incorporates a bipolar power transistor (Q33) operable by a control circuit (80) in a switching mode to rectify the energy from a secondary winding (N32) of a power transformer (T31). The synchronous rectifier reduces or eliminates the need of rectifier diodes, which provides power rectification without the power loss associated with the rectifier diode voltage drops. Moreover, the rectifier switching time is adjustable to accommodate delayed turn-off times of bipolar power devices, as well as the switching signal duration to provide regulation of the output voltage (Vo) independent of the excitation of the primary of the transformer (T31).
摘要翻译：高效率的同步电力整流器包括在开关模式下由控制电路（80）操作的双极功率晶体管（33），以对来自电力变压器（T31）的次级绕组（N32）的能量进行整流。同步整流器减少或消除了整流二极管的需要，其提供功率整流，而没有与整流二极管电压降相关联的功率损耗。此外，整流器开关时间是可调节的，以适应双极功率器件的延迟关断时间，以及开关信号持续时间，以提供与变压器的初级（T31）的激励无关的输出电压（Vo）的调节，。

16. 发明授权

US5532626A Off-line controller having a line voltage detector and a switched current bootstrap circuit 失效
标题翻译：具有线路电压检测器和开关电流自举电路的离线控制器
公开(公告)号：US5532626A
公开(公告)日：1996-07-02
申请号：US384769
申请日：1995-02-06
申请人： Joseph M. Khayat
发明人： Joseph M. Khayat
IPC分类号： G01R19/155 , G01R19/00
CPC分类号： G01R19/155
摘要： An off-line controller circuit having a line voltage detector and a switched current bootstrap circuit. The controller receives current from the line and provides a drive signal for controlling the switch(es) of an off-line converter. The line voltage detector establishes a voltage proportional to the line voltage in response to a portion of the received line current. The proportional voltage is compared to a reference voltage to provide a control signal for inhibiting the drive signal when the proportional voltage is less than the reference voltage, indicating that the line voltage is less than a predetermined level. The switched current bootstrap circuit limits a bootstrap current provided to the controller supply voltage from the converter output in accordance with current shunted to ground by a supply voltage clamp. A switched current source is provided for sensing the current through the clamp and limiting the bootstrap current flow from the converter output to the supply voltage as a function of the sensed current.
摘要翻译：具有线路电压检测器和开关电流自举电路的离线控制器电路。控制器从线路接收电流并提供用于控制离线转换器的开关的驱动信号。线路电压检测器响应于接收的线路电流的一部分建立与线路电压成比例的电压。将比例电压与参考电压进行比较，以在比例电压小于参考电压时提供用于禁止驱动信号的控制信号，指示线电压小于预定电平。开关电流自举电路根据由电源电压钳分流到地的电流，限制从转换器输出提供给控制器电源电压的自举电流。提供开关电流源，用于感测通过钳位电流，并将自举电流从转换器输出限制为电压，作为感测电流的函数。

17. 发明授权

US5359276A Automatic gain selection for high power factor 失效
标题翻译：高功率因数的自动增益选择
公开(公告)号：US5359276A
公开(公告)日：1994-10-25
申请号：US61630
申请日：1993-05-12
申请人： Robert A. Mammano
发明人： Robert A. Mammano
IPC分类号： H02M1/00 , H02M1/42 , G05F1/70
CPC分类号： H02M1/4225 , Y02B70/126 , Y02P80/112
摘要： A high power factor regulator circuit which includes a variable multiplier, permitting the high power factor regulator circuit to be used with a number of input line voltage levels. In one embodiment a comparator determines the multiplication or gain factor to be applied in a control loop by comparing the rectified AC input voltage to a predetermined threshold value.
摘要翻译：一种高功率因数调节器电路，其包括可变乘法器，允许高功率因数调节器电路与多个输入线路电压电平一起使用。在一个实施例中，比较器通过将经整流的AC输入电压与预定阈值进行比较来确定要在控制回路中施加的乘法或增益因子。

18. 发明授权

US5262685A High-speed, low power auto-zeroed sampling circuit 失效
标题翻译：高速低功耗自动归零采样电路
公开(公告)号：US5262685A
公开(公告)日：1993-11-16
申请号：US778350
申请日：1991-10-16
申请人： Michael J. Demler , Kevin J. McCall
发明人： Michael J. Demler , Kevin J. McCall
IPC分类号： G11C27/02 , H03K5/24
CPC分类号： G11C27/026 , H03K5/249
摘要： Auto-zeroing clocking signals, a first auto-zeroing clocking signal of comparatively-low frequency and duty cycle and a second auto-zeroing clocking signal of the same comparatively-low frequency but complementary and comparatively-high duty cycle, and a sampling clocking signal of comparatively-high frequency respectively initiate auto-zeroing of a circuit element subject to output offset error and data sampling of an A.C. input signal to a latch. The sampling of the A.C. input signal to the latch occurs at the comparatively-high frequency of the clocking signal during the "on" time of the comparatively-high duty cycle second auto-zeroing clocking signal of comparatively-low frequency enabling thereby to provide higher speed sampling than heretofore possible. The auto-zeroing of the circuit element subject to input offset error occurs during the "on" time of the comparatively-low duty cycle first auto-zeroing clocking signal of comparatively-low frequency enabling thereby to provide lower power sampling than heretofore possible. Typically, the circuit element is either an analog comparator or an operational amplifier, and the sampling circuit of the invention has exemplary utility in analog-to-digital (A/D) conversion.
摘要翻译：自动归零时钟信号，具有相对较低频率和占空比的第一自动归零时钟信号和具有相同较低频率但互补且相对较高占空比的相同低自适应时钟信号，以及采样时钟信号相对高的频率分别启动电路元件的自动归零，该电路元件受到输出偏移误差的影响，并将AC输入信号的数据采样到锁存器。在较低频率的比较高占空比的第二自动归零时钟信号的“接通”时间内，对锁存器的AC输入信号的采样发生在时钟信号的较高频率处，从而能够提供更高的速度采样比以前可能。受到输入偏移误差的电路元件的自动归零发生在相对低频率的相对低的占空比第一自动归零时钟信号的“导通”时间，从而能够提供比以前更低的功率采样。通常，电路元件是模拟比较器或运算放大器，并且本发明的采样电路在模数（A / D）转换中具有示例性的用途。

19. 发明授权

US5225897A Molded package for semiconductor devices with leadframe locking structure 失效
标题翻译：具有引线框锁定结构的半导体器件成型封装
公开(公告)号：US5225897A
公开(公告)日：1993-07-06
申请号：US771327
申请日：1991-10-02
申请人： Harry C. Reifel , Angelo R. Santamaria, Jr. , Herman V. D. Soerewyn
发明人： Harry C. Reifel , Angelo R. Santamaria, Jr. , Herman V. D. Soerewyn
IPC分类号： H01L23/495
CPC分类号： H01L23/49551 , H01L23/49503 , H01L23/49562 , H01L2924/0002
摘要： A molded package with a leadframe locking structure is shown. A lower leadframe consists of a frame member, a connecting element extending therefrom, a mounting member at the distal end of the connecting element, and at least one side element projecting from the mounting member. Electrical connection is made between the mounting member and a semiconductor device. An upper leadframe consists of a frame member and an extending lead element which makes electrical contact with an upper surface of the semiconductor device. There is at least one side element bent up to a predetermined angle relative to the mounting member so that an encapsulant will be locked in place, minimizing the possibility of semiconductor contamination via boundaries between the encapsulant and the leadframes. The encapsulant, such as plastic or epoxy, is transfer or injection molded over the lead element, over the semiconductor device, about the side element, and on top of the mounting member to form the completed package. The leadframes are then removed, leaving a tab extending from the mounting member and a portion of the lead element to serve as electrical leads to the semiconductor device inside.
摘要翻译：示出了具有引线框锁定结构的模制封装。下引线框由框架构件，从其延伸的连接元件，连接元件的远端处的安装构件和从安装构件突出的至少一个侧元件构成。在安装构件和半导体器件之间进行电连接。上引线框架由框架构件和与半导体器件的上表面电接触的延伸引线元件组成。至少有一个侧元件相对于安装构件弯曲到预定角度，使得密封剂将被锁定就位，从而最小化通过密封剂和引线框架之间的边界的半导体污染的可能性。密封剂，例如塑料或环氧树脂，在引线元件上，在半导体器件上，围绕侧部元件，以及安装部件的顶部上转移或注塑成型，以形成完整的封装。然后取出引线框架，留下从安装构件延伸出的突出部分和引线元件的一部分，以用作内部的半导体器件的电引线。

20. 发明授权

US5218249A High speed, low forward voltage drop, SCR 失效
标题翻译：高速，低正向压降，SCR
公开(公告)号：US5218249A
公开(公告)日：1993-06-08
申请号：US755081
申请日：1991-09-05
申请人： Mark Jordan
发明人： Mark Jordan
IPC分类号： H03K3/287 , H03K3/2885
CPC分类号： H03K3/2885 , H03K3/287
摘要： A silicon controlled rectifier device including an SCR portion controlled by an input voltage signal to a voltage comparator and having a latching circuit to permit the SCR portion to remain in the conducting state once switched even in the absence of the input voltage signal. Such a device is especially useful when a narrow input voltage signal is used to switch the SC portion into its conducting state.
摘要翻译：一种可控硅整流器件，其包括由输入电压信号控制到电压比较器的SCR部分，并且具有锁存电路，以允许SCR部分即使在没有输入电压信号的情况下也保持在导通状态。当使用窄输入电压信号将SC部分切换到其导通状态时，这种装置是特别有用的。

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