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11. 发明专利

DE2920563C2 未知
公开(公告)号：DE2920563C2
公开(公告)日：1988-04-07
申请号：DE2920563
申请日：1979-05-21
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： BOWLES, DAVID JOHN, WINCHESTER, KY., US , CLANCY, DOUGLAS EUGENE, AUSTIN, TEX., US , JOHNSON, CARL FOSTER, LEXINGTON, KY., US , NEAL, DANNY MARVIN, AUSTIN, TEX., US
IPC分类号： B41J29/18 , B41J21/17 , B41J25/04 , B41J29/36 , B41J29/42 , B41J19/62 , B41J29/26
摘要： On electronic typewriters which have the ability to record into a small working memory those characters, functions and escapements which are keyed at the keyboard, it is many times advantageous to be able to place the carrier and the print point over a character which has been previously typed without using repeated backspaces. Disclosed herein is a feature for an electronic typewriter which permits the operator to easily align the print point with a character on the page by positioning a reference mark on the card holder or print carrier in relation to a previously printed character and then through keyboard control cause the carriage to shift its position such that the print point is then exactly aligned with the character printed. The positioning of the carrier such that the reference mark is in relation to the desired print point is accomplished by a backspace operation and the repositioning or causing of the carrier to assume a position immediately over the subject character is accomplished by keyboard control through the electronics of the typewriter to cause the carrier to shift a predetermined distance.

12. 发明专利

DE2752378C2 未知
公开(公告)号：DE2752378C2
公开(公告)日：1987-12-03
申请号：DE2752378
申请日：1977-11-24
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： OLSEN, CARLTON EDWARD, SAN JOSE, CALIF., US , SERPA, LEROY JASPER, CAMPBELL, CALIF., US
IPC分类号： B41J2/085 , B41J2/09 , G03C5/00 , G03C5/56 , G03F7/004 , G03F7/20 , C23F1/02 , B41J3/04 , H01L21/302 , H05K3/06
摘要： A double exposure and double etch technique for producing precision parts from a photosensitive material is described. The process is described in terms of producing an array of ink jet charge electrodes which comprise a series of small through holes on accurately defined centers. The process comprises the steps of exposing the photosensitive material through a mask to develop an undersized through hole and heat treating the photosensitive material to change its characteristics so that an etchable material is produced in the exposed area. The material is then etched to form the undersized through hole which is substantially tapered. The material is then exposed again with a full sized mask including any conductor patterns and the material is again heat treated. The material is again etched and this etching, in the nature of a surface etch, reduces the taper because of the lower etch rate of the unexposed material as compared to the much higher etch rate of the previously unetched tapered material.

13. 发明专利

DE2702830C2 未知
公开(公告)号：DE2702830C2
公开(公告)日：1987-12-03
申请号：DE2702830
申请日：1977-01-25
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： LEE, HSING-SAN, WILLISTON, VT., US , VOGL, JR., NORBERT GEORGE, WINOOSKI, VT., US
IPC分类号： G11C11/405 , G11C11/24 , G11C11/35 , H01L21/8242 , H01L27/10 , H01L27/108 , G11C7/00

14. 发明专利

DE2852200C2 未知
公开(公告)号：DE2852200C2
公开(公告)日：1987-11-12
申请号：DE2852200
申请日：1978-12-02
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： GANI, VENKAPPA LAXMAPPA , MONTEGARI, FRANK ALFRED, WAPPINGERS FALLS, N.Y., US
IPC分类号： H01L27/082 , H01L21/8222 , H01L21/8226 , H03K19/082 , H03K19/173 , H03K19/08

15. 发明专利

DE2846624C2 未知
公开(公告)号：DE2846624C2
公开(公告)日：1987-04-02
申请号：DE2846624
申请日：1978-10-26
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： BURKE, MICHAEL JOSEPH , SIVERLING, MICHAEL MCHUGH, ROCHESTER, MINN., US , WILFINGER, RAYMOND JOHN, LA GRANGEVILLE, N.Y., US
IPC分类号： G06K9/38 , H04N1/407
摘要： Analog voltage levels derived from optically scanning a document or from magnetically scanning a magnetic record, depend upon the variable amplitude of a background signal. The analog voltage levels are processed by a bucket brigade circuit to set a threshold from which a binary decision may be made as to the presence of a black or white indicium in optical recognition or a one (1) or zero (0) bit in magnetic reading.

16. 发明专利

DE2529017C2 未知
公开(公告)号：DE2529017C2
公开(公告)日：1987-03-19
申请号：DE2529017
申请日：1975-06-28
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： BROCK, GEORGE W. , HAHN JUN., FREDERICK W., BOULDER, COL., US
IPC分类号： G11B5/53 , G11B5/52 , G11B15/64 , G11B5/187 , H04N5/78
摘要： A rotating head magnetic tape transport wherein a helical wrap of flexible magnetic tape is formed about a stationary tubular mandrel and a rotatable headwheel which carries a slotted head of generally spherical flying contour.

17. 发明专利

DE2550342C2 未知
公开(公告)号：DE2550342C2
公开(公告)日：1987-02-26
申请号：DE2550342
申请日：1975-11-08
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： HONG, SE J. , OSTAPKO, DANIEL L., POUGHKEEPSIE, N.Y., US
IPC分类号： G06F11/22 , G01R31/3185 , G06F11/10 , H03K19/177 , G01R31/28
摘要： 1475255 Selective signalling INTERNATIONAL BUSINESS MACHINES CORP 1 Oct 1975 [18 Dec 1974] 40080/75 Heading G4H A logic array with testing apparatus comprises a plurality of decoders feeding input lines of a logic-performing matrix, the matrix incorporating a check line intersecting the input lines for storing information on the number of operative logic means located along each of the input lines. In Fig. 1, input bits at 14 are decoded in pairs by decoders 12a, 12b ... 12, each decoder selecting one of a respective 4 row lines of an AND array 10. The array 10 has FETs at selected row-column intersections to provide on each column line the AND of a respective combination of the row lines. The column lines feed an OR array 24 which similarly has FETs at selected row-column intersections and feeds latches via its row lines. The AND array has an extra column line 21 specifying a parity bit for each row line according to the number of FETs which should be present in it, and the OR array has an extra row line 19 specifying a parity bit for each column line. To test the AND array, a command decoder 36 is used to enable the decoders 12a, 12b ... 12 in turn, each decoder, when enabled, being supplied with appropriate inputs to select all its outputs in turn. As each row line of the AND array is thus selected, the column outputs are loaded into a shift register 48 and parity-checked by an EXCL-OR tree 50. The OR array is then tested by decoupling the two arrays using a mask output 40 of the command decoder 36, and inserting a 1 into the shift register 48 and shifting it along thus selecting the column lines of the OR array in turn, the row outputs being parity-checked in each case by an EXCL-OR tree 54. Another output 42 of the command decoder 36 (used e.g. for normal operation) enables all the decoders 12a, 12b ... 12 and resets the shift register 48. EXCL-ORing may be done serially. Extra redundancy lines could be provided in the arrays.

18. 发明专利

DE2925040C2 未知
公开(公告)号：DE2925040C2
公开(公告)日：1987-01-22
申请号：DE2925040
申请日：1979-06-21
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： CHRISTOPHERSON, WARREN ALLEN, SAN JOSE, CALIF., US
IPC分类号： H03K5/02 , H03K17/30 , H03K19/018 , H03K19/08 , H03K19/092
摘要： This circuitry translates a relatively large voltage bi-level logical signal to an inphase relatively low voltage bi-level signal for bistatic current-switching logical circuitry. A transistor is connected in the common base circuit arrangement for a first order of input-output circuit isolation. Substantially complete isolation is afforded by a reference tracking circuit which is arranged to track exactly for temperature, base-to-emitter voltage and process variations. This circuit provides a potential at the base of the transistor which is the sum of the emitter-to-base voltage drop and one half of the applied energizing potential. The proper base potential is effected by simple adjustment of the ratio of the value of the input resistor to the value of the load resistor. Many such circuits may be operated on a single semiconductor chip.

19. 发明专利

DE2743284C2 未知
公开(公告)号：DE2743284C2
公开(公告)日：1987-01-22
申请号：DE2743284
申请日：1977-09-27
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： FINLAY, DAVID ERNEST, BOULDER, COL., US
IPC分类号： G06F9/46 , G06F9/445 , G06F12/02 , G06F12/06 , G06F13/12 , G06F12/08
摘要： A programmable controller includes a random access memory for storing signals relating to a plurality of programs executable in the controller. A portion of the memory addressing is zoned for enabling one or more programs to have exclusive access to that zone. The addressability of input/output registers, diagnostic registers and selected other units of common interest to all such programs are addressable in each of the plurality of zones as if such registers were uniquely assigned to such respective memory zones.

20. 发明专利

DE2823213C2 未知
公开(公告)号：DE2823213C2
公开(公告)日：1986-12-18
申请号：DE2823213
申请日：1978-05-27
申请人： INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US
发明人： LAUTIER, ALEX HONORE, NICE, FR , MONROLIN, JEAN LOUIS, LA GAUDE, FR
IPC分类号： H04L27/22 , H04L27/227

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