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    • 11. 发明申请
    • Positioning System and Positioning Method
    • 定位系统和定位方法
    • US20110156952A1
    • 2011-06-30
    • US12651019
    • 2009-12-31
    • Tarun Kumar BhattacharyaHassan M. El-SallabiScot Douglas GordonYasuhiro OdaJiyun Shen
    • Tarun Kumar BhattacharyaHassan M. El-SallabiScot Douglas GordonYasuhiro OdaJiyun Shen
    • G01S19/48
    • G01S19/48G01S5/0252
    • It is an object of the present invention to perform positioning at the proper positioning time and positioning precision in response to a requirement with respect to positioning. A positioning server 10 comprises a first positioning component 12 that performs positioning of a cellular terminal 20 by a hybrid algorithm 1, in which indoor/outdoor determination is performed on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which an end condition is determined on the basis of the result of the indoor/outdoor determination; and a second positioning component 13 that performs positioning of the cellular terminal 20 by a hybrid algorithm 2, in which the approximate position of the cellular terminal 20 is calculated on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which whether or not to end the positioning of the cellular terminal 20 is decided on the basis of the precision of the approximated position.
    • 本发明的目的是响应于对定位的要求,在适当的定位时间和定位精度下执行定位。 定位服务器10包括通过混合算法1执行蜂窝终端20的定位的第一定位组件12,其中基于指示蜂窝终端20的接收状态的接收状态信息进行室内/室外确定,以及 其中根据室内/室外确定的结果确定结束条件; 以及通过混合算法2执行蜂窝终端20的定位的第二定位部件13,其中基于指示蜂窝终端20的接收状态的接收状态信息来计算蜂窝终端20的近似位置,以及 基于近似位置的精度来决定是否结束蜂窝终端20的定位。
    • 12. 发明申请
    • Semiconductor integrated circuit including a power controllable region
    • 半导体集成电路包括功率可控区域
    • US20100237900A1
    • 2010-09-23
    • US12656596
    • 2010-02-04
    • Yasuhiro Oda
    • Yasuhiro Oda
    • H03K19/00H03K19/0175G06F17/50
    • G01R31/318575H01L25/00H01L2924/0002H01L2924/00
    • Provided is a semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit including a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to the outside of the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to the outside of the chip. In the case of inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain.
    • 提供一种能够在包括功率可控区域的半导体集成电路中测试功率控制操作的半导体集成电路。 功率控制开关具有由多个开关单元构成的开关系列。 功率可控区域包括开关系列中的输出节点。 输出节点将通过功率控制开关的各个开关系列的最后级的功率控制信号输出到功率可控区域的外部。 其上安装有半导体集成电路的芯片具有将输出节点的输出输出到芯片的外部的输出端子。 在插入扫描路径测试的情况下,将输出节点的输出加载到数据终端的观察触发器,以及将扫描数据加载到扫描终端,与各个输出节点对应地布置。 连接观察触发器构成扫描路径链。
    • 14. 发明申请
    • Counter circuit
    • 计数器电路
    • US20090231017A1
    • 2009-09-17
    • US12320828
    • 2009-02-05
    • Yasuhiro Oda
    • Yasuhiro Oda
    • G06G7/18
    • G06F1/3203G06F1/3237G06F1/324H03K21/12Y02D10/126Y02D10/128
    • Reduction in power consumption of a counter circuit for continuous operation is demanded. Therefore, provided is a counter circuit including: a first counter of m bits for counting and storing a value of a predetermined bit width according to an input clock; a clock transmission control circuit for controlling whether to transmit the input clock based on a value output according to a counting result of the first counter; and a second counter of n bits for counting and storing another value of the predetermined bit width according to the input clock transmitted from the clock transmission control circuit.
    • 需要减少用于连续操作的计数器电路的功耗。 因此,提供了一种计数器电路,包括:m比特的第一计数器,用于根据输入时钟计数和存储预定比特宽度的值; 时钟发送控制电路,用于根据第一计数器的计数结果,根据输出的值来控制是否发送输入时钟; 以及n比特的第二计数器,用于根据从时钟发送控制电路发送的输入时钟计数并存储预定比特宽度的另一值。