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11. 发明申请

US20090001442A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20090001442A1
公开(公告)日：2009-01-01
申请号：US12145109
申请日：2008-06-24
申请人： Yoshio OZAWA , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
发明人： Yoshio OZAWA , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/115 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203
摘要： A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.
摘要翻译：一种非易失性半导体存储器件，包括具有半导体层和设置在其表面上的绝缘材料的半导体衬底，绝缘材料的表面被半导体层覆盖，并且设置在半导体层上的多个存储单元，存储器电池包括通过覆盖半导体层的表面而提供的第一电介质膜，设置在绝缘材料上方和第一电介质膜上的多个电荷存储层，设置在每个电荷存储层上的多个第二电介质膜，多个设置在每个第二电介质膜上的导电层，以及杂质扩散层，其部分或整体形成在绝缘材料的至少上方和半导体层的内部，并且其底端的至少一部分由绝缘体的上表面材料。

12. 发明授权

US08114755B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08114755B2
公开(公告)日：2012-02-14
申请号：US12146143
申请日：2008-06-25
申请人： Ichiro Mizushima , Yoshio Ozawa , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi , Minako Inukai , Kaori Umezawa , Hiroaki Yamada
发明人： Ichiro Mizushima , Yoshio Ozawa , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi , Minako Inukai , Kaori Umezawa , Hiroaki Yamada
IPC分类号： H01L21/76
CPC分类号： H01L21/764
摘要： A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.
摘要翻译：一种制造半导体器件的方法包括：去除半导体衬底的一部分以在半导体衬底的表面区域中形成突出部分和凹陷部分，在凹部中形成第一外延半导体层，形成第二外延半导体层在所述突出部分和所述第一外延半导体层上，用所述第二外延半导体层的第二部分去除所述第二外延半导体层的第一部分，以露出所述第一外延半导体层的一部分，并且蚀刻所述第一外延半导体层从第一外延半导体层的暴露部分形成在第二外延半导体层的第二部分下面的空腔。

13. 发明申请

US20100171164A1 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100171164A1
公开(公告)日：2010-07-08
申请号：US12659703
申请日：2010-03-17
申请人： Yoshio Ozawa , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
发明人： Yoshio Ozawa , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
IPC分类号： H01L27/115 , H01L29/788
CPC分类号： H01L27/115 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203
摘要： A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.
摘要翻译：一种非易失性半导体存储器件，包括具有半导体层和设置在其表面上的绝缘材料的半导体衬底，绝缘材料的表面被半导体层覆盖，并且设置在半导体层上的多个存储单元，存储器电池包括通过覆盖半导体层的表面而提供的第一电介质膜，设置在绝缘材料上方和第一电介质膜上的多个电荷存储层，设置在每个电荷存储层上的多个第二电介质膜，多个设置在每个第二电介质膜上的导电层，以及杂质扩散层，其部分或整体形成在绝缘材料的至少上方和半导体层的内部，并且其底端的至少一部分由绝缘体的上表面材料。

14. 发明授权

US08017989B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08017989B2
公开(公告)日：2011-09-13
申请号：US12659703
申请日：2010-03-17
申请人： Yoshio Ozawa , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
发明人： Yoshio Ozawa , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203
摘要： A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.
摘要翻译：一种非易失性半导体存储器件，包括具有半导体层和设置在其表面上的绝缘材料的半导体衬底，绝缘材料的表面被半导体层覆盖，并且设置在半导体层上的多个存储单元，存储器电池包括通过覆盖半导体层的表面而提供的第一电介质膜，设置在绝缘材料上方和第一电介质膜上的多个电荷存储层，设置在每个电荷存储层上的多个第二电介质膜，多个设置在每个第二电介质膜上的导电层，以及杂质扩散层，其部分或整体形成在绝缘材料的至少上方和半导体层的内部，并且其底端的至少一部分由绝缘体的上表面材料。

15. 发明申请

US20090011570A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090011570A1
公开(公告)日：2009-01-08
申请号：US12146143
申请日：2008-06-25
申请人： Ichiro Mizushima , Yoshio Ozawa , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi , Minako Inukai , Kaori Umezawa , Hiroaki Yamada
发明人： Ichiro Mizushima , Yoshio Ozawa , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi , Minako Inukai , Kaori Umezawa , Hiroaki Yamada
IPC分类号： H01L21/76
CPC分类号： H01L21/764
摘要： A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.
摘要翻译：一种制造半导体器件的方法包括：去除半导体衬底的一部分以在半导体衬底的表面区域中形成突出部分和凹陷部分，在凹部中形成第一外延半导体层，形成第二外延半导体层在所述突出部分和所述第一外延半导体层上，用所述第二外延半导体层的第二部分去除所述第二外延半导体层的第一部分，以露出所述第一外延半导体层的一部分，并且蚀刻所述第一外延半导体层从第一外延半导体层的暴露部分形成在第二外延半导体层的第二部分下面的空腔。

16. 发明申请

US20120181598A1 NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20120181598A1
公开(公告)日：2012-07-19
申请号：US13430153
申请日：2012-03-26
申请人： Masayuki ICHIGE , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki ICHIGE , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

17. 发明申请

US20120112263A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120112263A1
公开(公告)日：2012-05-10
申请号：US13351965
申请日：2012-01-17
申请人： Masayuki Tanaka , Daikuse Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
发明人： Masayuki Tanaka , Daikuse Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
IPC分类号： H01L29/788
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521 , H01L29/7883
摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

18. 发明授权

US07982259B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US07982259B2
公开(公告)日：2011-07-19
申请号：US11687758
申请日：2007-03-19
申请人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

19. 发明授权

US07954939B2 Decurling mechanism 有权
标题翻译：去卷曲机制
公开(公告)号：US07954939B2
公开(公告)日：2011-06-07
申请号：US12360696
申请日：2009-01-27
申请人： Akihito Yamamoto , Yoshitsugu Tokai
发明人： Akihito Yamamoto , Yoshitsugu Tokai
IPC分类号： B41J2/01 , G03G15/00
CPC分类号： G03G15/652 , B41J11/0005 , G03G2215/00662
摘要： A decurling mechanism for performing a decurling process of correcting the curl of paper includes: a first roller; a second roller disposed travelably around the first roller; and a roller position changing mechanism for changing the second roller to a plurality of positions set on a traveling path of the second roller. The plurality of positions include a decurling position in which the decurling process to the paper is enabled and the paper is conveyed while being pinched between the first and second rollers, a conveyance position in which the decurling process to the paper is disabled and the paper is conveyed while being pinched between the first and second rollers and a pinch release position in which the paper is released from the pinch between the first and second rollers.
摘要翻译：用于进行纸张卷曲的卷曲消除处理的卷曲消除机构包括：第一辊; 围绕第一辊布置的第二辊; 以及用于将第二辊改变为设置在第二辊的行进路径上的多个位置的辊位置改变机构。多个位置包括一个卷曲消除位置，在该卷曲消除位置中纸张的卷曲消除处理能够进行，并且纸张在被夹在第一和第二辊子之间被输送的情况下，纸张的去卷积处理被禁用的传送位置和纸张是在被夹持在第一和第二辊之间的同时传送，以及夹紧释放位置，其中纸从第一和第二辊之间的夹持松开。

20. 发明授权

US07635890B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07635890B2
公开(公告)日：2009-12-22
申请号：US11783934
申请日：2007-04-13
申请人： Yoshio Ozawa , Akihito Yamamoto , Masayuki Tanaka , Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
发明人： Yoshio Ozawa , Akihito Yamamoto , Masayuki Tanaka , Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
IPC分类号： H01L29/76
CPC分类号： H01L29/7883 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.
摘要翻译：半导体器件包括半导体衬底，设置在半导体衬底上的多个非易失性存储单元，所述多个非易失性存储单元中的每一个包括设置在所述半导体衬底上的第一绝缘膜，设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上方的控制栅电极，设置在所述控制栅电极和所述电荷存储层之间的第二绝缘膜，所述相邻电荷存储层之间的所述第二绝缘膜包括具有低于所述第二绝缘膜的介电常数的第一区域在电荷存储层的顶表面上，以非易失性存储单元的沟道宽度方向的横截面视图，并且第一区域具有与电荷存储层的顶表面上的第二绝缘膜不同的组成。

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