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11. 发明申请

US20090017354A1 FUEL CELL 有权
标题翻译：燃料电池
公开(公告)号：US20090017354A1
公开(公告)日：2009-01-15
申请号：US10595748
申请日：2004-11-15
申请人： Masaya Yano , Masakazu Sugimoto , Takuji Okeyui , Toshio Araki
发明人： Masaya Yano , Masakazu Sugimoto , Takuji Okeyui , Toshio Araki
IPC分类号： H01M8/02 , H01M8/10
CPC分类号： H01M8/0276 , H01M8/0206 , H01M8/023 , H01M8/026 , H01M8/0263 , H01M8/028 , H01M8/0286 , H01M2008/1095 , H01M2250/30 , Y02B90/18
摘要： The present invention relates to and provides a fuel cell in which sealing can be reliably made for each unit cell, thereby, enabling thinning, facilitating maintenance, and enabling miniaturization and weight reduction, and enabling free shape design. A fuel cell of the present invention is characterized by comprising a sheet-like solid polymer electrolyte 1 and a pair of electrode plates 2, 3 arranged on both sides of the solid polymer electrolyte 1, and further comprising a pair of metallic plates 4, 5 arranged on both sides of the electrode plates 2, 3, and provided flow path grooves 9, and inlets 4c, 5c and outlets communicating with the flow path grooves, wherein the peripheral edges of the metallic plates 4, 5 are mechanically sealed with an insulation material 6 interposed between the metallic plates.
摘要翻译：本发明涉及并提供一种燃料电池，其中可以可靠地为每个单电池进行密封，从而能够进行减薄，便于维护，并且能够实现小型化和轻量化，并且能够实现自由形状设计。本发明的燃料电池的特征在于包括片状固体聚合物电解质1和布置在固体聚合物电解质1两侧的一对电极板2,3，还包括一对金属板4,5 设置在电极板2,3的两侧，并且设置有流路槽9和与流路槽连通的入口4c，5c和出口，其中金属板4,5的周边边缘用绝缘体机械密封介于金属板之间的材料6。

12. 发明申请

US20070241445A1 Semiconductor Device, Substrate for Producing Semiconductor Device and Method of Producing Them 失效
标题翻译：半导体装置，半导体装置用基板及其制造方法
公开(公告)号：US20070241445A1
公开(公告)日：2007-10-18
申请号：US11632348
申请日：2005-07-13
申请人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
发明人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
IPC分类号： H01L23/48 , H01L21/00
CPC分类号： H01L21/568 , H01L21/4828 , H01L21/4832 , H01L21/6835 , H01L23/3107 , H01L23/49548 , H01L23/49582 , H01L23/62 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2221/68377 , H01L2224/2919 , H01L2224/32057 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2224/838 , H01L2224/85001 , H01L2224/85205 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12044 , H01L2924/181 , H01L2924/20752 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2924/3512
摘要： A semiconductor device P includes a die pad 20, a semiconductor element 30 which is loaded on the die pad 20, and a sealing resin 40. A plurality of electrically conductive portions 10 each having a layered structure including a metal foil 1 comprising copper or a copper alloy, and electrically conductive portion plating layers 2 provided at both upper and lower ends of the metal foil 1 are arranged around the die pad 20. The die pad 20 has a lower die pad plating layer 2b, and the semiconductor element 30 is loaded on the die pad 20 comprising such a die pad plating layer 2b. Electrodes 30a provided on the semiconductor element 30 are electrically connected with top ends of the electrically conductive portions 10 via wires 3, respectively. The lower electrically conductive portion plating layers 2 of the electrically conductive portions 10 and the die pad plating layer 2b of the die pad 20 are exposed outside from the sealing resin 40 on their back faces.
摘要翻译：半导体器件P包括管芯焊盘20，负载在管芯焊盘20上的半导体元件30和密封树脂40。每个具有包括铜或铜合金的金属箔1的层状结构的多个导电部分10和设置在金属箔1的上端和下端的导电部分镀层2围绕管芯焊盘20布置。管芯焊盘20具有下焊盘镀覆层2b，并且将半导体元件30装载在包括这种管芯焊盘镀层2b的管芯焊盘20上。设置在半导体元件30上的电极30a分别经由导线3与导电部10的顶端电连接。导电部分10的下部导电部分电镀层2和芯片焊盘20的芯片焊盘镀层2b在其背面从密封树脂40的外部露出。

13. 发明申请

US20050253286A1 Epoxy resin composition for semiconductor encapsulation, semiconductor device using the same, and process for producing semiconductor device 失效
标题翻译：用于半导体封装的环氧树脂组合物，使用该环氧树脂组合物的半导体器件，以及半导体器件的制造方法
公开(公告)号：US20050253286A1
公开(公告)日：2005-11-17
申请号：US11115307
申请日：2005-04-27
申请人： Keisuke Yoshikawa , Kazuhito Hosokawa , Takuji Okeyui , Kazuhiro Ikemura
发明人： Keisuke Yoshikawa , Kazuhito Hosokawa , Takuji Okeyui , Kazuhiro Ikemura
IPC分类号： C08G59/00 , C08G59/62 , C08G59/68 , C08L63/00 , C09J163/00 , H01L21/48 , H01L21/56 , H01L23/29 , H01L23/31 , H01L23/495
CPC分类号： H01L21/568 , C08G59/621 , C08G59/688 , C09J163/00 , H01L23/293 , H01L23/3107 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01004 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , Y10T428/1073 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An epoxy resin composition for semiconductor encapsulation in producing surface mount lead-less thin semiconductor devices. The epoxy resin composition for surface mount lead-less semiconductor device encapsulation which device comprising an encapsulating resin layer and, encapsulated therein, a substrate, a semiconductor element mounted on the substrate, two or more conductive parts disposed around the semiconductor element, and wires which electrically connect electrodes of the semiconductor element to the conductive parts, wherein the bottom face of the substrate and the bottom face of each conductive part are exposed without being encapsulated in the encapsulating resin layer, and the epoxy resin composition used for forming the encapsulating resin layer has the following properties (α) and (β): (α) a melt viscosity of 2-10 Pa.s at 175° C.; and (β) a flexural strength of cured state of 130 MPa or higher at ordinary temperature.
摘要翻译：一种用于半导体封装的环氧树脂组合物，用于生产表面安装无铅薄型半导体器件。用于表面安装的无铅半导体器件封装的环氧树脂组合物，其包括封装树脂层，并且封装在其中的衬底，安装在衬底上的半导体元件，设置在半导体元件周围的两个或更多个导电部件，以及电线将半导体元件的电极电连接到导电部分，其中基板的底面和每个导电部分的底面暴露而不被封装在封装树脂层中，并且用于形成封装树脂层的环氧树脂组合物具有以下性质（α）和（β）：（α）在175℃下的熔体粘度为2-10Pa.s; 和（β）常温下固化状态的弯曲强度为130MPa以上。

14. 发明授权

US06245188B1 Process for the removal of resist material 失效
标题翻译：去除抗蚀材料的方法
公开(公告)号：US06245188B1
公开(公告)日：2001-06-12
申请号：US09348834
申请日：1999-07-08
申请人： Eiji Toyoda , Makoto Namikawa , Takuji Okeyui
发明人： Eiji Toyoda , Makoto Namikawa , Takuji Okeyui
IPC分类号： B32B3500
CPC分类号： G03F7/42 , B08B7/0028 , Y10S156/922 , Y10T156/11 , Y10T156/1147 , Y10T156/1179
摘要： The present invention provides a process for the peeling of a resist material with a pressure-sensitive adhesive sheet which involves the improvement in the removal of resist material or the enhancement of peelability of resist material to certainly remove the resist material from the object regardless of the properties or treated state of the resist material. The process comprises (1) after the application of the pressure-sensitive adhesive sheet, effecting a stress-imparting treatment which causes shrinkage or expansion of the pressure-sensitive adhesive sheet so that a stress develops at the interface between the resist material and the object or (2) prior to the application of the resist material to the object, effecting surface treatment to the object such that the surface of the object has a surface free energy of to not greater than 60 dyne/cm.
摘要翻译：本发明提供一种用压敏粘合片剥离抗蚀剂材料的方法，该方法涉及抗蚀剂材料的去除改进或抗蚀剂材料的剥离性的提高，以确保从物体上除去抗蚀剂材料，而不管性质或抗蚀剂材料的处理状态。该方法包括（1）在施加压敏粘合片之后，进行应力赋予处理，使压敏粘合片收缩或膨胀，使得在抗蚀剂材料和物体之间的界面产生应力或（2）在将抗蚀剂材料施加到物体之前，对物体进行表面处理，使得物体的表面具有不大于60达因/厘米3的表面自由能。

15. 发明授权

US08525351B2 Semiconductor device, substrate for producing semiconductor device and method of producing them 失效
标题翻译：半导体装置，半导体装置的制造用基板及其制造方法
公开(公告)号：US08525351B2
公开(公告)日：2013-09-03
申请号：US13207096
申请日：2011-08-10
申请人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
发明人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
IPC分类号： H01L23/485
CPC分类号： H01L21/568 , H01L21/4828 , H01L21/4832 , H01L21/6835 , H01L23/3107 , H01L23/49548 , H01L23/49582 , H01L23/62 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2221/68377 , H01L2224/2919 , H01L2224/32057 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2224/838 , H01L2224/85001 , H01L2224/85205 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12044 , H01L2924/181 , H01L2924/20752 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2924/3512
摘要： A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.
摘要翻译：半导体器件包括管芯焊盘，负载在管芯焊盘上的半导体元件和密封树脂。多个导电部分，每个导电部分具有包括铜或铜合金的金属箔的层状结构，以及设置在金属箔的上端和下端的导电部分镀层围绕芯片焊盘。芯片焊盘具有下模板镀层，半导体元件被装载在包括这样的芯片焊盘镀层的芯片焊盘上。设置在半导体元件上的电极分别通过导线与导电部分的顶端电连接。导电部分的下部导电部分电镀层和芯片焊盘的芯片焊盘镀层在其背面上从密封树脂的外部露出。

16. 发明申请

US20080048311A1 Semiconductor Device, Substrate for Producing Semiconductor Device and Method of Producing Them 有权
标题翻译：半导体装置，半导体装置用基板及其制造方法
公开(公告)号：US20080048311A1
公开(公告)日：2008-02-28
申请号：US11632131
申请日：2005-07-13
申请人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
发明人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L21/6835 , H01L21/4828 , H01L21/568 , H01L23/3107 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2221/68377 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83385 , H01L2224/85205 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/10253 , H01L2924/12041 , H01L2924/181 , H01L2924/18165 , H01L2924/20752 , H01L2924/00014 , H01L2224/85 , H01L2924/00 , H01L2924/20305 , H01L2924/00012
摘要： A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheet 50 having a base layer 51 and an adhesive layer 52, and a plurality of independently provided electrically conductive portions 20. A semiconductor element having electrodes 11 formed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portions 20 and the electrodes 11 of the semiconductor element 10 are electrically connected by using wires 30. The semiconductor element 10, wires 30 and electrically conductive portions 20 are sealed by using a sealing resin 40. Each of the electrically conductive portions 20 has overhanging portions 20a, and a side face 60a of the electrically conductive portion 20 is roughened, thus enhancing the joining strength between each electrically conductive portion 20 and the sealing resin 40.
摘要翻译：使用用于制造半导体器件的基板B，该基板包括具有基底层51和粘合层52的粘合片50以及多个独立设置的导电部分20.具有形成电极11的半导体元件其上牢固地固定在基板B上，并且多个导电部分20的上部和半导体元件10的电极11通过使用导线30电连接。半导体元件10，导线30和导电部分20是通过使用密封树脂40密封。每个导电部分20具有突出部分20a，并且导电部分20的侧面60a被粗糙化，从而增强每个导电部分20与密封件之间的接合强度树脂40。

17. 发明授权

US07064011B2 Semiconductor device fabricating apparatus and semiconductor device fabricating method 失效
公开(公告)号：US07064011B2
公开(公告)日：2006-06-20
申请号：US10781947
申请日：2004-02-20
申请人： Chikao Ikenaga , You Shimazaki , Masachika Masuda , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
发明人： Chikao Ikenaga , You Shimazaki , Masachika Masuda , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
IPC分类号： H01L21/44 , H01L21/50
CPC分类号： H01L21/568 , H01L21/4832 , H01L21/6835 , H01L23/3107 , H01L23/49548 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2224/32057 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2224/85001 , H01L2224/85385 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/18165 , H01L2924/00014 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/01028 , H01L2924/3512 , H01L2924/20752 , H01L2924/00012
摘要： A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.

18. 发明授权

US06565704B2 Process for the removal of resist material 失效
标题翻译：去除抗蚀材料的方法
公开(公告)号：US06565704B2
公开(公告)日：2003-05-20
申请号：US09833812
申请日：2001-04-13
申请人： Eiji Toyoda , Makoto Namikawa , Takuji Okeyui
发明人： Eiji Toyoda , Makoto Namikawa , Takuji Okeyui
IPC分类号： B32B3500
CPC分类号： G03F7/42 , B08B7/0028 , Y10S156/922 , Y10T156/11 , Y10T156/1147 , Y10T156/1179
摘要： The present invention provides a process for the peeling of a resist material with a pressure-sensitive adhesive sheet which involves the improvement in the removal of resist material or the enhancement of peelability of resist material to certainly remove the resist material from the object regardless of the properties or treated state of the resist material. The process comprises (1) after the application of the pressure-sensitive adhesive sheet, effecting a stress-imparting treatment which causes shrinkage or expansion of the pressure-sensitive adhesive sheet so that a stress develops at the interface between the resist material and the object or (2) prior to the application of the resist material to the object, effecting surface treatment to the object such that the surface of the object has a surface free energy of to not greater than 60 dyne/cm.
摘要翻译：本发明提供一种用压敏粘合片剥离抗蚀剂材料的方法，该方法涉及抗蚀剂材料的去除改进或抗蚀剂材料的剥离性的提高，以确保从物体上除去抗蚀剂材料，而不管性质或抗蚀剂材料的处理状态。该方法包括（1）在施加压敏粘合片之后，进行应力赋予处理，使压敏粘合片收缩或膨胀，使得在抗蚀剂材料和物体之间的界面产生应力或（2）在将抗蚀剂材料施加到物体之前，对物体进行表面处理，使得物体的表面具有不大于60达因/厘米3的表面自由能。

19. 发明授权

US06335076B1 Multi-layer wiring board and method for manufacturing the same 有权
标题翻译：多层布线板及其制造方法
公开(公告)号：US06335076B1
公开(公告)日：2002-01-01
申请号：US09615761
申请日：2000-07-13
申请人： Kei Nakamura , Masakazu Sugimoto , Yasushi Inoue , Megumu Nagasawa , Takuji Okeyui
发明人： Kei Nakamura , Masakazu Sugimoto , Yasushi Inoue , Megumu Nagasawa , Takuji Okeyui
IPC分类号： B32B1508
CPC分类号： H05K3/462 , H05K3/4038 , H05K3/445 , H05K2201/0305 , H05K2201/09536 , Y10S428/901 , Y10T156/10 , Y10T428/24273 , Y10T428/24917 , Y10T428/266 , Y10T428/31681
摘要： A plurality of double-sided circuit boards 1 in which a circuit 4 is provided on either side of an insulating layer 3 comprising an organic high molecular resin with an alloy foil 2 as a basic substance, and two circuits 4 are electrically connected by a via with a soldered conductor 5a filled therein are laminated via an adhesive layer 6. The adhesive layer 6 has a bore opened at a predetermined position of a portion in direct contact with the circuits 4 of two double-sided circuit boards 1. A bore portion is provided with a soldered conductor 7. The circuits 4 of the two double-sided circuit boards 1 are electrically connected by the soldered conductor 7.
摘要翻译：多个双面电路板1，其中电路4设置在包含有合成箔2作为基本物质的有机高分子树脂的绝缘层3的两侧，以及两个电路4通过通孔其中填充有焊接导体5a通过粘合剂层6层压。粘合层6具有在与两个双面电路板1的电路4直接接触的部分的预定位置处开口的孔。孔部分设置有焊接导体7.两个双面电路板1的电路4由焊接导体7电连接。

20. 发明申请

US20110291303A1 Semiconductor Device, Substrate for Producing Semiconductor Device and Method of Producing Them 失效
标题翻译：半导体装置，半导体装置用基板及其制造方法
公开(公告)号：US20110291303A1
公开(公告)日：2011-12-01
申请号：US13207096
申请日：2011-08-10
申请人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
发明人： Chikao Ikenaga , Kentarou Seki , Kazuhito Hosokawa , Takuji Okeyui , Keisuke Yoshikawa , Kazuhiro Ikemura
IPC分类号： H01L23/485 , H01L21/60
CPC分类号： H01L21/568 , H01L21/4828 , H01L21/4832 , H01L21/6835 , H01L23/3107 , H01L23/49548 , H01L23/49582 , H01L23/62 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2221/68377 , H01L2224/2919 , H01L2224/32057 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2224/838 , H01L2224/85001 , H01L2224/85205 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12044 , H01L2924/181 , H01L2924/20752 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2924/3512
摘要： A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.
摘要翻译：半导体器件包括管芯焊盘，负载在管芯焊盘上的半导体元件和密封树脂。多个导电部分，每个导电部分具有包括铜或铜合金的金属箔的层状结构，以及设置在金属箔的上端和下端的导电部分镀层围绕芯片焊盘。芯片焊盘具有下模板镀层，半导体元件被装载在包括这样的芯片焊盘镀层的芯片焊盘上。设置在半导体元件上的电极分别通过导线与导电部分的顶端电连接。导电部分的下部导电部分电镀层和芯片焊盘的芯片焊盘镀层在其背面上从密封树脂的外部露出。

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