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    • 11. 发明授权
    • Method and apparatus for detecting a sinusoidal signal using a counter and queue
    • 使用计数器和队列检测正弦信号的方法和装置
    • US06246267B1
    • 2001-06-12
    • US09286998
    • 1999-04-07
    • Maged F. BarsoumHungming ChangEugen GershonChien-Meen HwangMuoi V. Huynh
    • Maged F. BarsoumHungming ChangEugen GershonChien-Meen HwangMuoi V. Huynh
    • G01R2500
    • G01R19/25
    • A method and apparatus for detecting a sinusoidal signal samples a received signal. An error signal generator receives at its inputs a previous sample of the received signal and a current sample of the received signal and generates an error signal based on these previous and current samples. A comparison circuit compares the generated error signal for the current sample to an error threshold value and generates a threshold comparison signal with a first value that indicates the generated error signal is below the error threshold value for a second value that indicates a generated error signal is above the error threshold value. A determination circuit then determines whether the received signal is a sinusoidal signal based on a threshold comparison signal generated for a plurality of samples. The determination circuit includes a counter that maintains a count of the number of threshold comparison signals having the first value within a sampling period.
    • 用于检测正弦信号的接收信号的采样方法和装置。 误差信号发生器在其输入端接收接收信号的先前采样和接收信号的当前采样,并根据这些先前和当前采样产生误差信号。 比较电路将当前采样的所产生的误差信号与误差阈值进行比较,并产生具有第一值的阈值比较信号,该第一值指示所产生的误差信号低于第二值的误差阈值,该第二值指示所产生的误差信号为 高于误差阈值。 然后,确定电路基于为多个样本生成的阈值比较信号来确定接收到的信号是否是正弦信号。 确定电路包括计数器,其维持在采样周期内具有第一值的阈值比较信号的数量的计数。
    • 12. 发明授权
    • Method and system for analog-to-digital signal conversion with
simultaneous analog signal compression
    • 具有同步模拟信号压缩的模数转换信号的方法和系统
    • US5760730A
    • 1998-06-02
    • US826585
    • 1997-04-03
    • Matthew J. FischerEugen Gershon
    • Matthew J. FischerEugen Gershon
    • H03M1/10H03M1/36H03M1/38
    • H03M1/367H03M1/1019
    • A circuit is provided to carry out conversion and an analog signal into a digital signal, simultaneously with compression of the analog signal. An input analog signal buffered by a sample-and-hold circuit is supplied to a chain of amplifier stages having equal gains greater than 1. A set of comparators compares the output signal of each amplifier stage with a reference value. As soon as the output of any amplifier stage exceeds the reference value, an output of the corresponding comparator becomes active indicating the number of amplifier stages that were required to make the input signal higher than the reference value. A digital output device uses the comparator output signals to produce a digital signal proportional to the input signal level. As the amplifier chain is arranged so as to increase its total gain for a lower level of the input analog signal with respect to its total gain for a higher level of the input analog signal, the conversion circuit compresses the input analog signal simultaneously with its conversion into the digital signal.
    • 提供一个电路,用于与压缩模拟信号同时进行数字信号转换和模拟信号。 由采样和保持电路缓冲的输入模拟信号被提供给具有大于1的相等增益的放大器级链。一组比较器将每个放大器级的输出信号与参考值进行比较。 一旦任何放大器级的输出超过参考值,相应比较器的输出将变为有效,指示使输入信号高于参考值所需的放大器级数。 数字输出设备使用比较器输出信号产生与输入信号电平成比例的数字信号。 由于放大器链被布置成为输入模拟信号的较低电平相对于输入模拟信号的较高电平的总增益增加其总增益,所以转换电路在其转换时同时压缩输入模拟信号 进入数字信号。
    • 13. 发明授权
    • All digital on-the-fly time delay calibrator
    • 所有数字即时延时校准器
    • US5457719A
    • 1995-10-10
    • US105079
    • 1993-08-11
    • Bin GuoJim KubinecEugen Gershon
    • Bin GuoJim KubinecEugen Gershon
    • H03H17/08H03K5/13H03K5/135H03L7/06H04L7/033H03D3/24
    • H03K5/135H03K5/131
    • An on-chip digital servo scheme for providing continuous calibration of integrated circuit on-chip time delay devices to provide real-time regulation against various parameter or environmental changes, such as processing, temperature and power supply variations. The techniques are particularly useful for semiconductor delay lines comprised of a selectable number of identical unit delay circuits having the same propagation time. This scheme constantly monitors the delay changes in the unit delay elements and calibrates the delay line by comparing the delay against a stable, crystal controlled reference clock period to determine, in each instance, how many unit delay elements in the delay line is needed to effectively delay the amount of time to equal the reference clock period. A real time digital pointer number is generated and updated while the device is in operation. This pointer can be used to inform or update other delay or time bases on the same integrated circuit substrate which are constructed from the same type of unit delay cell and which may choose to use a different number of unit delay cells. Accordingly, this scheme can then be used for various delay regulation purposes in and all-digital circuit, such as clock multiplication, pulse width regulation, and other applications where accurate, regulated, digital command controlled delay or time bases are needed.
    • 一种片上数字伺服方案,用于提供集成电路片上延时器件的连续校准,以便针对各种参数或环境变化(如处理,温度和电源变化)提供实时调节。 这些技术对于具有相同传播时间的可选数量的相同单元延迟电路组成的半导体延迟线特别有用。 该方案通过将延迟与稳定的晶体控制的参考时钟周期进行比较来不断地监视单位延迟元件中的延迟变化并校准延迟线,以便在每种情况下确定延迟线中有效地需要多少单位延迟元件 延迟等于参考时钟周期的时间量。 在设备运行时生成和更新实时数字指针号。 该指针可以用于通知或更新由相同类型的单元延迟单元构造并且可以选择使用不同数量的单位延迟单元的同一集成电路基板上的其他延迟或时基。 因此,该方案然后可用于各种延迟调节目的和全数字电路,例如时钟倍增,脉冲宽度调节以及需要精确,调节的数字命令控制延迟或时基的其他应用。
    • 15. 发明授权
    • Low-density parity-check code based error correction for memory device
    • 用于存储器件的基于低密度奇偶校验码的纠错
    • US08301963B2
    • 2012-10-30
    • US11877497
    • 2007-10-23
    • Ping HouEugen Gershon
    • Ping HouEugen Gershon
    • H03M13/00G11C29/00
    • G06F21/73G06F11/1068G06F2221/2129H03M13/1111H03M13/1197
    • An accumulative repeat encoder facilitates encoding data written to memory, such that parity data is generated in accordance with a low-density parity-check (LDPC) code. The original data and associated parity data is stored in memory. During a read operation, a decoder component utilizes the parity data based on the LDPC code to facilitate decoding the data being read from memory. The decoder component is iterative and provides one or more decoding results based on probabilities that symbols or bits comprising the data have correct values. The decoder component analyzes a decoding result and references a parity-check matrix structured in accordance with the LDPC code to determine the accuracy of the decoding result. If the decoding result attains a desired accuracy, the decoding result is determined to represent the original data and is provided as an output.
    • 累积重复编码器有助于编码写入存储器的数据,使得根据低密度奇偶校验(LDPC)码产生奇偶校验数据。 原始数据和相关的奇偶校验数据存储在存储器中。 在读取操作期间,解码器组件利用基于LDPC码的奇偶校验数据来促进从存储器读取的数据的解码。 解码器组件是迭代的,并且基于包括数据的符号或位的正确值的概率提供一个或多个解码结果。 解码器组件分析解码结果并参考根据LDPC码构造的奇偶校验矩阵,以确定解码结果的准确性。 如果解码结果达到期望的精度,则确定解码结果以表示原始数据,并将其提供为输出。
    • 16. 发明授权
    • Adaptive detection of threshold levels in memory
    • 内存阈值水平的自适应检测
    • US07672161B2
    • 2010-03-02
    • US11742371
    • 2007-04-30
    • Ping HouEugen GershonMichael A. Van Buskirk
    • Ping HouEugen GershonMichael A. Van Buskirk
    • G11C11/03
    • G11C11/5642
    • Systems, methods, and/or devices that facilitate accessing data from memory are presented. An adaptive detection component can be employed to reduce or minimize detection error and distinguish information stored in memory cells during read operations. A decoder component can include the adaptive detection component, which can employ an adaptive Linde-Buzo-Gray (LBG) algorithm. The decoder component can receive information associated with a current level from a memory location during a read operation, and can analyze and process such information. The adaptive detection component can receive the processed information and, along with other information, can process such information using the iterative LBG algorithm until reconstruction levels and corresponding threshold levels are determined. Such reconstruction levels and/or threshold levels can be compared to the value associated with the information read from the memory location to determine the data value of the data in the memory location.
    • 介绍了便于从存储器访问数据的系统,方法和/或设备。 可以采用自适应检测部件来减少或最小化检测误差,并且在读取操作期间区分存储在存储器单元中的信息。 解码器组件可以包括自适应检测组件,其可以采用自适应林德 - 布佐灰色(LBG)算法。 解码器组件可以在读取操作期间从存储器位置接收与当前级别相关联的信息,并且可以分析和处理这样的信息。 自适应检测组件可以接收经处理的信息,并且与其他信息一起可以使用迭代LBG算法来处理这样的信息,直到确定重建级别和对应的阈值级别为止。 可以将这样的重建级别和/或阈值级别与与从存储器位置读取的信息相关联的值进行比较,以确定存储器位置中的数据的数据值。
    • 17. 发明授权
    • Method for determining a decimation pattern in a network communications receiver
    • 用于确定网络通信接收机中的抽取模式的方法
    • US06651078B1
    • 2003-11-18
    • US09510775
    • 2000-02-23
    • Eugen GershonChien-Meen Hwang
    • Eugen GershonChien-Meen Hwang
    • G06F1717
    • H03H17/0664
    • A method for selecting a decimation phase of a decimation filter includes determining a phase strength value for each phase of a plurality of phases. The quantity of phases corresponds to the decimation factor of the decimation filter. The phase strength value for a particular phase group may be representative of the sum of the magnitudes of a plurality of phase values in such particular phase group. The phase strength value for a particular phase group may represent the sum of the squares of a plurality of phase values in the group. The phase of the decimation filter is set to retain the phase with the greatest phase strength value and to filter, or decimate, the other phases.
    • 用于选择抽取滤波器的抽取相位的方法包括确定多相的各相的相位强度值。 相位量对应于抽取滤波器的抽取因子。 特定相位组的相位强度值可以表示这种特定相位组中的多个相位值的幅度之和。 特定相位组的相位强度值可以表示组中的多个相位值的平方和。 设置抽取滤波器的相位以保持具有最大相位强度值的相位并且对其它相进行滤波或抽取。
    • 20. 发明授权
    • Differential encoding arrangement for a discrete multi-tone transmission system
    • 用于离散多音调传输系统的差分编码装置
    • US06434188B1
    • 2002-08-13
    • US09286989
    • 1999-04-07
    • Chien-Meen HwangHungming ChangMaged F. BarsoumMuoi V. HuynhEugen GershonFred BerkowitzBin Guo
    • Chien-Meen HwangHungming ChangMaged F. BarsoumMuoi V. HuynhEugen GershonFred BerkowitzBin Guo
    • H04B138
    • H04L27/2602
    • A random-access local network having multiple nodes provides data communication across residential wiring such as telephone line as a network medium, where each node accesses the network medium using discrete multi-tone (DMT) modulated symbols. The effects of amplitude and phase distortion of transmitted DMT symbols are overcome, without the necessity of complex equalizers, by differentially encoding data prior to transmission, and recovering the transmitted data by comparing phase differentials between consecutive symbol tones. Each transmitted symbol is composed of a plurality of tone signals, each tone signal modulated according to a constellation point in a complex domain. A transmitter modulates data, such as a bit-pair, to a new constellation point based on the value of the bit-pair and a prior position of a consecutively-preceding constellation point, such that the data is represented by the difference in positions between the consecutively-preceding constellation point and the new constellation point. The constellation points are then used to modulate a selected one of the tone signals. Although a receiver detecting the modulated tone signal may recover the transmitted constellation points at different absolute positions due to distortion on he network medium, the relative difference between the consecutively-preceding constellation point and the new constellation point is preserved, enabling the receiver to recover the transmitted data based on the relative difference in positions of the consecutive constellation points. Hence, entire bit stream can reliably transmitted using position changes between consecutive constellation points.
    • 具有多个节点的随机接入本地网络提供诸如作为网络媒体的电话线等住宅布线之间的数据通信,其中每个节点使用离散多音(DMT)调制符号来访问网络介质。 通过在传输之前对数据进行差分编码,并且通过比较连续符号音之间的相位差来恢复发送的数据,克服了传输的DMT符号的幅度和相位失真的影响,而不需要复数均衡器。 每个发送的符号由多个音调信号组成,每个音调信号根据复杂域中的星座点进行调制。 发射机基于比特对的值和连续前面的星座点的先前位置,将诸如比特对的数据调制到新的星座点,使得数据由 连续前面的星座点和新的星座点。 然后使用星座点来调制所选择的一个音调信号。 虽然检测调制音信号的接收机可以由于网络介质上的失真而恢复在不同绝对位置处的发射星座点,但保持连续前面的星座点与新星座点之间的相对差异,使得接收机能够恢复 基于连续星座点的位置的相对差异发送数据。 因此,使用连续星座点之间的位置变化可以可靠地发送整个比特流。