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11. 发明申请

US20140061786A1 Double Diffused Metal Oxide Semiconductor Device and Manufacturing Method Thereof 审中-公开
标题翻译：双扩散金属氧化物半导体器件及其制造方法
公开(公告)号：US20140061786A1
公开(公告)日：2014-03-06
申请号：US13603385
申请日：2012-09-04
申请人： Tsung-Yi Huang , Chien-Wei Chiu
发明人： Tsung-Yi Huang , Chien-Wei Chiu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66681 , H01L29/063 , H01L29/0696 , H01L29/1083 , H01L29/42368 , H01L29/7816 , H01L29/7835
摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes a first conductive type substrate, a second conductive type high voltage well, a first conductive type deep buried region, a field oxide region, a first conductive type body region, a gate, a second conductive type source, and a second conductive type drain. The deep buried region is formed below the high voltage well with a gap in between, and the gap is not less than a predetermined distance.
摘要翻译：本发明公开了一种双扩散金属氧化物半导体（DMOS）器件及其制造方法。 DMOS器件包括第一导电型衬底，第二导电型高电压阱，第一导电类型深埋入区域，场氧化物区域，第一导电类型体区域，栅极，第二导电型源极和第二导电类型源极导电型漏极。深埋区域形成在高压井的下方，间隙为间隙，间隙不小于预定距离。

12. 发明申请

US20130207185A1 ISOLATED DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：隔离装置及其制造方法
公开(公告)号：US20130207185A1
公开(公告)日：2013-08-15
申请号：US13370691
申请日：2012-02-10
申请人： Tsung-Yi Huang , Chien-Wei Chiu
发明人： Tsung-Yi Huang , Chien-Wei Chiu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/086 , H01L29/0611 , H01L29/0615 , H01L29/0619 , H01L29/0847 , H01L29/1083 , H01L29/66492 , H01L29/66659 , H01L29/7835
摘要： An isolated device is formed in a substrate in which is formed a high voltage device. The isolated device includes: an isolated well formed in the substrate by a lithography process and an ion implantation process used in forming the high voltage device; a gate formed on the substrate; a source and a drain, which are located in the isolated well at both sides of the gate respectively; a drift-drain region formed beneath the substrate surface, wherein the gate and the drain are separated by the drift-drain region, and the drain is in the drift-drain region; and a mitigation region, which is formed in the substrate and has a shallowest portion located at least below 90% of a depth of the drift-drain region as measured from the substrate surface, wherein the mitigation region and the drift-drain region are defined by a same lithography process.
摘要翻译：隔离器件形成在形成高电压器件的衬底中。隔离装置包括：通过光刻工艺在衬底中形成的隔离阱和用于形成高压器件的离子注入工艺; 形成在基板上的栅极; 源极和漏极分别位于门的两侧的隔离井中; 形成在所述衬底表面下方的漂移漏极区，其中所述栅极和所述漏极由所述漂移 - 漏极区分离，并且所述漏极在所述漂移 - 漏极区中; 以及缓解区域，其形成在所述衬底中，并且具有位于所述衬底表面测量的至少位于所述漂移 - 漏极区域的深度的90％以下的最浅部分，其中所述缓解区域和所述漂移 - 漏极区域被限定通过相同的光刻工艺。

13. 发明授权

US09362381B2 Insulated gate bipolar transistor with a lateral gate structure and gallium nitride substrate and manufacturing method thereof 有权
标题翻译：具有横向栅极结构和氮化镓衬底的绝缘栅双极晶体管及其制造方法
公开(公告)号：US09362381B2
公开(公告)日：2016-06-07
申请号：US14971496
申请日：2015-12-16
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/66 , H01L29/73 , H01L29/10 , H01L29/20 , H01L29/201 , H01L27/07
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并且具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

14. 发明申请

US20160111519A1 INSULATED GATE BIPOLAR TRANSISTOR WITH A LATERAL GATE STRUCTURE AND GALLIUM NITRIDE SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：具有侧壁结构和氮化镓基板的绝缘栅双极晶体管及其制造方法
公开(公告)号：US20160111519A1
公开(公告)日：2016-04-21
申请号：US14971496
申请日：2015-12-16
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/66 , H01L27/07 , H01L29/201 , H01L29/10 , H01L29/20
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

15. 发明授权

US09252219B2 Insulated gate bipolar transistor with a lateral gate structure and gallium nitride substrate 有权
标题翻译：具有横向栅极结构和氮化镓衬底的绝缘栅双极晶体管
公开(公告)号：US09252219B2
公开(公告)日：2016-02-02
申请号：US14464220
申请日：2014-08-20
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/73 , H01L29/66 , H01L29/20 , H01L29/423 , H01L29/778
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

16. 发明授权

US09245945B1 Semiconductor device having weak current channel 有权
标题翻译：具有弱电流通道的半导体器件
公开(公告)号：US09245945B1
公开(公告)日：2016-01-26
申请号：US14534955
申请日：2014-11-06
申请人： Tsung-Yi Huang , Chien-Wei Chiu , Huang-Ping Chu , Chien-Kai Chang
发明人： Tsung-Yi Huang , Chien-Wei Chiu , Huang-Ping Chu , Chien-Kai Chang
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L29/06 , H01L29/78
CPC分类号： H01L29/7833 , H01L29/063 , H01L29/0653 , H01L29/0692 , H01L29/42368 , H01L29/7816
摘要： The invention provides a semiconductor device having a weak current channel. The semiconductor device includes a gate, a source and a drain. There are a plurality of insulation layers and a plurality of first conductive type lightly doped regions alternatingly arranged between the gate and the drain; each of the first conductive type lightly doped regions providing a weak current channel between the source and the drain. When the gate is in a relatively low voltage range, the weak current channel is conducted; when the gate is in a relatively high voltage range, the weak current channel is not conducted.
摘要翻译：本发明提供一种具有弱电流通道的半导体器件。半导体器件包括栅极，源极和漏极。存在多个绝缘层和交替布置在栅极和漏极之间的多个第一导电类型轻掺杂区域; 每个第一导电类型的轻掺杂区域在源极和漏极之间提供弱电流通道。当栅极处于相对较低的电压范围时，进行弱电流通道; 当栅极处于相对较高的电压范围时，不会导通弱电流通道。

17. 发明申请

US20150130067A1 OHMIC CONTACT STRUCTURE AND SEMICONDUCTOR DEVICE HAVING THE SAME 审中-公开
标题翻译： OHMIC接触结构和具有相同的半导体器件
公开(公告)号：US20150130067A1
公开(公告)日：2015-05-14
申请号：US14076768
申请日：2013-11-11
申请人： Chien-Wei Chiu , Ting-Wei Liao , Chieh-Hsiung Kuan , Tsung-Yi Huang , Tsung-Yu Yang
发明人： Chien-Wei Chiu , Ting-Wei Liao , Chieh-Hsiung Kuan , Tsung-Yi Huang , Tsung-Yu Yang
IPC分类号： H01L29/41 , H01L29/45
CPC分类号： H01L29/45 , H01L21/28512 , H01L21/28525 , H01L21/28575 , H01L29/0688 , H01L29/2003 , H01L29/41725 , H01L29/452 , H01L29/872
摘要： This invention provides an ohmic contact structure including: a semiconductor substrate having a top surface which includes a plurality of micro-structures; and a conductive layer, which is formed on the micro-structures. An ohmic contact is formed by the conductive layer and the semiconductor substrate. The present invention also provides a semiconductor device having the ohmic contact structure.
摘要翻译：本发明提供一种欧姆接触结构，包括：半导体衬底，其具有包括多个微结构的顶表面; 以及形成在微结构上的导电层。由导电层和半导体衬底形成欧姆接触。本发明还提供一种具有欧姆接触结构的半导体器件。

18. 发明授权

US08710551B2 High electron mobility transistor and manufacturing method thereof 有权
标题翻译：高电子迁移率晶体管及其制造方法
公开(公告)号：US08710551B2
公开(公告)日：2014-04-29
申请号：US13597599
申请日：2012-08-29
申请人： Chih-Fang Huang , Chien-Wei Chiu , Ting-Fu Chang , Tsung-Yu Yang , Tsung-Yi Huang
发明人： Chih-Fang Huang , Chien-Wei Chiu , Ting-Fu Chang , Tsung-Yu Yang , Tsung-Yi Huang
IPC分类号： H01L31/109 , H01L31/072
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/41766 , H01L29/7787
摘要： The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.
摘要翻译：本发明公开了一种高电子迁移率晶体管（HEMT）及其制造方法。 HEMT包括半导体层，半导体层上的势垒层，阻挡层上的压电层，压电层上的栅极，栅极两侧的源极和漏极，其中半导体的每个带隙层，阻挡层和压电层部分但不完全与其它两个带隙重叠。栅极形成为用于接收栅极电压。二维电子气体（2DEG）形成在半导体层和阻挡层之间的结的一部分中，但不在压电层的至少一部分下方，其中2DEG电连接到源极和漏极。

19. 发明申请

US20140048815A1 SCHOTTKY BARRIER DIODE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：肖特彼勒二极管及其制造方法
公开(公告)号：US20140048815A1
公开(公告)日：2014-02-20
申请号：US13589784
申请日：2012-08-20
申请人： Tsung-Yi Huang , Chien-Wei Chiu , Chih-Fang Huang , Tsung-Yu Yang
发明人： Tsung-Yi Huang , Chien-Wei Chiu , Chih-Fang Huang , Tsung-Yu Yang
IPC分类号： H01L29/872 , H01L21/329
CPC分类号： H01L29/872 , H01L29/2003 , H01L29/66143
摘要： A Schottky barrier diode (SBD) is disclosed, which includes: a gallium nitride (GaN) layer, formed on a substrate; an aluminum gallium nitride (AlGaN), formed on the GaN layer; an insulation layer, formed on the AlGaN layer; an anode conducive layer, formed on the insulation layer, wherein Schottky contact is formed between a part of the anode conductive layer and the AlGaN layer or between a part of the anode conductive layer and the GaN layer, and another part of the anode conductive layer is separated from the AlGaN layer by the insulation layer; and a cathode conductive layer, formed on the AlGaN layer, wherein an ohmic contact is formed between the cathode conductive layer and the GaN layer or between the cathode conductive layer and the AlGaN layer, and wherein the anode conductive layer is not directly connected to the cathode conductive layer.
摘要翻译：公开了一种肖特基势垒二极管（SBD），其包括：形成在衬底上的氮化镓（GaN）层; 在GaN层上形成的氮化镓铝（AlGaN）; 形成在AlGaN层上的绝缘层; 形成在所述绝缘层上的阳极导电层，其中在所述阳极导电层的一部分和所述AlGaN层之间或所述阳极导电层和所述GaN层的一部分之间形成肖特基接触，并且所述阳极导电层的另一部分通过绝缘层与AlGaN层分离; 以及形成在所述AlGaN层上的阴极导电层，其中在所述阴极导电层和所述GaN层之间或所述阴极导电层与所述AlGaN层之间形成欧姆接触，并且其中所述阳极导电层不直接连接到所述阴极导电层阴极导电层。

20. 发明申请

US20140045314A1 HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：高压器件及其制造方法
公开(公告)号：US20140045314A1
公开(公告)日：2014-02-13
申请号：US14056613
申请日：2013-10-17
申请人： Tsung-Yi Huang , Chien-Wei Chiu
发明人： Tsung-Yi Huang , Chien-Wei Chiu
IPC分类号： H01L29/66
CPC分类号： H01L29/66681 , H01L29/0623 , H01L29/1083 , H01L29/66659 , H01L29/7813 , H01L29/7835
摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a substrate. The high voltage device includes: a gate, a source and drain, a drift region, and a mitigation region. The gate is formed on an upper surface of the substrate. The source and drain are located at both sides of the gate below the upper surface respectively, and the source and drain are separated by the gate. The drift region is located at least between the gate and the drain. The mitigation region is formed below the drift region, and the drift region has an edge closer to the source. A vertical distance between this edge of the drift region and the mitigation region is less than or equal to five times of a depth of the drift region.
摘要翻译：本发明公开了一种高压器件及其制造方法。高压器件形成在衬底中。高电压装置包括：栅极，源极和漏极，漂移区和缓解区。栅极形成在衬底的上表面上。源极和漏极分别位于栅极下方的两侧，源极和漏极由栅极分开。漂移区域至少位于栅极和漏极之间。缓冲区形成在漂移区下方，漂移区具有靠近源的边。漂移区域的这个边缘与缓解区域之间的垂直距离小于或等于漂移区域的深度的五倍。

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