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11. 发明专利

JP2014235052A 温度センサ回路有权
标题翻译：温度传感器电路
公开(公告)号：JP2014235052A
公开(公告)日：2014-12-15
申请号：JP2013116038
申请日：2013-05-31
申请人：株式会社豊田中央研究所 , Toyota Central R&D Labs Inc
发明人： SHIMADA HIDETO , MIZUNO KENTARO , OHIRA YOSHIE
IPC分类号： G01K7/01 , G01K7/00
摘要：【課題】発振回路から出力されるクロック信号を利用して温度を測定する温度センサ回路を提供する。【解決手段】温度センサ回路1は、クロック信号CLKを生成する発振回路2と、クロック信号CLKを利用して遅延信号S2を生成する遅延回路4と、遅延信号S2の遅延時間をクロック信号CLKのクロック数に基づいて計測する遅延時間計測回路5を備えている。温度センサ回路1では、クロック信号CLKのパルス幅の温度に対する温度依存特性と遅延信号S2の遅延時間の温度に対する温度依存特性の相違に基づいて、遅延時間計測回路5で計測されるクロック数が温度に対して変動するように構成されている。【選択図】図1
摘要翻译：要解决的问题：提供一种通过使用从振荡电路输出的时钟信号来测量温度的温度传感器电路。解决方案：温度传感器电路1包括：用于产生时钟信号CLK的振荡电路2; 延迟电路4，用于通过使用时钟信号CLK产生延迟信号S2; 以及延迟时间测量电路5，用于基于时钟信号CLK的时钟数来测量延迟信号S2的延迟时间。温度传感器电路1被配置为使得在延迟时间测量电路5中测量的时钟数量根据温度根据时钟信号CLK的脉冲宽度的温度依赖特性之间的差异和温度依赖性而变化延迟信号S2的延迟时间的温度特性。

12. 发明专利

JP2013205086A Bottom detection circuit 有权
标题翻译：底部检测电路
公开(公告)号：JP2013205086A
公开(公告)日：2013-10-07
申请号：JP2012071714
申请日：2012-03-27
申请人： Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： OHIRA YOSHIE , MIZUNO KENTARO , HASHIMOTO SHOJI , TAGUCHI RIE
IPC分类号： G01L23/18 , G01L9/00
摘要： PROBLEM TO BE SOLVED: To provide a bottom detection circuit in which waveform distortion is suppressed.SOLUTION: A bottom detection circuit 4 comprises a bottom holding circuit 5 and a correction circuit 6. The bottom holding circuit 5 holds a bottom value of sensor output V1 as a first bottom holding value V2 which increases at a first rising speed and as a second bottom holding value V2a which increases at a second rising speed lower than the first rising speed. When a difference between the first bottom holding value V2 and the second bottom holding value V2a becomes equal to or more than a reference voltage Vr, the correction circuit 6 causes the second bottom holding value V2a to rise at a third rising speed higher than the second rising speed. The third rising speed is adjusted in such a manner that the second bottom holding value V2a does not reach the first bottom holding value V2.
摘要翻译：要解决的问题：提供抑制波形失真的底部检测电路。解决方案：底部检测电路4包括底部保持电路5和校正电路6.底部保持电路5保持传感器输出V1的底部值作为以第一上升速度增加的第一底部保持值V2和作为比第一上升速度低的第二上升速度增加的第二底部保持值V2a。当第一底部保持值V2和第二底部保持值V2a之间的差变为等于或大于参考电压Vr时，校正电路6使第二底部保持值V2a以比第二底部保持值V2a高的第三个上升速度上升速度上升以第二底部保持值V2a未达到第一底部保持值V2的方式调节第三上升速度。

13. 发明专利

JP2012119941A Inverting voltage output circuit 审中-公开
标题翻译：反相电压输出电路
公开(公告)号：JP2012119941A
公开(公告)日：2012-06-21
申请号：JP2010267959
申请日：2010-12-01
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： OTA NORIKAZU , OHIRA YOSHIE , MAKINO TAKANORI
IPC分类号： H03K19/0175 , H03K17/687 , H03K19/0944
摘要： PROBLEM TO BE SOLVED: To provide a circuit for outputting a voltage inverting between a non-ground voltage and a ground voltage of a DC power supply in response to changes in an input signal which suppresses voltage fluctuations on a power line connected to a non-ground terminal.SOLUTION: A current limiting element 14 and a switching circuit 16 are connected in series, and a voltage at a midpoint 22 between the current limiting element and the switching circuit is output. A current flowing through the switching circuit when the switching circuit is turned on is limited by the current limiting element. Voltage fluctuations on a power line 12 connected to the non-ground terminal of the DC power supply are suppressed and the operation of an analog circuit or the like connected to the power line 12 is stabilized.
摘要翻译：要解决的问题：提供一种电路，用于响应于抑制连接到电力线路的电力线上的电压波动的输入信号的变化，输出在直流电源的非接地电压和接地电压之间的电压反相的电路非接地终端。解决方案：电流限制元件14和开关电路16串联连接，并且输出限流元件和开关电路之间的中点22的电压。当开关电路导通时流过开关电路的电流受限流元件的限制。连接到直流电源的非接地端子的电力线12上的电压波动被抑制，并且与电力线12连接的模拟电路等的动作稳定。版权所有（C）2012，JPO＆INPIT

14. 发明专利

JP2014232028A 力検知素子有权
标题翻译：强制检测元件
公开(公告)号：JP2014232028A
公开(公告)日：2014-12-11
申请号：JP2013112318
申请日：2013-05-28
申请人：株式会社豊田中央研究所 , Toyota Central R&D Labs Inc
发明人： MIZUNO KENTARO , NOMURA KATSUYA , TAGUCHI RIE , HASHIMOTO SHOJI , OHIRA YOSHIE
IPC分类号： G01L1/18 , H01L29/84
摘要：【課題】メサ段差に加わる圧縮応力の長手方向の分布を均一化し、力検知素子の信頼性と感度の間のトレードオフの関係を改善すること。【解決手段】メサ段差13は、溝12a,12bの周縁部15に接続する第1端部13aと第2端部13bの間を長手方向に沿って伸びている。長手方向に直交する幅方向に計測したときに、メサ段差13の中間部13cと周縁部15の間の距離が、メサ段差13の端部13a,13bと周縁部15の間の距離よりも短い。【選択図】図1
摘要翻译：要解决的问题：实现施加到台面台阶上的压缩应力的均匀纵向分布，并提高力检测元件的可靠性和灵敏度之间的折衷关系。解决方案：台面台阶13沿纵向方向延伸到第一端13a和连接到槽12a，12b的周边部分15的第二端13b。当在与纵向正交的宽度方向上测量时，台面台阶13的中间部分13c和周边部分15之间的距离比台面台阶13的端部13a，13b与周边部分15之间的距离短。

15. 发明专利

JP2012174291A Hold circuit 有权
标题翻译：保持电路
公开(公告)号：JP2012174291A
公开(公告)日：2012-09-10
申请号：JP2011032349
申请日：2011-02-17
申请人： Toyota Central R&D Labs Inc , Denso Corp , 株式会社デンソー , 株式会社豊田中央研究所
发明人： MIZUNO KENTARO , HASHIMOTO SHOJI , OHIRA YOSHIE , TAKEUCHI HISAYUKI , ITO OSAMU
IPC分类号： G11C27/00 , H03K17/00
摘要： PROBLEM TO BE SOLVED: To provide a hold circuit capable of satisfactorily adjusting the degree of falling or rising of holding voltage.SOLUTION: A hold circuit 10 includes an input terminal 20, first output terminal 22, reference voltage terminal 24, operational amplifier 30, diode 32, capacitor 36, resistor R0, and voltage generation circuit 50. In the capacitor 36, one end is connected to a connection point 26, and the other end is connected to the reference voltage terminal 24. In the resistor R0, one end is connected to the connection point 26. An anode of a diode 52 is connected to the connection point 26 through an operational amplifier 38. The other end of the resistor R0 is connected to an intermediate connection point 58. In the operational amplifier 30, a noninverted input terminal 30b is connected to the input terminal 20, an inverted input terminal 30a is connected to the connection point 26, and an output terminal 30c is connected to the diode 32. The voltage generation circuit 50 generates offset voltage V23 changed from output voltage V22 inputted to the diode 52 and outputs the offset voltage V23 from the intermediate connection point 58.
摘要翻译：要解决的问题：提供能够令人满意地调节保持电压的下降或上升的保持电路。保持电路10包括输入端子20，第一输出端子22，参考电压端子24，运算放大器30，二极管32，电容器36，电阻器R0和电压产生电路50.在电容器36中，一个端部连接到连接点26，另一端连接到参考电压端子24.在电阻器R0中，一端连接到连接点26.二极管52的阳极连接到连接点26 通过运算放大器38.电阻器R0的另一端连接到中间连接点58.在运算放大器30中，非反相输入端子30b连接到输入端子20，反相输入端子30a连接到连接点26和输出端子30c连接到二极管32.电压产生电路50产生从输入到二极管52的输出电压V22变化的偏移电压V23，并输出偏移电压V23 fr 中间连接点58。版权所有（C）2012，JPO＆INPIT

16. 发明专利

JP2012120082A Composite circuit of chopper amplification and digital conversion 有权
标题翻译： CHOPPER放大和数字转换的复合电路
公开(公告)号：JP2012120082A
公开(公告)日：2012-06-21
申请号：JP2010270121
申请日：2010-12-03
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： OTA NORIKAZU , OHIRA YOSHIE , AZEYANAGI SUSUMU
IPC分类号： H03F3/72
摘要： PROBLEM TO BE SOLVED: To solve the problem of increase in scale of a circuit because of requirement for taking out only a post-amplification voltage (Vs) from an output voltage for digital conversion, since the output voltage of a chopper amplifier contains the post-amplification voltage (Vs) that is inverted every predetermined time or an offset voltage that is inverted every predetermined time.SOLUTION: A transmission circuit is provided between a chopper amplifier and a comparison circuit constituting a digital conversion circuit. The transmission circuit is applied with a superposing voltage (V1) and an analogue voltage (Vd) having been converted from a digital value, and outputs two kinds of voltages (first output voltage (VI), and second output voltage (VII)). The difference between the first output voltage (VI) and the second output voltage (VII) is proportional to the difference between the post-amplification voltage (Vs) and the analogue voltage (Vd). As a result, the comparison circuit can determine which is larger between the post-amplification voltage (Vs) and the analogue voltage (Vd), and by raising or lowering a count value of a counter circuit, the count value can be caused to track the post-amplification voltage (Vs).
摘要翻译：要解决的问题：为了解决由于仅从数字转换的输出电压中仅取出后置放大电压（Vs）的电路规模增大的问题，由于斩波放大器的输出电压包含每预定时间反转的后置放大电压（Vs）或每预定时间反转的偏移电压。解决方案：在斩波放大器和构成数字转换电路的比较电路之间提供发送电路。传输电路被施加有从数字值转换的叠加电压（V1）和模拟电压（Vd），并且输出两种电压（第一输出电压（VI）和第二输出电压（VII））。第一输出电压（VI）和第二输出电压（VII）之间的差异与后置放大电压（Vs）与模拟电压（Vd）之间的差成比例。结果，比较电路可以确定后置放大电压（Vs）和模拟电压（Vd）之间的哪个较大，并且通过升高或降低计数器电路的计数值，可以使计数值跟踪后置放大电压（Vs）。版权所有（C）2012，JPO＆INPIT

17. 发明专利

JP2010096696A Hold circuit 有权
标题翻译：保持电路
公开(公告)号：JP2010096696A
公开(公告)日：2010-04-30
申请号：JP2008269589
申请日：2008-10-20
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： MIZUNO KENTARO , OTA NORIKAZU , OHIRA YOSHIE , MAKINO YASUAKI , ARIYOSHI HIROMI , NAGASE KAZUYOSHI
IPC分类号： G01R19/04 , G11C27/02
摘要： PROBLEM TO BE SOLVED: To disclose a technique of a hold circuit capable of holding input voltage with the same magnitude as that of power supply voltage. SOLUTION: The hold circuit 100 includes a sample hold circuit 20, a level shift circuit 40 and a peak detection circuit 60. A switch 12 of the sample hold circuit 20 switches over between conductive and nonconductive depending on voltage of a control input terminal 24. The level shift circuit 40 causes voltage of an output terminal 48 to come closer to reference voltage than voltage of an input terminal 28. The peak detection circuit 60 can keep a peak of voltage of an input terminal 46. The peak detection circuit 60 makes the switch 12 conductive when the voltage of the input terminal 46 tends to come farther away from the reference voltage and hold voltage. The peak detection circuit 60 also makes the switch 12 nonconductive when the voltage of the input terminal 46 tends to come closer to the reference voltage and when the voltage of the input terminal 46 tends to come farther away from the reference voltage and come closer to the hold voltage. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：公开一种能够保持与电源电压相同幅度的输入电压的保持电路的技术。保持电路100包括采样保持电路20，电平移位电路40和峰值检测电路60.采样保持电路20的开关12根据控制输入端的电压在导通和非导通之间切换电平移位电路40使输出端子48的电压比输入端子28的电压更接近参考电压。峰值检测电路60可以保持输入端子46的电压峰值。峰值检测电路当输入端子46的电压趋于远离参考电压和保持电压时，开关12使开关12导通。当输入端子46的电压趋于接近参考电压时，峰值检测电路60也使开关12不导通，并且当输入端子46的电压趋于远离参考电压并且更靠近保持电压。版权所有（C）2010，JPO＆INPIT

18. 发明专利

JP2004347493A Capacitive sensor device having function for detecting abnormality 有权
公开(公告)号：JP2004347493A
公开(公告)日：2004-12-09
申请号：JP2003145676
申请日：2003-05-23
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： OTA NORIKAZU , OHIRA YOSHIE , MIZUNO KENTAROU , SHIMAOKA KEIICHI , FUNABASHI HIROBUMI , ITO HAJIME , MAKINO YASUAKI , SUZUKI YASUTOSHI
IPC分类号： G01L1/14 , G01D18/00
摘要： PROBLEM TO BE SOLVED: To easily detect abnormality of a capacitive sensor device.
SOLUTION: The first driving voltage signal V
X1 of a pulse voltage is outputted from a first terminal 1 of a driving signal generation circuit 20. A second driving signal V
X2 that is the pulse voltage or the inversion voltage thereof is outputted from a second terminal 2. The first sensor capacitance C
X1 and the second sensor capacitance C
X2 have the same characteristic. A control signal generation circuit 38 controls which of the pulse voltage and the inversion voltage thereof is to be outputted from the second terminal 2. When the inversion voltage is outputted from the second terminal 2, an electric charge-voltage conversion circuit 26 outputs a voltage value V
OP corresponding to the value (ΔC
X1 -ΔC
X2 ) in which the variation value ΔC
X2 of the second sensor capacitance C
X2 is subtracted from the variation value ΔC
X1 of the first sensor capacitance C
X1 . A determination circuit 36 outputs an abnormality detection signal, on the basis of the output value V
OP (output V
OUT of an LPF (low-pass filter) 34, directly).
COPYRIGHT: (C)2005,JPO&NCIPI

19. 发明专利

JP2007174621A Clock signal outputting circuit 有权
标题翻译：时钟信号输出电路
公开(公告)号：JP2007174621A
公开(公告)日：2007-07-05
申请号：JP2006259461
申请日：2006-09-25
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： OTA NORIKAZU , OHIRA YOSHIE , MAKINO YASUAKI , ARIYOSHI HIROMI
IPC分类号： H03K3/354
CPC分类号： H03K3/354 , H03K3/0315 , H03K2005/0013 , H03K2005/00143 , H03K2005/00169
摘要： PROBLEM TO BE SOLVED: To contrive the resolution of a point of problem that temperature depending property remains in a clock signal outputting frequency whereby a clock signal, high in accuracy, can not be obtained. SOLUTION: The odd number of pairs of transistors each having a first transistor and a second transistor connected in series, are connected in parallel. A middle point of the first transistor and the second transistor is connected to the gate of the second transistor in a next stage and the middle point of the final stage is connected to the gate of the second transistor of the initial stage. A capacitor is inserted inbetween the second transistor and a DC power supply of respective stages. A current control circuit connected to the gate of respective first transistors impresses a voltage for making a current proportional to the threshold voltage of the second transistor, to flow through respective first transistors when an ON-voltage is impressed on the gate of the first transistor. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了解决温度依赖性保持在时钟信号输出频率中的问题点，由此不能获得高精度的时钟信号。解决方案：串联连接有第一晶体管和第二晶体管的奇数对晶体管并联连接。第一晶体管和第二晶体管的中点在下一级连接到第二晶体管的栅极，并且最后级的中点连接到初级的第二晶体管的栅极。电容器插入在第二晶体管和各级的直流电源之间。连接到各个第一晶体管的栅极的电流控制电路在第一晶体管的栅极上施加导通电压时，施加用于使与第二晶体管的阈值电压成比例的电流的电压流过相应的第一晶体管。版权所有（C）2007，JPO＆INPIT

20. 发明专利

JP2006221241A Reference voltage circuit 有权
标题翻译：参考电压电路
公开(公告)号：JP2006221241A
公开(公告)日：2006-08-24
申请号：JP2005031625
申请日：2005-02-08
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： OTA NORIKAZU , OHIRA YOSHIE , FUNABASHI HIROBUMI , MAKINO YASUAKI
IPC分类号： G05F3/24
CPC分类号： G05F3/30
摘要： PROBLEM TO BE SOLVED: To provide a reference voltage circuit for highly precisely compensating the influence of the fluctuation of an environment temperature.
SOLUTION: This reference voltage circuit is provided with an operating amplifier OP, a first fixed resistance R
1 , a second fixed resistance R
2 , a third fixed resistance R
3 , a first diode D1, a second diode D2 and a fourth fixed resistance R
4 . One end of the fourth fixed resistance R
4 is connected to the non-inverting input terminal of the operating amplifier OP, and the other end is connected to the first diode D1. The resistance value of the fourth resistance is made smaller than the resistance value of the first resistance, and the resistance temperature coefficient of the fourth fixed resistance R
4 is made larger than the resistance temperature coefficients of the first fixed resistance R
1 , the second fixed resistance R
2 and the third fixed resistance R
3 .
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供用于高度精确地补偿环境温度波动的影响的参考电压电路。
解决方案：该参考电压电路设置有运算放大器OP，第一固定电阻R 1 ，第二固定电阻R 2 ，第三固定电阻R 第一二极管D1，第二二极管D2和第四固定电阻R 4 。第四固定电阻R 4 的一端连接到运算放大器OP的非反相输入端，另一端连接到第一二极管D1。使第四电阻的电阻值小于第一电阻的电阻值，使第四固定电阻R 4 的电阻温度系数大于第一固定电阻电阻R 1 ，第二固定电阻R 2 和第三固定电阻R 3 。版权所有（C）2006，JPO＆NCIPI

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