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11. 发明授权

US09090993B2 Epitaxial substrate comprising a superlattice group and method for manufacturing the epitaxial substrate 有权
标题翻译：包含超晶格组的外延衬底和用于制造外延衬底的方法
公开(公告)号：US09090993B2
公开(公告)日：2015-07-28
申请号：US13570665
申请日：2012-08-09
申请人： Makoto Miyoshi , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
发明人： Makoto Miyoshi , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
IPC分类号： H01L21/02 , C30B29/40 , C30B25/18 , H01L29/15 , C30B29/68 , H01L33/00 , H01L33/04 , H01L33/12 , H01L29/778 , H01L29/872
CPC分类号： C30B29/403 , C30B25/18 , C30B25/183 , C30B29/68 , H01L21/02381 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L29/155 , H01L29/7786 , H01L29/872 , H01L33/007 , H01L33/04 , H01L33/12
摘要： Provided is a crack-free epitaxial substrate with reduced warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a superlattice layer group in which a plurality of superlattice layers are laminated, and a crystal layer. The superlattice layer is formed of a first unit layer and a second unit layer made of group-III nitrides having different compositions being alternately and repeatedly laminated. The crystal layer is made of a group-III nitride and formed above the base substrate so as to be positioned at an upper side of the superlattice layer group relative to the base substrate. The superlattice layer group has a compressive strain contained therein. In the superlattice layer group, the more distant the superlattice layer is from the base substrate, the greater the compressive strain becomes.
摘要翻译：提供了一种具有减小翘曲的无裂纹外延衬底，其中硅衬底用作基底衬底。外延衬底包括（111）单晶Si衬底，层叠有多个超晶格层的超晶格层组和晶体层。超晶格层由第一单位层和由具有不同组成的III-III族氮化物制成的第二单元层交替地和重复地层叠形成。晶体层由III族氮化物制成，并且形成在基底基板上方，以便相对于基底衬底位于超晶格层组的上侧。超晶格层组中含有压应变。在超晶格层组中，超晶格层离基底越远，压应变越大。

12. 发明授权

US08853828B2 Epitaxial substrate for semiconductor device, method for manufacturing epitaxial substrate for semiconductor device, and semiconductor device 有权
标题翻译：用于半导体器件的外延衬底，用于制造用于半导体器件的外延衬底的方法和半导体器件
公开(公告)号：US08853828B2
公开(公告)日：2014-10-07
申请号：US13353759
申请日：2012-01-19
申请人： Shigeaki Sumiya , Makoto Miyoshi , Tomohiko Sugiyama , Mikiya Ichimura , Yoshitaka Kuraoka , Mitsuhiro Tanaka
发明人： Shigeaki Sumiya , Makoto Miyoshi , Tomohiko Sugiyama , Mikiya Ichimura , Yoshitaka Kuraoka , Mitsuhiro Tanaka
IPC分类号： H01L29/20 , H01L21/02 , C30B29/40 , C30B25/18 , H01L29/872 , H01L29/778
CPC分类号： H01L21/0254 , C30B25/18 , C30B25/183 , C30B29/403 , H01L21/02381 , H01L21/02458 , H01L21/02488 , H01L21/02494 , H01L21/02502 , H01L21/0262 , H01L29/2003 , H01L29/7786 , H01L29/872
摘要： An epitaxial substrate, in which a group of group-III nitride layers is formed on a single-crystal silicon substrate so that a crystal plane is approximately parallel to a substrate surface, comprises: a first group-III nitride layer formed of AlN on the base substrate; a second group-III nitride layer formed of InxxAlyyGazzN (xx+yy+zz=1, 0≦xx≦1, 0
摘要翻译：在单晶硅衬底上形成一组III族氮化物层，使得晶面大致平行于衬底表面的外延衬底包括：由第一III族氮化物层形成的第一III族氮化物层基底; 在第一III族氮化物层上由InxxAlyyGazzN（xx + yy + zz = 1,0,0

13. 发明授权

US08598626B2 Epitaxial substrate for semiconductor device, schottky junction structure, and leakage current suppression method for schottky junction structure 有权
标题翻译：用于半导体器件的外延衬底，肖特基结结构和用于肖特基结结构的漏电流抑制方法
公开(公告)号：US08598626B2
公开(公告)日：2013-12-03
申请号：US12853685
申请日：2010-08-10
申请人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
发明人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
IPC分类号： H01L29/778
CPC分类号： H01L29/7787 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L29/045 , H01L29/2003 , H01L29/66462
摘要： Provided is an epitaxial substrate for semiconductor device that is capable of achieving a semiconductor device having high reliability in reverse characteristics of schottky junction. An epitaxial substrate for semiconductor device obtained by forming, on a base substrate, a group of group III nitride layers by lamination such that a (0001) crystal plane of each layer is approximately parallel to a substrate surface includes: a channel layer formed of a first group III nitride having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1, z1>0); and a barrier layer formed of a second group III nitride having a composition of Inx2Aly2N (x2+y2=1, x2>0, y2>0), wherein the second group III nitride is a short-range-ordered mixed crystal having a short-range order parameter α satisfying a range where 0≦α≦1.
摘要翻译：本发明提供一种能够实现肖特基结的反向特性的高可靠性的半导体装置的半导体装置用外延基板。一种用于半导体器件的外延衬底，其通过在基底衬底上通过层叠形成III族氮化物层，使得每个层的（0001）晶面大致平行于衬底表面而形成，其包括：沟道层，其由具有Inx1Aly1Gaz1N（x1 + y1 + z1 = 1，z1> 0）的组成的第一III族氮化物; 和由具有Inx2Aly2N（x2 + y2 = 1，x2> 0，y2> 0）的组成的第二III族氮化物形成的阻挡层，其中第二III族氮化物是短距离有序混合晶体满足0 @α@ 1范围的 - 序列参数α。

14. 发明申请

US20060132052A1 Electron-emitting apparatus and method for emitting electrons 审中-公开
标题翻译：电子发射装置和发射电子的方法
公开(公告)号：US20060132052A1
公开(公告)日：2006-06-22
申请号：US11229038
申请日：2005-09-16
申请人： Iwao Ohwada , Takayoshi Akao , Naoki Goto , Tomohiko Sugiyama
发明人： Iwao Ohwada , Takayoshi Akao , Naoki Goto , Tomohiko Sugiyama
IPC分类号： G09G3/10
CPC分类号： G09G3/22 , G09G2310/06 , G09G2310/066 , G09G2320/043 , G09G2330/021
摘要： An electron-emitting apparatus includes an electron-emitting element having a lower electrode, an emitter section having a dielectric material, and a plurality of upper electrodes having micro through holes, and a drive voltage applying circuit having a circuit for applying a drive voltage Vin between the lower electrode and the upper electrode. The drive voltage applying circuit applies a drive voltage between the lower electrode and the upper electrode to set an element voltage Vka, which is a potential of the upper electrode relative to a potential of the lower electrode, at a negative voltage for a charge accumulation period Td so as to accumulate electrons in the emitter section, and to set the element voltage Vka at a predetermined positive voltage for an electron emission period Th so as to emit electrons from the emitter section. Further, the drive voltage applying circuit stepwise increases the positive voltage for the electron emission period Th and separately emits the electrons accumulated in the emitter section a plurality of times.
摘要翻译：电子发射装置包括具有下电极的电子发射元件，具有电介质材料的发射极部分和具有微通孔的多个上电极，以及驱动电压施加电路，具有用于施加驱动电压Vin 在下电极和上电极之间。驱动电压施加电路在下电极和上电极之间施加驱动电压，以将电压为上电极相对于下电极的电位的元件电压Vka设定为电荷积蓄期间的负电压 Td，以便在发射极部分中积聚电子，并将元件电压Vka设定在电子发射周期Th的预定正电压，以便从发射极部分发射电子。此外，驱动电压施加电路逐步增加电子发射周期Th的正电压，并且分别发射在发射极部分中累积的电子多次。

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