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11. 发明授权

US06625278B1 Impedance matching with sigma delta filter 失效
标题翻译：阻抗匹配与Σ-Δ滤波器
公开(公告)号：US06625278B1
公开(公告)日：2003-09-23
申请号：US09379603
申请日：1999-08-24
申请人： Paul D. Hendricks , Donald R. Laturell , Lane A. Smith , Steven B. Witmer
发明人： Paul D. Hendricks , Donald R. Laturell , Lane A. Smith , Steven B. Witmer
IPC分类号： H04M100
CPC分类号： H04M11/062 , H04M1/76
摘要： An AC impedance matching architecture which provides programmable AC impedance matching in a given range using a digital filter to filter a signal fed back from the impedance matched line to generate an AC impedance emulation control signal. The AC impedance emulation control signal is combined with a transmit signal (if desired) and drives a voltage controlled current source, which is in parallel with a reference impedance. A voltage is developed across the reference impedance to drive, e.g., the telephone line. The reference impedance is chosen based on a desired maximum AC impedance. The gain of the digital filter, a first order sigma delta filter in the disclosed embodiment, is chosen based on the desired value of the AC impedance. The transfer function of the digital filter is derived based on a desired AC impedance.
摘要翻译： AC阻抗匹配架构，其使用数字滤波器在给定范围内提供可编程AC阻抗匹配，以对从阻抗匹配线反馈的信号进行滤波，以产生AC阻抗仿真控制信号。交流阻抗仿真控制信号与发射信号（如果需要）组合，并驱动与参考阻抗并联的压控电流源。在参考阻抗上产生电压以驱动例如电话线。基于所需的最大AC阻抗来选择参考阻抗。在所公开的实施例中，数字滤波器，第一级Σ-Δ滤波器的增益是基于AC阻抗的期望值来选择的。基于所需的AC阻抗导出数字滤波器的传递函数。

12. 发明授权

US06389110B1 Telecom service identification resonator apparatus and technique 有权
公开(公告)号：US06389110B1
公开(公告)日：2002-05-14
申请号：US09592864
申请日：2000-06-13
申请人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith
发明人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith
IPC分类号： H04M124
CPC分类号： H04M3/301 , H04M3/2209 , H04M3/308
摘要： Telephone line service type identification is provided to a telephone technician in the field by the placement of one or more tuned circuit(s) across the telephone line. In one embodiment, an inexpensive tuned circuit such as a ceramic resonator forms a telecom service resonator ID device which is placed across a telephone line, either at the central office or at the customer premises. Injection of a test current at a predetermined frequency, and a suitable amplitude of the same indicates to the technician aspects of telecom service to that particular telephone line (e.g., the existence of POTS, ISDN, and/or xDSL) and or use of the telephone line by a home network such as HPNA. In another embodiment, a telecom service transponder ID device is formed to provide line service identification to an interrogating line technician. The telecom service transponder ID device is activated when the test signal including an appropriate frequency is present to cause excitation in the telecom service transponder ID device. The resonator and transponder devices preferably have very high impedances at all frequencies except at the desired resonant frequency, and thus avoids violation of telephone service standards. The resonator or transponder ID devices may be placed anywhere along the telephone line, but preferably at the customer premises, or in installed equipment utilizing the telephone line. More than one resonation frequency may be implemented with parallel tuned circuits to indicate additional features of service on the telephone line (e.g., the number of services, the existence of a data service, etc.). The frequencies of resonance of the tuned circuits are preferably chosen to exist between the spectrum utilized by the various operating services. The transponder implementation may generate a simple low frequency response signal, or a more sophisticated specific data pattern using amplitude and/or frequency modulation.

13. 发明授权

US07995743B2 Method and apparatus for non-disruptive telecommunication loop condition determination 有权
标题翻译：无中断电信环路条件确定的方法和装置
公开(公告)号：US07995743B2
公开(公告)日：2011-08-09
申请号：US11534918
申请日：2006-09-25
申请人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith
发明人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith
IPC分类号： H04M3/00
CPC分类号： H04M3/2272 , H04M3/14
摘要： The invention provides a low cost, simple, circuit for detecting the condition of a telephone line.
摘要翻译：本发明提供了一种用于检测电话线条件的低成本，简单的电路。

14. 发明授权

US06778665B1 Distribution of current draw in a line powered DAA 失效
标题翻译：电流分布在线路供电DAA
公开(公告)号：US06778665B1
公开(公告)日：2004-08-17
申请号：US09414565
申请日：1999-10-08
申请人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith , Michael S. Toth , Michael G. Williams
发明人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith , Michael S. Toth , Michael G. Williams
IPC分类号： H04M100
CPC分类号： H04M19/08
摘要： A line powered data access arrangement (DAA) is disclosed which adaptively allows proper operation with power supplied from a telephone line as conditions warrant, while at the same time satisfying the relevant requirements of many countries. In the line powered codec, a startup procedure for the international line powered codec uses register settings, e.g., country-specific register settings, which are powered and maintained from the low voltage side (e.g., from the PC or modem side) of the line powered codec. In this way, even during low line power conditions the programmed state of the line powered codec can be maintained, thus a default condition will not necessarily returned to by the line powered codec upon reset due to a power loss in the telephone line. In another aspect, a charge storage device such as a charge capacitor is charged from a charge pump formed from a differential clock signal from the low voltage side. A current and voltage detection module in the line powered codec is always powered from the telephone line. Upon detection of an off-hook signal or a power down condition, the current detection module determines if/when the current and voltage on the telephone line is sufficient to power certain circuits on the line powered codec. If sufficient power is not present, the line powered codec does not power up. However, the line powered codec will power up if sufficient current is detected. In another aspect, a plurality of power rails may be provided. A first power rail may be associated with the line power, a second power rail may be associated with a low voltage side power source, e.g., a charge storage device. A third (and other) power rails may be switchably connected to either the first power rail or second power rail as line power conditions and on-hook/off-hook conditions warrant.
摘要翻译：公开了一种线路数据访问安排（DAA），其适应性地允许根据条件允许从电话线路提供的电力进行适当的操作，同时满足许多国家的相关要求。在线路供电的编解码器中，用于国际线路供电的编解码器的启动过程使用寄存器设置，例如，国家特定寄存器设置，其由线路的低电压侧（例如，从PC或调制解调器侧）供电和维护电源编解码器。以这种方式，即使在低功率电力条件下，也可以维护线路供电的编解码器的编程状态，因此由于电话线路中的功率损耗，默认条件不一定由线路供电的编解码器复位。另一方面，诸如充电电容器的电荷存储装置从由低电压侧的差分时钟信号形成的电荷泵充电。线路供电编解码器中的电流和电压检测模块始终通过电话线供电。当检测到摘机信号或断电状态时，电流检测模块确定电话线路上的电流和电压是否足以对线路供电的编解码器上的某些电路供电。如果没有足够的电源，线路供电的编解码器不会上电。然而，如果检测到足够的电流，则线路供电的编解码器将上电。另一方面，可以设置多个电源轨。第一电力轨可以与线路电力相关联，第二电力轨道可以与低电压侧电源（例如电荷存储装置）相关联。第三（和其他）电源轨可以切换地连接到第一个电源轨或第二个电源轨，因为线路电源条件和挂机/摘机条件值得。

15. 发明授权

US06674856B1 Placement of a transmit predistortion filter with respect to a data access arrangement 失效
标题翻译：发送预失真滤波器相对于数据存取装置的放置
公开(公告)号：US06674856B1
公开(公告)日：2004-01-06
申请号：US09401995
申请日：1999-09-23
申请人： Paul D. Hendricks , Donald R. Laturell , Lane A. Smith , Steven B. Witmer
发明人： Paul D. Hendricks , Donald R. Laturell , Lane A. Smith , Steven B. Witmer
IPC分类号： H04M100
CPC分类号： H04M1/68
摘要： The present invention provides a digital pre-distortion filter in arrangement with a data access arrangement (DAA) on the component side (e.g., in a modem chipset). This arrangement of the pre-distortion filter outside of the DAA allows digital processes such as digital emulation of the central office impedance to remain unaffected by the pre-distortion in the transmitted signal, allowing the dynamic range of the transmitted signal to be flattened to minimize return loss without complicating the transfer function of the digital emulation of the central office complex load. In the case of a digital emulation filter, placement of a digital pre-distortion filter outside of an analog-to-digital (A/D) digital-to-analog (D/A) loop also minimizes the noise otherwise associated with the use of a pre-distortion filter. Thus, benefits of a pre-distortion filter can be gained without interfering with emulation of impedance, and without causing a significant amount of noise in the transmitted signal.
摘要翻译：本发明提供了一种数字预失真滤波器，其配置为在组件侧（例如，调制解调器芯片组）中的数据访问装置（DAA）。 DAA之前的预失真滤波器的这种布置允许诸如中心局阻抗的数字仿真的数字处理不受传输信号中的预失真的影响，允许传输信号的动态范围被平坦化以最小化返回损耗，而不会使中心局复杂负载的数字仿真传输功能复杂化。在数字仿真滤波器的情况下，数字预失真滤波器在模数（A / D）数模（D / A）环路之外的放置也使得与使用相关的噪声最小化的预失真滤波器。因此，可以获得预失真滤波器的优点而不干扰阻抗的仿真，并且不会在发射信号中引起大量的噪声。

16. 发明申请

US20140068122A1 METHOD, SYSTEM AND PROCESSOR-READABLE MEDIA FOR ASCERTAINING A MAXIMUM NUMBER OF CONTIGUOUS BITS OF LOGICAL ONES OR ZEROS WITHIN A PARALLEL WORD OF ARBITRARY WIDTH 审中-公开
标题翻译：方法，系统和处理器可读介质，用于排除最大数目的逻辑角或零点的平行字，
公开(公告)号：US20140068122A1
公开(公告)日：2014-03-06
申请号：US13604048
申请日：2012-09-05
申请人： Qiao Shen , Samuel Khoo , Wen Zhu , Lane A. Smith
发明人： Qiao Shen , Samuel Khoo , Wen Zhu , Lane A. Smith
IPC分类号： G06F13/14
CPC分类号： G06F13/4204 , Y02D10/14 , Y02D10/151
摘要： Methods, systems and processor-readable media for reducing the width of a logical comparison. A width of a logical comparison based on a previous result generated can be recursively reduced from a data stream and a maximum count of consecutive ones or consecutive zeros determined from the serial data stream based on a priority encoder within a single clock cycle in order to avoid a use of complex functions. In this manner, the maximum number of the consecutive ones or the consecutive zeros in a parallel word bus within the single dock cycle can be ascertained.
摘要翻译：用于减少逻辑比较宽度的方法，系统和处理器可读介质。基于生成的先前结果的逻辑比较的宽度可以从单个时钟周期内的基于优先级编码器的数据流和从串行数据流确定的连续零的最大计数递归地减少，以避免使用复杂的功能。以这种方式，可以确定单个码头周期内的并行字总线中的连续零或连续零的最大数目。

17. 发明授权

US08219344B2 Method and apparatus for digital VCDL startup 失效
标题翻译：数字VCDL启动的方法和装置
公开(公告)号：US08219344B2
公开(公告)日：2012-07-10
申请号：US12789544
申请日：2010-05-28
申请人： Mohammad S. Mobin , Gregory W. Sheets , Lane A. Smith , Paul H. Tracy
发明人： Mohammad S. Mobin , Gregory W. Sheets , Lane A. Smith , Paul H. Tracy
IPC分类号： H03L7/06
CPC分类号： H03L7/0812
摘要： Methods and apparatus are provided for improved startup of a voltage controlled delay loop that has an injection clock and a return clock. A control signal is determined for a plurality of delay elements in a voltage controlled delay loop by obtaining a histogram count of a number of occurrences of at least one predefined logic value for a plurality of delay settings of the voltage controlled delay loop; determining a histogram count that approximately corresponds to an alignment of at least one edge in the injection and return clocks; and determining the control signal based on the determined histogram count that approximately corresponds to the alignment. The voltage controlled delay loop can be started using the determined control signal. The histogram count can be obtained for a plurality of PVT combinations and the control signal can then be determined for each PVT combination.
摘要翻译：提供了用于改进启动具有注入时钟和返回时钟的电压控制延迟回路的方法和装置。通过获得针对电压控制的延迟环路的多个延迟设置的至少一个预定逻辑值的出现次数的直方图计数，为电压控制的延迟环路中的多个延迟元件确定控制信号; 确定近似对应于所述注入和返回时钟中的至少一个边缘的对准的直方图计数; 以及基于大致对应于所述对准的所确定的直方图计数来确定所述控制信号。可以使用所确定的控制信号来开始压控延迟环路。可以为多个PVT组合获得直方图计数，然后可以为每个PVT组合确定控制信号。

18. 发明申请

US20120170621A1 DECOUPLING SAMPLING CLOCK AND ERROR CLOCK IN A DATA EYE 有权
标题翻译：在数据眼中解码采样时钟和错误时钟
公开(公告)号：US20120170621A1
公开(公告)日：2012-07-05
申请号：US12968538
申请日：2011-01-03
申请人： Paul Tracy , Mohammad Mobin , Ye Liu , Lane A. Smith
发明人： Paul Tracy , Mohammad Mobin , Ye Liu , Lane A. Smith
IPC分类号： H04B1/38
CPC分类号： H04L25/03038
摘要： In described embodiments, a transceiver includes an eye monitor, clock and data recovery, and adaptation modules. Data sampling clock phase and error clock phase determined from a data eye are decoupled in the transceiver during a sampling phase correction process. Decoupling these clock phases during the sampling phase correction process allows relative optimization of system equalization parameters without degradation of various adaptation algorithms. Such adaptation algorithms might be employed for received signal gain and equalization such as, for example, Decision Feedback Equalizer (DFE) adaptation. Deriving the data sampling clock and error clock phases from the same clock generation source and with independent clock control enables an iterative sampling phase correction process that allows for accelerated clock and data recovery (CDR) without disturbing the data eye shape.
摘要翻译：在所描述的实施例中，收发器包括眼睛监视器，时钟和数据恢复以及适配模块。在采样相位校正过程中，从数据眼睛确定的数据采样时钟相位和误差时钟相位在收发器中解耦。在采样相位校正过程中去耦合这些时钟相位允许系统均衡参数的相对优化，而不会降低各种自适应算法。这样的适配算法可以用于接收信号增益和均衡，例如，判决反馈均衡器（DFE）适配。从相同的时钟产生源和独立的时钟控制中获取数据采样时钟和错误时钟相位，可以实现迭代采样相位校正过程，可以在不影响数据眼睛形状的情况下加速时钟和数据恢复（CDR）。

19. 发明授权

US08165253B2 Methods and apparatus for serializer/deserializer transmitter synchronization 有权
标题翻译：串行器/解串器发射机同步的方法和装置
公开(公告)号：US08165253B2
公开(公告)日：2012-04-24
申请号：US12200106
申请日：2008-08-28
申请人： Christopher J. Abel , Vladimir Sindalovsky , Lane A. Smith
发明人： Christopher J. Abel , Vladimir Sindalovsky , Lane A. Smith
IPC分类号： H04L7/00
CPC分类号： H04J3/0685
摘要： Methods and apparatus are provided for serializer/deserializer transmitter synchronization. A plurality of channels are synchronized in one or more serializer/deserializer devices by generating a synchronization request in one or more of the channels; generating an enable signal in response to the synchronization request; and generating a gated synchronization signal for only one or more periods of a synchronization signal in response to the enable signal. The gated synchronization signal can optionally be deasserted after the one or more periods of a synchronization signal.
摘要翻译：提供串行器/解串器发射机同步的方法和装置。通过在一个或多个信道中产生同步请求，在一个或多个串行器/解串器设备中同步多个信道; 响应于所述同步请求产生使能信号; 以及响应于使能信号，仅产生一个同步信号的一个或多个周期的门控同步信号。门控同步信号可以可选地在同步信号的一个或多个周期之后被断言。

20. 发明授权

US07848473B2 Phase interpolator having a phase jump 有权
标题翻译：相位内插器具有相位跳变
公开(公告)号：US07848473B2
公开(公告)日：2010-12-07
申请号：US11020021
申请日：2004-12-22
申请人： Ronald L. Freyman , Vladimir Sindalovsky , Lane A. Smith
发明人： Ronald L. Freyman , Vladimir Sindalovsky , Lane A. Smith
IPC分类号： H04L7/04
CPC分类号： H03L7/07 , H03L7/0814 , H03L7/091 , H04L7/0025 , H04L7/0337
摘要： A method and apparatus are disclosed for generating phase controlled data, based on a roaming tap interpolator. The present invention recognizes that roaming tap interpolators have inherent nonlinearities and discontinuities at the boundaries of each interpolation region. A roaming tap interpolator is disclosed that shifts the interpolation curve in time in order to avoid the undesired artifacts in the interpolation curve. A roaming tap interpolator generally comprises a plurality of delay elements that delays a first signal to generate a plurality of interpolation regions each having an associated phase; a multiplexer to select one or more of the interpolation regions; and an interpolator to process the selected one or more of the interpolation regions to generate a second signal. In addition, according to the present invention, the roaming tap interpolator includes a delay unit that selectively delays one or more of the first signal and the second signal to generate an interpolation signal, the interpolation signal selectively having a first phase or a second phase.
摘要翻译：公开了一种基于漫游抽头内插器来产生相位控制数据的方法和装置。本发明认识到，漫游抽头内插器在每个内插区域的边界处具有固有的非线性和不连续性。公开了一种漫游抽头内插器，其在时间上偏移插值曲线，以避免插值曲线中的不需要的伪影。漫游抽头内插器通常包括多个延迟元件，其延迟第一信号以产生每个具有相关联的相位的多个内插区域; 多路复用器，用于选择一个或多个插值区域; 以及内插器，用于处理所选择的一个或多个内插区域以产生第二信号。此外，根据本发明，漫游抽头内插器包括延迟单元，其选择性地延迟第一信号和第二信号中的一个或多个以产生内插信号，该内插信号选择性地具有第一相位或第二相位。

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