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11. 发明授权

US06455914B2 Pedestal fuse 失效
标题翻译：基座保险丝
公开(公告)号：US06455914B2
公开(公告)日：2002-09-24
申请号：US09842545
申请日：2001-04-26
申请人： Dennis P. Bouldin , Timothy H. Daubenspeck , William T. Motsiff
发明人： Dennis P. Bouldin , Timothy H. Daubenspeck , William T. Motsiff
IPC分类号： H01L2900
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower layer, the upper being thinner than the lower, the insulator structure having a plurality of openings of varying depth, and a metal structure inlaid in the insulator structure, the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions, the third portion having a thickness substantially similar to the thickness of the upper layer of the insulator structure. The upper layer includes a nitride, the lower layer includes an oxide and the metal structure includes copper. The fuse structure allows formation of “easy to laser delete” thin metal fuses within segments of thick metal lines. This applies to wiring layers formed from “high” melting temperature metals and those defined using a damascene process. For example, copper back end of line (Cu BEOL) damascene wiring, as used with CMOS can use the invention. The technique achieves high yield fusing for technologies that use thick wiring layers. The structure separates the thickness of the fuse segment from the remainder of the wiring line. The structure can be used with very thick, e.g., >1.2 &mgr; wiring and very thin, e.g.,
摘要翻译：公开了一种制造金属化熔丝线的结构和方法。该结构可以形成在半导体衬底上，包括形成在衬底上的绝缘体结构，绝缘体结构具有上层和下层，上部比下部更薄，绝缘体结构具有多个不同深度的开口以及镶嵌在绝缘体结构中的金属结构，具有第一和第二部分的金属结构和在其之间的第三部分比第一和第二部分具有更大的阻力，第三部分的厚度基本上类似于上层绝缘体结构。上层包括氮化物，下层包括氧化物，金属结构包括铜。熔丝结构允许在厚金属线段内形成“易于激光删除”的薄金属保险丝。这适用于由“高”熔融金属形成的布线层和使用镶嵌工艺定义的布线层。例如，与CMOS一起使用的铜后端（Cu BEOL）镶嵌布线可以使用本发明。该技术实现了使用厚布线层的技术的高产率熔合。该结构将熔丝段的厚度与布线的其余部分分开。该结构可以使用非常厚的例如>1.2μm的布线和非常薄的例如<0.5μ的保险丝。

12. 发明授权

US06991971B2 Method for fabricating a triple damascene fuse 失效
标题翻译：三镶嵌保险丝的制造方法
公开(公告)号：US06991971B2
公开(公告)日：2006-01-31
申请号：US10675177
申请日：2003-09-30
申请人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Anthony K. Stamper
发明人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Anthony K. Stamper
IPC分类号： H01L21/82
CPC分类号： H01L23/53295 , H01L23/5256 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a fuse for a semiconductor device. The method including: providing a substrate; forming a first dielectric layer on a top surface of said substrate; forming a dielectric mandrel on a top surface of said first dielectric layer; forming a second dielectric layer on top of said mandrel and a top surface of said first dielectric layer forming contact openings down to said substrate in said first and second dielectric layers on opposite sides of said mandrel, said contacts spaced away from said mandrel and leaving portions of said second dielectric layer between said mandrel and said contacts; removing said second dielectric layer from over said mandrel between said contact openings to form a trough; and filling said trough and contact openings with a conductor.
摘要翻译：一种制造用于半导体器件的熔丝的方法。该方法包括：提供衬底; 在所述衬底的顶表面上形成第一电介质层; 在所述第一介电层的顶表面上形成介电心轴; 在所述心轴的顶部上形成第二电介质层，并且所述第一电介质层的顶表面在所述心轴的相对侧上的所述第一和第二介电层中向下形成接触开口，所述触头与所述心轴间隔开并留下部分所述第二电介质层位于所述心轴和所述触头之间; 从所述心轴上的所述接触开口之间移除所述第二电介质层以形成槽; 并用导体填充所述槽和接触开口。

13. 发明授权

US06946379B2 Insulative cap for laser fusing 失效
标题翻译：激光熔接绝缘帽
公开(公告)号：US06946379B2
公开(公告)日：2005-09-20
申请号：US10860470
申请日：2004-06-03
申请人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Henry A. Nye, III
发明人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Henry A. Nye, III
IPC分类号： H01L23/525 , H01L23/544 , H01L21/44
CPC分类号： H01L23/544 , H01L23/5258 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having at least one fuse and an alignment mark formed therein. An etch resistant layer over the surface of the fuse and alignment mark, which provides a uniform passivation thickness for use in conjunction with laser fuse deletion processes.
摘要翻译：一种具有形成在其中的至少一个熔丝和对准标记的半导体器件。在熔断器和对准标记的表面上的抗蚀刻层，其提供与激光熔丝删除工艺结合使用的均匀的钝化厚度。

14. 发明授权

US06924210B1 Chip dicing 失效
标题翻译：芯片切片
公开(公告)号：US06924210B1
公开(公告)日：2005-08-02
申请号：US10708487
申请日：2004-03-06
申请人： Timothy H. Daubenspeck , William T. Motsiff , Christopher D. Muzzy , Wolfgang Sauter
发明人： Timothy H. Daubenspeck , William T. Motsiff , Christopher D. Muzzy , Wolfgang Sauter
IPC分类号： B23K26/40 , H01L21/46 , H01L21/78
CPC分类号： H01L21/78 , B23K26/40 , B23K2101/40 , B23K2103/50
摘要： A method and structure for cutting semiconductor chips from a wafer (dicing). For each chip of the wafer, a laser beam is used to cut around the chip along a plurality of straight-line cut segments such that the formed corners of the chip after cutting are all greater than 90°. As a result, the stress at these corners are much less than that of prior art chips, especially during packaging step. In one embodiment, the laser beam is used to cut along only straight-line cut segments not on any chip boundary line, and a saw blade is used to cut along all the chip boundary lines.
摘要翻译：一种从晶片切割半导体芯片的方法和结构（切割）。对于晶片的每个芯片，使用激光束沿着多个直线切割段切割芯片，使得切割后的芯片的形成的角都大于90°。结果，这些拐角处的应力比现有技术的芯片要小得多，特别是在包装步骤中。在一个实施例中，激光束仅用于切割不在任何芯片边界线上的直线切割段，并且锯片用于沿着所有芯片边界线切割。

15. 发明授权

US06667533B2 Triple damascene fuse 失效
公开(公告)号：US06667533B2
公开(公告)日：2003-12-23
申请号：US09684000
申请日：2002-03-11
申请人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Anthony K. Stamper
发明人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Anthony K. Stamper
IPC分类号： H01L2900
CPC分类号： H01L23/53295 , H01L23/5256 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a conductive fuse for a semiconductor device, comprising: a pair of contact portions integrally connected to a fusible portion by connecting portions; the contact portions thicker than the connecting portions and the connecting portions thicker than the fusible portion; a first dielectric under the connecting portions and the fusible portion and extending between the pair of contact portions; and a second dielectric between the first dielectric and the fusible portion, the second dielectric extending between the connecting portions and defining the length of the fusible portion.

16. 发明授权

US06815838B2 Laser alignment target and method 失效
标题翻译：激光对准目标和方法
公开(公告)号：US06815838B2
公开(公告)日：2004-11-09
申请号：US10079333
申请日：2002-02-20
申请人： Timothy H. Daubenspeck , Richard A. Gilmour , William T. Motsiff , Christopher D. Muzzy
发明人： Timothy H. Daubenspeck , Richard A. Gilmour , William T. Motsiff , Christopher D. Muzzy
IPC分类号： H01L23544
CPC分类号： G01B11/272
摘要： A laser alignment target is provided having a surface that is out of plane with and has substantially the same first reflectivity as an adjacent surface of the semiconductor device, and a sidewall having a second reflectivity different than the first reflectivity. The target provides sidewalls that provide contrast for finding the target despite loss of contrast created by layers of dielectric over the target and use of short wavelength light.
摘要翻译：提供了具有与半导体器件的相邻表面具有并具有与第一反射率不同的第一反射率的表面的激光对准靶和具有与第一反射率不同的第二反射率的侧壁。目标提供侧壁，为寻找目标提供对比度，尽管由目标上的电介质层和使用短波长光造成的对比度损失。

17. 发明授权

US06784516B1 Insulative cap for laser fusing 有权
公开(公告)号：US06784516B1
公开(公告)日：2004-08-31
申请号：US09684463
申请日：2000-10-06
申请人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Henry A. Nye, III
发明人： Timothy H. Daubenspeck , Thomas L. McDevitt , William T. Motsiff , Henry A. Nye, III
IPC分类号： H01L2900
CPC分类号： H01L23/544 , H01L23/5258 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having at least one fuse and an alignment mark formed therein. An etch resistant layer over the surface of the fuse and alignment mark, which provides a uniform passivation thickness for use in conjunction with laser fuse deletion processes.

18. 发明授权

US06458630B1 Antifuse for use with low k dielectric foam insulators 失效
标题翻译：用于低k电介质泡沫绝缘子的防腐剂
公开(公告)号：US06458630B1
公开(公告)日：2002-10-01
申请号：US09417853
申请日：1999-10-14
申请人： Timothy H. Daubenspeck , William A. Klaasen , William T. Motsiff , Rosemary A. Previti-Kelly , Jed H. Rankin
发明人： Timothy H. Daubenspeck , William A. Klaasen , William T. Motsiff , Rosemary A. Previti-Kelly , Jed H. Rankin
IPC分类号： H01L2128
CPC分类号： H01L23/5254 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A fusible link for a semiconductor device comprises an insulating substrate and a conductive line pair on the surface of the insulating substrate, with the conductive line pair having spaced ends. A polymer is disposed over the insulating substrate and between the conductive line pair ends. The polymer is capable of being changed from a non-conductive to a conductive state upon exposure to an energy beam. Preferably, the polymer comprises a polyimide, more preferably, a polymer/onium salt mixture, most preferably, a polyaniline polymer doped with a triphenylsufonium salt. The link may further comprise a low k nanopore/nanofoam dielectric material adjacent the conductive line ends.
摘要翻译：用于半导体器件的可熔连接件包括在绝缘衬底的表面上的绝缘衬底和导电线对，导电线对具有间隔开的端部。聚合物设置在绝缘基板之上和导线对端之间。聚合物能够在暴露于能量束时从非导电状态改变为导电状态。优选地，聚合物包括聚酰亚胺，更优选聚合物/鎓盐混合物，最优选掺杂有三苯基鎓盐的聚苯胺聚合物。该连接可以进一步包括邻近导电线端部的低k纳米孔/纳米空间电介质材料。

19. 发明申请

US20130234315A1 STRUCTURES AND METHODS FOR DETECTING SOLDER WETTING OF PEDESTAL SIDEWALLS 有权
标题翻译：用于检测PEDESTAL SIDEWALLS焊膏浸渍的结构和方法
公开(公告)号：US20130234315A1
公开(公告)日：2013-09-12
申请号：US13414877
申请日：2012-03-08
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L22/30 , H01L22/12 , H01L23/49816 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/94 , H01L2224/0401 , H01L2224/05027 , H01L2224/0508 , H01L2224/05147 , H01L2224/05166 , H01L2224/05552 , H01L2224/05558 , H01L2224/05568 , H01L2224/05584 , H01L2224/05655 , H01L2224/11462 , H01L2224/11849 , H01L2224/13006 , H01L2224/13007 , H01L2224/13023 , H01L2224/13028 , H01L2224/13111 , H01L2224/16238 , H01L2224/81191 , H01L2224/94 , H01L2924/00013 , H01L2924/00014 , H01L2924/3841 , H01L2224/11 , H01L2924/01074 , H01L2924/00012 , H01L2924/00015 , H01L2224/13099 , H01L2224/05099 , H01L2224/05599 , H01L2924/01047 , H01L2924/01029
摘要： Structures and methods for detecting solder wetting of pedestal sidewalls. The structure includes a semiconductor wafer having an array of integrated circuit chips, each of the integrated circuit chips having an array of chip pedestals having respective chip solder columns on top of the chip pedestals, the pedestals spaced apart a first distance in a first direction and a spaced apart second distance in second direction perpendicular to the first direction; and at least one monitor structure disposed in different regions of the wafer from the integrated circuit chips, the monitor structure comprising at least a first pedestal and a first solder column on a top surface of the first pedestal and a second pedestal and a second solder column on a top surface of the second pedestal, the first and the second pedestals spaced apart a third distance, the third distance less than the first and the second distances.
摘要翻译：用于检测基座侧壁焊料润湿的结构和方法。该结构包括具有集成电路芯片阵列的半导体晶片，每个集成电路芯片具有芯片基座阵列，其具有位于芯片基座顶部的相应的芯片焊料柱，基座沿第一方向隔开第一距离;以及在垂直于第一方向的第二方向上间隔开的第二距离; 以及设置在所述晶片与所述集成电路芯片的不同区域中的至少一个监视器结构，所述监视器结构至少包括在所述第一基座的顶表面上的第一基座和第一焊料柱，以及第二基座和第二焊接柱在第二基座的顶表面上，第一和第二基座间隔第三距离，第三距离小于第一和第二距离。

20. 发明授权

US08513814B2 Buffer pad in solder bump connections and methods of manufacture 有权
标题翻译：焊料缓冲焊盘连接和制造方法
公开(公告)号：US08513814B2
公开(公告)日：2013-08-20
申请号：US13098816
申请日：2011-05-02
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L23/48
CPC分类号： H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/02126 , H01L2224/02141 , H01L2224/02145 , H01L2224/0401 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05556 , H01L2224/05558 , H01L2224/05572 , H01L2224/05664 , H01L2224/061 , H01L2224/13006 , H01L2224/13017 , H01L2224/13022 , H01L2224/13027 , H01L2224/131 , H01L2224/141 , H01L2224/14104 , H01L2924/00014 , H01L2924/01029 , H01L2924/01074 , H01L2924/00012 , H01L2924/014 , H01L2224/05552
摘要： Structures are provided with raised buffer pads for solder bumps. Methods are also provided for forming the raised buffer pads for solder bumps. The method includes forming a raised localized buffer pad structure on a tensile side of a last metal layer of a solder bump connection. The raised localized buffer pad structure increases a height of a portion of a pad structure of the solder bump connection with respect to a compressive side of the last metal layer.
摘要翻译：结构提供有用于焊料凸块的凸起缓冲垫。还提供了用于形成用于焊料凸块的凸起缓冲垫的方法。该方法包括在焊料凸块连接的最后金属层的拉伸侧上形成升高的局部缓冲垫结构。凸起的局部缓冲垫结构相对于最后一个金属层的压缩侧增加焊料凸块连接的焊盘结构的一部分的高度。

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