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11. 发明申请

US20130224930A1 METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT 审中-公开
标题翻译：制造可变电阻元件的方法
公开(公告)号：US20130224930A1
公开(公告)日：2013-08-29
申请号：US13805198
申请日：2011-06-21
申请人： Koji Arita , Takumi Mikawa
发明人： Koji Arita , Takumi Mikawa
IPC分类号： H01L45/00
CPC分类号： H01L45/16 , H01L27/2409 , H01L27/2418 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A variable resistance element manufacturing method includes: forming a conductive plug in an interlayer insulating film on a substrate; planarizing an upper surface of the insulating film such that an upper part of the conductive plug protrudes from an upper surface of the insulating film by removing (i) a depression in the insulating film formed around the conductive plug and (ii) a depression in the insulating film formed across a plurality of conductive plugs; forming, on the insulating film and the plug, a lower electrode layer electrically connected to the plug; planarizing an upper surface of the lower electrode layer to remove a protruding part on the upper surface of the lower electrode layer; forming, on the lower electrode layer, a variable resistance layer; forming an upper electrode layer on the variable resistance layer; and forming a lower electrode, the variable resistance layer, and an upper electrode layer.
摘要翻译：一种可变电阻元件制造方法，包括：在基板上的层间绝缘膜中形成导电插塞; 平面化绝缘膜的上表面，使得导电插塞的上部从绝缘膜的上表面突出，通过去除（i）形成在导电插塞周围的绝缘膜中的凹陷，以及（ii）形成在多个导电插塞上的绝缘膜; 在所述绝缘膜和所述插塞上形成电连接到所述插头的下电极层; 平面化下电极层的上表面以去除下电极层的上表面上的突出部分; 在下电极层上形成可变电阻层; 在所述可变电阻层上形成上电极层; 以及形成下电极，可变电阻层和上电极层。

12. 发明授权

US08394669B2 Resistance variable element and resistance variable memory device 有权
标题翻译：电阻可变元件和电阻变量存储器件
公开(公告)号：US08394669B2
公开(公告)日：2013-03-12
申请号：US13128575
申请日：2010-07-12
申请人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
IPC分类号： H01L21/02 , H01L45/00
CPC分类号： H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1666 , H01L45/1675
摘要： A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
摘要翻译：在根据本发明的通孔交叉点结构存储装置中使用的电阻可变元件（100）和包括电阻可变元件的电阻变化存储装置包括基板（7）和层间绝缘层（ 3），并且具有形成贯通层间绝缘层的通孔（4）的构造，在通孔的外侧形成有包含过渡金属氧化物的第一电阻变化层（2），在通孔内形成有包含过渡金属氧化物的第二电阻变化层（5），第一电阻变化层的电阻率与第二电阻变化层不同，第一电阻变化层和第二电阻变化层接触彼此仅在更靠近基板的通孔的开口（20）中。

13. 发明授权

US08482958B2 Current steering element, memory element, memory, and method of manufacturing current steering element 有权
标题翻译：当前的导向元件，存储元件，存储器以及制造电流转向元件的方法
公开(公告)号：US08482958B2
公开(公告)日：2013-07-09
申请号：US13321018
申请日：2011-03-10
申请人： Yukio Hayakawa , Koji Arita , Takumi Mikawa , Takeki Ninomiya
发明人： Yukio Hayakawa , Koji Arita , Takumi Mikawa , Takeki Ninomiya
IPC分类号： G11C11/00
CPC分类号： H01L27/2409 , H01L45/146
摘要： Provided is a current steering element that can prevent write didturb even when an electrical pulse with different polarities is applied and that can cause a large current to flow through a variable resistance element. The current steering element includes a first electrode (32), a second electrode (31), and a current steering layer (33). The current steering layer (33) comprises SiNx (where 0
摘要翻译：提供了即使当施加具有不同极性的电脉冲并且可能导致大电流流过可变电阻元件时也能够防止写入干扰的电流导向元件。当前的转向元件包括第一电极（32），第二电极（31）和电流转向层（33）。当前的转向层（33）包括加入氢或氟的SiNx（其中0 <0.85）。当D（D = D0×1022原子/ cm3）表示氢或氟的密度时，d（nm）表示电流导向层（33）的厚度，V0（V）表示适用于第一电极（32）和第二电极（31）D，x，d和V0满足下式。（ln（1000（C·exp（α·d）exp（β·x））-1）γ）2 @ V0 ）γ）2-（ln（10000（C·exp（α·d）exp（β·x））-1）γ）2/2> = 0其中C = k1×D0k2，α，β， k1和k2是常数。

14. 发明授权

US08355274B2 Current steering element, storage element, storage device, and method for manufacturing current steering element 有权
标题翻译：目前的导向元件，存储元件，存储装置以及用于制造当前转向元件的方法
公开(公告)号：US08355274B2
公开(公告)日：2013-01-15
申请号：US13061312
申请日：2009-09-17
申请人： Koji Arita , Takumi Mikawa , Mitsuteru IIjima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Mitsuteru IIjima , Kenji Tominaga
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0
摘要翻译：即使施加具有不同极性的电脉冲也能够防止写入干扰的发生，并且可能导致大的电流流过可变电阻元件并且可以无限制地写入数据的电流导向元件。在一种存储元件（3）中，包括：可变电阻元件（1），其电阻值响应于具有正极性和负极性的电脉冲的应用而变化并且保持改变的电阻值; 以及当施加电脉冲时转向流过可变电阻元件（1）的电流的当前操舵元件（2），所述电流操舵元件（2）包括：第一电极（32）; 第二电极（31）; 和介于所述第一电极（32）和所述第二电极（31）之间的电流转向层（33）。当电流导向层（33）包括SiNx（0

15. 发明申请

US20120256156A1 MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US20120256156A1
公开(公告)日：2012-10-11
申请号：US13515592
申请日：2010-11-17
申请人： Koji Arita , Takumi Mikawa
发明人： Koji Arita , Takumi Mikawa
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： G11C13/0007 , G11C2213/79 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： Disclosed is a memory device provided with a plurality of memory cells and a lead-out line (12) shared among the memory cells. Each memory cell is provided with a transistor (6) formed above a substrate (1) and a variable resistance element (10) having a lower electrode (7), an upper electrode (9) that comprises a noble metal, and a variable resistance layer (8) disposed between the lower electrode (7) and the upper electrode (9). The resistance value of the variable resistance layer (8) changes reversibly in response to electric pulses that go through the transistor (6) and are applied between the lower electrode (7) and the upper electrode (9). The lead-out line (12) is in direct contact with the upper electrodes (9) of the memory cells.
摘要翻译：公开了一种设置有多个存储单元和在存储单元之间共享的引出线（12）的存储器件。每个存储单元设置有形成在基板（1）上方的晶体管（6）和具有下电极（7）的可变电阻元件（10），包含贵金属的上电极（9）和可变电阻层（8）设置在下电极（7）和上电极（9）之间。可变电阻层（8）的电阻值响应于通过晶体管（6）的电脉冲而可逆地改变并施加在下电极（7）和上电极（9）之间。引出线（12）与存储单元的上电极（9）直接接触。

16. 发明授权

US07981760B2 Method for manufacturing nonvolatile storage element and method for manufacturing nonvolatile storage device 有权
标题翻译：非易失性存储元件的制造方法及其制造方法
公开(公告)号：US07981760B2
公开(公告)日：2011-07-19
申请号：US12669812
申请日：2009-05-07
申请人： Yoshio Kawashima , Takumi Mikawa , Takeshi Takagi , Koji Arita
发明人： Yoshio Kawashima , Takumi Mikawa , Takeshi Takagi , Koji Arita
IPC分类号： H01L21/00
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A method for manufacturing a nonvolatile storage element that minimizes shape shift between an upper electrode and a lower electrode, and which includes: depositing, in sequence, a connecting electrode layer which is conductive, a lower electrode layer and a variable resistance layer which are made of a non-noble metal nitride and are conductive, an upper electrode layer made of noble metal, and a mask layer; forming the mask layer into a predetermined shape; forming the upper electrode layer, the variable resistance layer, and the lower electrode layer into the predetermined shape by etching using the mask layer as a mask; and removing, simultaneously, the mask and a region of the connecting electrode layer that has been exposed by the etching.
摘要翻译：一种用于制造使上部电极和下部电极之间的形状偏移最小化的非易失性存储元件的方法，包括：依次沉积导电的连接电极层，下部电极层和可变电阻层的非贵金属氮化物，并且是导电的，由贵金属制成的上电极层和掩模层; 将掩模层形成为预定形状; 通过使用掩模层作为掩模通过蚀刻将上电极层，可变电阻层和下电极层形成为预定形状; 并且同时去除已经通过蚀刻暴露的掩模和连接电极层的区域。

17. 发明授权

US07960770B2 Nonvolatile memory element array with storing layer formed by resistance variable layers 有权
标题翻译：具有由电阻变化层形成的存储层的非易失存储元件阵列
公开(公告)号：US07960770B2
公开(公告)日：2011-06-14
申请号：US12445380
申请日：2007-10-12
申请人： Takumi Mikawa , Takeshi Takagi , Yoshio Kawashima , Koji Arita
发明人： Takumi Mikawa , Takeshi Takagi , Yoshio Kawashima , Koji Arita
IPC分类号： H01L29/76
CPC分类号： H01L27/101 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/124 , H01L45/146 , H01L45/147 , H01L45/1625 , H01L45/1683
摘要： A lower electrode (22) is provided on a semiconductor chip substrate (26). A lower electrode (22) is covered with a first interlayer insulating layer (27) from above. A first contact hole (28) is provided on the lower electrode (22) to penetrate through the first interlayer insulating layer (27). A low-resistance layer (29) forming the resistance variable layer (24) is embedded to fill the first contact hole (28). A high-resistance layer (30) is provided on the first interlayer insulating layer (27) and the low-resistance layer (29). The resistance variable layer (24) is formed by a multi-layer resistance layer including a single layer of the high-resistance layer (30) and a single layer of the low-resistance layer (29). The low-resistance layer (29) forming the memory portion (25) is isolated from at least its adjacent memory portion (25).
摘要翻译：下电极（22）设置在半导体芯片基板（26）上。下部电极（22）从上方被第一层间绝缘层（27）覆盖。第一接触孔（28）设置在下电极（22）上以穿透第一层间绝缘层（27）。嵌入形成电阻变化层（24）的低电阻层（29），以填充第一接触孔（28）。在第一层间绝缘层（27）和低电阻层（29）上设置有高电阻层（30）。电阻变化层（24）由包含单层高电阻层（30）和单层低电阻层（29）的多层电阻层形成。形成存储器部分（25）的低电阻层（29）至少与其相邻的存储器部分（25）隔离。

18. 发明申请

US20100308298A1 NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE INCORPORATING NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储器元件和非易失性存储器件，并入非易失性存储元件
公开(公告)号：US20100308298A1
公开(公告)日：2010-12-09
申请号：US12745599
申请日：2009-09-29
申请人： Takeki Ninomiya , Koji Arita , Takumi Mikawa , Satoru Fujii
发明人： Takeki Ninomiya , Koji Arita , Takumi Mikawa , Satoru Fujii
IPC分类号： H01L45/00 , H01L21/16
CPC分类号： H01L45/1675 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L27/2481 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element includes a first electrode (103) formed on a substrate (101), a resistance variable layer (108) and a second electrode (107), wherein the resistance variable layer has a multi-layer structure including at least three layers which are a first transition metal oxide layer (104), a second transition metal oxide layer (106) which is higher in oxygen concentration than the first transition metal oxide layer (104), and a transition metal oxynitride layer (105). The second transition metal oxide layer (106) is in contact with either one of the first electrode (103) and the second electrode (107). The transition metal oxynitride layer (105) is provided between the first transition metal oxide layer (104) and the second transition metal oxide layer (106).
摘要翻译：非易失性存储元件包括形成在基板（101）上的第一电极（103），电阻变化层（108）和第二电极（107），其中电阻变化层具有至少三层的多层结构其是第一过渡金属氧化物层（104），氧浓度高于第一过渡金属氧化物层（104）的第二过渡金属氧化物层（106）和过渡金属氮氧化物层（105）。第二过渡金属氧化物层（106）与第一电极（103）和第二电极（107）中的任一个接触。过渡金属氧氮化物层（105）设置在第一过渡金属氧化物层（104）和第二过渡金属氧化物层（106）之间。

19. 发明申请

US20100190313A1 METHOD FOR MANUFACTURING NONVOLATILE STORAGE ELEMENT AND METHOD FOR MANUFACTURING NONVOLATILE STORAGE DEVICE 有权
标题翻译：制造非易失性存储元件的方法和制造非易失存储器件的方法
公开(公告)号：US20100190313A1
公开(公告)日：2010-07-29
申请号：US12669812
申请日：2009-05-07
申请人： Yoshio Kawashima , Takumi Mikawa , Takeshi Takagi , Koji Arita
发明人： Yoshio Kawashima , Takumi Mikawa , Takeshi Takagi , Koji Arita
IPC分类号： H01L21/8246
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A method for manufacturing a nonvolatile storage element that minimizes shape shift between an upper electrode and a lower electrode, and which includes: depositing, in sequence, a connecting electrode layer which is conductive, a lower electrode layer and a variable resistance layer which are made of a non-noble metal nitride and are conductive, an upper electrode layer made of noble metal, and a mask layer; forming the mask layer, into a predetermined shape; forming the upper electrode layer, the variable resistance layer, and the lower electrode layer into the predetermined shape by etching using the mask layer as a mask; and removing, simultaneously, the mask and a region of the connecting electrode layer that has been exposed by the etching.
摘要翻译：一种用于制造使上部电极和下部电极之间的形状偏移最小化的非易失性存储元件的方法，包括：依次沉积导电的连接电极层，下部电极层和可变电阻层的非贵金属氮化物，并且是导电的，由贵金属制成的上电极层和掩模层; 形成掩模层，形成预定的形状; 通过使用掩模层作为掩模通过蚀刻将上电极层，可变电阻层和下电极层形成为预定形状; 并且同时去除已经通过蚀刻暴露的掩模和连接电极层的区域。

20. 发明授权

US08445886B2 Nonvolatile memory element, nonvolatile memory device, nonvolatile semiconductor device, and method of manufacturing nonvolatile memory element 有权
标题翻译：非易失性存储元件，非易失性存储器件，非易失性半导体器件以及制造非易失性存储元件的方法
公开(公告)号：US08445886B2
公开(公告)日：2013-05-21
申请号：US13147321
申请日：2010-02-02
申请人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
发明人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
IPC分类号： H01L29/02
CPC分类号： H01L45/146 , H01L27/2418 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/1273
摘要： A nonvolatile memory element comprises a first electrode (103); a second electrode (105); and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (103, 105); the resistance variable layer (104) including a first tantalum oxide layer (107) comprising a first tantalum oxide and a second tantalum oxide layer (108) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0
摘要翻译：非易失性存储元件包括第一电极（103）; 第二电极（105）; 以及设置在所述第一电极（103）和所述第二电极（105）之间的电阻变化层（104），所述电阻变化层的电阻值响应于施加在所述电极（103,105）之间的电信号而可逆地变化; 电阻变化层（104）包括包含第一钽氧化物的第一钽氧化物层（107）和包含与第一钽氧化物不同氧含量的第二氧化钽的第二钽氧化物层（108），第一钽氧化物层和第二钽氧化物层堆叠在一起，并且被配置为当第一钽氧化物表示为TaO x时满足0

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