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11. 发明申请

US20070002061A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070002061A1
公开(公告)日：2007-01-04
申请号：US11270553
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G06F13/14
CPC分类号： G09G3/2096 , G09G3/3666 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0289 , G09G2310/0297 , G09G2360/18
摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include a high-speed interface circuit block HB which transfers data through a serial bus using differential signals, and a circuit block other than HB. The high-speed interface circuit block HB is disposed as an Mth circuit block CBM (2≦M≦N−1) of the circuit blocks CB1 to CBN.
摘要翻译：一种集成电路装置，包括沿着第一方向D 1布置的第一至第N电路块CB 1至CBN，当第一方向D 1是从集成电路器件的第一侧朝向与第一方向相反的第三侧的方向时所述第一侧为短边，当第二方向D 2为从所述集成电路器件的第二侧朝向与所述第二侧相反的第四侧的方向时，所述第二侧为长边。电路块CB 1至CBN包括通过使用差分信号的串行总线传送数据的高速接口电路块HB以及HB以外的电路块。高速接口电路块HB被布置为电路块CB 1至CBN的第M个电路块CBM（2 <= M <= N-1）。

12. 发明申请

US20070001974A1 Integrated circuit device and electronic instrument 审中-公开
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070001974A1
公开(公告)日：2007-01-04
申请号：US11270665
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G3/3688 , G09G2300/0426 , G09G2310/0267 , G09G2310/027 , G09G2310/0278 , G09G2310/08 , G09G2320/0276 , G09G2320/0673 , G09G2330/028
摘要： An integrated circuit device includes: first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The first to Nth circuit blocks CB1 to CBN includes a logic circuit block LB which sets grayscale characteristic adjustment data; and a grayscale voltage generation circuit block GB which generates grayscale voltages based on the set adjustment data. The logic circuit block LB and the grayscale voltage generation circuit block GB are disposed adjacent to each other along the direction D1.
摘要翻译：集成电路装置包括：当方向D 1是从集成电路装置的第一侧朝向与第一方向相反的第三侧的方向时，沿着第一方向D 1布置的第一至第N电路块CB 1至CBN 所述第一侧为短边，当第二方向D 2为从所述集成电路器件的第二侧朝向与所述第二侧相反的第四侧的方向时，所述第二侧为长边。第一至第N电路块CB 1至CBN包括设置灰度特性调整数据的逻辑电路块LB; 以及基于设定的调整数据生成灰度电压的灰度级电压发生电路块GB。逻辑电路块LB和灰度级电压产生电路块GB沿着方向D1彼此相邻设置。

13. 发明申请

US20070001971A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070001971A1
公开(公告)日：2007-01-04
申请号：US11270585
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G09G3/36
CPC分类号： G09G5/395 , G09G3/3648 , G09G3/3688 , G09G3/3696 , G09G5/363 , G09G2300/0408 , G09G2310/027 , G09G2320/0276
摘要： An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1, a first interface region provided on the D2 side of the circuit blocks CB1 to CBN, and a second interface region provided on the D4 side of the circuit blocks CB1 to CBN. The circuit blocks CB1 to CBN include a data driver block DB and a circuit block other than the data driver block DB. When the widths of the first interface region, the circuit blocks CB1 to CBN, and the second interface region in the direction D2 are respectively W1, WB, and W2, the integrated circuit device has a width W in the direction D2 of “W1+WB+W2≦W
摘要翻译：集成电路器件包括沿着方向D1设置的第一至第N电路块CB1至CBN，设置在电路块CB1至CBN的D2侧的第一接口区域和设置在电路块的D4侧的第二接口区域 CB1到CBN。电路块CB1至CBN包括数据驱动器块DB和除数据驱动器块DB之外的电路块。当第一接口区域，电路块CB1至CBN和方向D2上的第二接口区域的宽度分别为W1，WB和W2时，集成电路器件的方向D2的宽度W为“W1 + WB + W2 <= W

14. 发明授权

US07522441B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US07522441B2
公开(公告)日：2009-04-21
申请号：US11270553
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G11C5/06
CPC分类号： G09G3/2096 , G09G3/3666 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0289 , G09G2310/0297 , G09G2360/18
摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include a high-speed interface circuit block HB which transfers data through a serial bus using differential signals, and a circuit block other than HB. The high-speed interface circuit block HB is disposed as an Mth circuit block CBM (2≦M≦N−1) of the circuit blocks CB1 to CBN.
摘要翻译：一种集成电路装置，包括沿着第一方向D1设置的第一至第N电路块CB1至CBN，当第一方向D1是从集成电路器件的第一侧朝向与第一侧相反的第三侧的方向时，第一侧为短边，当第二方向D2为从集成电路器件的第二侧向与第二侧相反的第四侧的方向时，第二侧为长边。电路块CB1至CBN包括通过使用差分信号的串行总线传送数据的高速接口电路块HB以及HB以外的电路块。高速接口电路块HB被布置为电路块CB1至CBN的第M个电路块CBM（2 <= M <= N-1）。

15. 发明申请

US20070002188A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070002188A1
公开(公告)日：2007-01-04
申请号：US11477715
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G02F1/00 , H04N5/74
CPC分类号： G09G3/3688 , G09G3/2011 , G09G3/2096 , G09G3/3648 , G09G3/3677 , G09G3/3696 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/0289 , G09G2320/0285 , G09G2320/0673 , G09G2330/028 , G09G2330/04 , G09G2360/18
摘要： An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1 when a direction from a first side which is a short side of the integrated circuit device toward a third side opposite to the first side is a direction D1 and a direction from a second side which is a long side of the integrated circuit device toward a fourth side opposite to the second side is a direction D2. At least one of the circuit blocks on both ends of the circuit blocks CB1 to CBN is a scan driver block for driving a scan line. Or, the scan driver block SB is disposed along the direction D1 on the side of the first to Nth circuit blocks in the direction D2.
摘要翻译：集成电路器件包括沿着方向D1设置的第一至第N电路块CB 1至CB N，当从集成电路器件的短边的第一侧朝向与第一侧相反的第三侧的方向为方向D时 1和从集成电路装置的长边朝向与第二侧相反的第四侧的第二侧的方向是方向D 2.电路块CB 1至第二侧的至少一个电路块 CBN是用于驱动扫描线的扫描驱动器块。或者，扫描驱动块SB沿方向D 1沿方向D 2在第一至第N电路块侧设置。

16. 发明授权

US07755587B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US07755587B2
公开(公告)日：2010-07-13
申请号：US11477715
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/2011 , G09G3/2096 , G09G3/3648 , G09G3/3677 , G09G3/3696 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/0289 , G09G2320/0285 , G09G2320/0673 , G09G2330/028 , G09G2330/04 , G09G2360/18
摘要： An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1 when a direction from a first side which is a short side of the integrated circuit device toward a third side opposite to the first side is a direction D1 and a direction from a second side which is a long side of the integrated circuit device toward a fourth side opposite to the second side is a direction D2. At least one of the circuit blocks on both ends of the circuit blocks CB1 to CBN is a scan driver block for driving a scan line. Or, the scan driver block SB is disposed along the direction D1 on the side of the first to Nth circuit blocks in the direction D2.
摘要翻译：集成电路装置包括：当从集成电路装置的短边的第一侧向与第一侧相反的第三侧的方向为方向D1时，沿着方向D1设置的第一至第N电路块CB1至CBN为方向D1，从集成电路装置的长边的第二侧向与第二侧相反的第四侧的方向为方向D2。电路块CB1至CBN的两端的至少一个电路块是用于驱动扫描线的扫描驱动器块。或者，扫描驱动块SB沿方向D2的第一至第N电路块侧的方向D1设置。

17. 发明授权

US07411804B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US07411804B2
公开(公告)日：2008-08-12
申请号：US11270779
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G11C5/06
CPC分类号： G11C5/025 , G09G3/3688 , G09G2300/0426 , G09G2310/027
摘要： An integrated circuit device, including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines; and the memory block MB includes a memory cell array, a row address decoder RD, and a sense amplifier block SAB. The row address decoder RD is disposed so that a longitudinal direction of the row address decoder RD coincides with the direction D1, and the sense amplifier block SAB is disposed so that a longitudinal direction of the sense amplifier block SAB coincides with the direction D2.
摘要翻译：一种集成电路装置，包括沿着第一方向D 1布置的第一至第N电路块CB 1至CBN，当第一方向D1是从集成电路装置的第一侧向与第三方向相反的第三侧的方向时第一侧，第一侧为短边，当第二方向D 2为从集成电路器件的第二侧向与第二侧相反的第四侧的方向时，第二侧为长边。电路块CB 1至CBN包括存储图像数据的至少一个存储器块MB和驱动数据线的至少一个数据驱动器块DB; 并且存储块MB包括存储单元阵列，行地址解码器RD和读出放大器块SAB。行地址解码器RD被布置成使得行地址解码器RD的纵向与方向D1一致，并且读出放大器块SAB被布置成使得读出放大器块SAB的纵向方向与方向D 2重合。

18. 发明申请

US20070002063A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070002063A1
公开(公告)日：2007-01-04
申请号：US11270551
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
IPC分类号： G09G5/37
CPC分类号： G09G3/3688 , G09G2310/0267 , G09G2310/027
摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines. The memory block MB and the data driver block DB are disposed adjacent to each other along the first direction D1.
摘要翻译：一种集成电路装置，包括沿着第一方向D 1布置的第一至第N电路块CB 1至CBN，当第一方向D 1是从集成电路器件的第一侧朝向与第一方向相反的第三侧的方向时所述第一侧为短边，当第二方向D 2为从所述集成电路器件的第二侧朝向与所述第二侧相反的第四侧的方向时，所述第二侧为长边。电路块CB 1至CBN包括存储图像数据的至少一个存储器块MB和驱动数据线的至少一个数据驱动器块DB。存储块MB和数据驱动块DB沿着第一方向D1彼此相邻设置。

19. 发明申请

US20070001972A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070001972A1
公开(公告)日：2007-01-04
申请号：US11270631
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号： G09G3/36
CPC分类号： G09G5/395 , G09G3/3648 , G09G3/3688 , G09G5/363 , G09G2300/0408 , G09G2310/027
摘要： An integrated circuit device includes: first to Nth circuit blocks CB1 to CBN disposed along a direction D1, the circuit blocks CB1 to CBN includes a data driver block DB. A data driver DR included in the data driver block DB includes Q driver cells DRC1 to DRCQ arranged along a direction D2, each of the driver cells outputting a data signal corresponding to image data for one pixel. When a width of each of the driver cells DRC1 to DRCQ in the direction D2 is WD, each of the circuit blocks CB1 to CBN has a width WB in the direction D2 of “Q×WD≦WB
摘要翻译：集成电路装置包括：沿方向D1设置的第一至第N电路块CB 1至CBN，电路块CB 1至CBN包括数据驱动器块DB。包括在数据驱动器块DB中的数据驱动器DR包括沿着方向D 2布置的Q个驱动器单元DRC 1至DRCQ，每个驱动器单元输出与一个像素的图像数据相对应的数据信号。当驱动器单元DRC 1至DRCQ的方向D 2的宽度为WD时，电路块CB 1至CBN中的每一个在“QxWD <= WB <（Q + 1）”的方向D 2上具有宽度WB ）xWD“。

20. 发明授权

US08547722B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US08547722B2
公开(公告)日：2013-10-01
申请号：US13137995
申请日：2011-09-23
申请人： Satoru Ito , Masahiko Moriguchi , Kazuhiro Maekawa , Noboru Itomi , Satoru Kodaira , Junichi Karasawa , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise
发明人： Satoru Ito , Masahiko Moriguchi , Kazuhiro Maekawa , Noboru Itomi , Satoru Kodaira , Junichi Karasawa , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise
IPC分类号： G11C5/06
CPC分类号： G09G3/3688 , G09G3/2011 , G09G2330/02 , G09G2330/04 , H01L2224/05553
摘要： An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.
摘要翻译：集成电路装置包括第一至第N电路块CB1至CBN，沿第一至第N电路块CB1至CBN的第四侧和第二侧设置的第一接口区域以及沿着第二侧设置的第二接口区域，在第一至第N电路块CB1至CBN的D4侧。使用低于第I层的布线层形成的局部线LLG设置在相邻的电路块之间，作为信号线和电源线中的至少一个。使用第I或更高布线层形成的全局线GLG和GLD沿着方向D1设置在布置在不相邻电路块之间的电路块上，作为信号线和电源线中的至少一个。

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