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11. 发明授权

US08230402B2 Testing and debugging of dynamic binary translation 有权
标题翻译：动态二进制翻译的测试和调试
公开(公告)号：US08230402B2
公开(公告)日：2012-07-24
申请号：US11865024
申请日：2007-09-30
申请人： William Y. Chen , Jiwei Lu , Geetha K. Vallabhaneni
发明人： William Y. Chen , Jiwei Lu , Geetha K. Vallabhaneni
IPC分类号： G06F9/45
CPC分类号： G06F11/3696 , G06F9/45504 , G06F11/3644
摘要： A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.
摘要翻译：一种用于动态二进制转换的测试和调试的方法，其中动态二进制转换器允许在具有与目标机器不同的计算机体系结构的主机上透明地执行目标二进制程序，包括在运行时选择最小的目标机器状态集合用于模拟，时间。来自目标二进制文件的一系列目标机器指令被转换成一系列主机指令。在翻译期间，将多个检查点插入到一系列主机指令中。在翻译期间，将多个验证点插入到主机指令系列中。执行一系列主机指令，包括检查点和验证点。检查点的执行确定模拟的目标机器状态。验证点的执行将有关模拟目标机器状态的信息发送到外部验证器。

12. 发明申请

US20100114555A1 HANDLING MUTEX LOCKS IN A DYNAMIC BINARY TRANSLATION ACROSS HETEROGENOUS COMPUTER SYSTEMS 有权
标题翻译：通过异构计算机系统处理动态二进制翻译中的静音锁
公开(公告)号：US20100114555A1
公开(公告)日：2010-05-06
申请号：US12264944
申请日：2008-11-05
申请人： Abhinav Das , Jiwei Lu , William Y. Chen , Chandramouli Banerjee
发明人： Abhinav Das , Jiwei Lu , William Y. Chen , Chandramouli Banerjee
IPC分类号： G06F9/455
CPC分类号： G06F9/45516 , G06F9/45504
摘要： A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable binary includes a mutex lock encoded instructions for implementing a mutex lock. The guest executable binary is then executed on the host computer architecture by first translating the guest executable binary to a translated executable binary. The encoded instructions for implementing a mutex lock are translated by mapping the mutex lock to an instance of a compound mutex lock data structure. A computer system implementing methods for executing non-native binaries on a host computer architecture is also provided.
摘要翻译：用于在主计算机体系结构上执行非本地二进制文件的方法包括：接收在计算机可读介质上编码的访客可执行二进制文件。访客可执行二进制文件可在第一个计算机体系结构上执行。此外，访客可执行二进制包括用于实现互斥锁的互斥锁编码指令。然后通过首先将访客可执行二进制文件翻译成可翻译的可执行二进制文件，在主计算机体系结构上执行访客执行二进制文件。通过将互斥锁锁定到复合互斥锁数据结构的实例来转换用于实现互斥锁的编码指令。还提供了一种实现用于在主机结构上执行非本地二进制文件的方法的计算机系统。

13. 发明授权

US11048516B2 Systems, methods, and apparatuses for last branch record support compatible with binary translation and speculative execution using an architectural bit array and a write bit array 有权
公开(公告)号：US11048516B2
公开(公告)日：2021-06-29
申请号：US14752891
申请日：2015-06-27
申请人： Paul Caprioli , Koichi Yamada , Jason M. Agron , Jiwei Lu
发明人： Paul Caprioli , Koichi Yamada , Jason M. Agron , Jiwei Lu
IPC分类号： G06F9/38 , G06F9/30
摘要： Systems, methods, and apparatuses for last branch record support are described. In an embodiment, a hardware processor core comprises a hardware execution unit to execute a branch instruction, at least two last branch record (LBR) registers to store a source and destination information of a branch taken during program execution, wherein an entry in a LBR register is to include an encoding of the branch, a write bit array to indicate which LBR register is architecturally correct, an architectural bit array to indicate when an LBR register has been written, and a plurality of top of stack pointers to indicate which LBR register in a LBR register stack is to be written.

14. 发明授权

US09665374B2 Binary translation mechanism 有权
公开(公告)号：US09665374B2
公开(公告)日：2017-05-30
申请号：US14574797
申请日：2014-12-18
申请人： Koichi Yamada , Ashish Bijlani , Jiwei Lu , Cheng Yan Zhao
发明人： Koichi Yamada , Ashish Bijlani , Jiwei Lu , Cheng Yan Zhao
IPC分类号： G06F7/38 , G06F13/00 , G06F9/38 , G06F9/30
CPC分类号： G06F9/3806 , G06F8/52 , G06F9/30054 , G06F9/30145
摘要： A method is described. The method includes receiving an instruction, accessing a return cache to load a predicted return target address upon determining that the instruction is a return instruction, searching a lookup table for executable binary code upon determining that the predicted translated return target address is incorrect and executing the executable binary code to perform a binary translation.

15. 发明授权

US08020155B2 Mechanism for optimizing function execution 有权
标题翻译：优化功能执行的机制
公开(公告)号：US08020155B2
公开(公告)日：2011-09-13
申请号：US11605540
申请日：2006-11-28
申请人： Jiwei Lu , William Yu-Wei Chen
发明人： Jiwei Lu , William Yu-Wei Chen
IPC分类号： G06F9/45
CPC分类号： G06F9/4484
摘要： A mechanism is provided for managing the referencing of at least two versions of a function. A first version is a single threaded version that does not ensure multi-thread safety. A second version is a multi threaded version that does ensure multi-thread safety. The mechanism determines whether a set of executable code (e.g. a program) is currently executing in single-threaded mode or multi-threaded mode. If the executable code is executing in single-threaded mode, then the mechanism causes the executable code to reference the first version of the function. If the executable code is executing in multi-threaded mode, then the mechanism causes the executable code to reference the second version of the function. By doing so, the mechanism ensures that the additional overhead of ensuring multi-thread safety is incurred only when it is needed. In this manner, the mechanism makes execution of the function more optimal.
摘要翻译：提供了一种用于管理功能的至少两个版本的引用的机制。第一个版本是单线程版本，不能确保多线程安全。第二个版本是一个多线程版本，确保多线程安全。该机制确定一组可执行代码（例如，程序）当前是以单线程模式还是多线程模式执行。如果可执行代码在单线程模式下执行，则该机制将使可执行代码引用该函数的第一个版本。如果可执行代码在多线程模式下执行，则该机制使可执行代码引用该函数的第二个版本。通过这样做，该机制确保仅在需要时才产生确保多线程安全的额外开销。以这种方式，该机制使得该功能的执行更加优化。

16. 发明申请

US20100274551A1 SUPPORT FOR A NON-NATIVE APPLICATION 有权
标题翻译：支持非本地应用程序
公开(公告)号：US20100274551A1
公开(公告)日：2010-10-28
申请号：US12429399
申请日：2009-04-24
申请人： Abhinav Das , Jiwei Lu , William Y. Chen , Chandramouli Banerjee
发明人： Abhinav Das , Jiwei Lu , William Y. Chen , Chandramouli Banerjee
IPC分类号： G06F9/455
CPC分类号： G06F9/45504 , G06F9/45516 , G06F11/3612 , G06F11/3636
摘要： Aspects of the invention are directed to a systems and methods for operating a non-native binary in dynamic binary translation environment. In accordance with an embodiment, there is provided a computer program product in a computer readable medium. The product includes program code for receiving a non-native binary in a computer readable medium and program code for translating the non-native binary. Additionally, the product includes program code for executing the translated non-native binary, the non-native binary including one or more threads, and program code for pausing execution of the translated non-native binary. The product also includes program code for providing guest instruction boundary information to a monitoring process and program code for analyzing a state of each thread of the translated non-native binary. Moreover, the product includes program code for fast-forwarding at least one thread so that its state is consistent with the guest instruction boundary
摘要翻译：本发明的方面涉及用于在动态二进制翻译环境中操作非本地二进制文件的系统和方法。根据实施例，提供了一种计算机可读介质中的计算机程序产品。该产品包括用于在计算机可读介质中接收非本地二进制文件的程序代码和用于转换非本地二进制文件的程序代码。此外，该产品包括用于执行所翻译的非本地二进制文件的程序代码，包括一个或多个线程的非本地二进制文件以及用于暂停执行所翻译的非本地二进制文件的程序代码。该产品还包括用于向监视过程提供访客指令边界信息的程序代码和用于分析翻译的非本地二进制文件的每个线程的状态的程序代码。此外，该产品包括用于快速转发至少一个线程的程序代码，使得其状态与访客指令边界一致

17. 发明申请

US20080127071A1 Mechanism for optimizing function execution 有权
标题翻译：优化功能执行的机制
公开(公告)号：US20080127071A1
公开(公告)日：2008-05-29
申请号：US11605540
申请日：2006-11-28
申请人： Jiwei Lu , William Yu-Wei Chen
发明人： Jiwei Lu , William Yu-Wei Chen
IPC分类号： G06F9/44
CPC分类号： G06F9/4484
摘要： A mechanism is provided for managing the referencing of at least two versions of a function. A first version is a single threaded version that does not ensure multi-thread safety. A second version is a multi threaded version that does ensure multi-thread safety. The mechanism determines whether a set of executable code (e.g. a program) is currently executing in single-threaded mode or multi-threaded mode. If the executable code is executing in single-threaded mode, then the mechanism causes the executable code to reference the first version of the function. If the executable code is executing in multi-threaded mode, then the mechanism causes the executable code to reference the second version of the function. By doing so, the mechanism ensures that the additional overhead of ensuring multi-thread safety is incurred only when it is needed. In this manner, the mechanism makes execution of the function more optimal.
摘要翻译：提供了一种用于管理功能的至少两个版本的引用的机制。第一个版本是不能确保多线程安全的单线程版本。第二个版本是一个多线程版本，确保多线程安全。该机制确定一组可执行代码（例如，程序）当前是以单线程模式还是多线程模式执行。如果可执行代码在单线程模式下执行，则该机制将使可执行代码引用该函数的第一个版本。如果可执行代码在多线程模式下执行，则该机制使可执行代码引用该函数的第二个版本。通过这样做，该机制确保仅在需要时才产生确保多线程安全的额外开销。以这种方式，该机制使得该功能的执行更加优化。

18. 发明申请

US20180011696A1 TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR BINARY TRANSLATION SYSTEMS 审中-公开
公开(公告)号：US20180011696A1
公开(公告)日：2018-01-11
申请号：US15202745
申请日：2016-07-06
申请人： Koichi Yamada , Jose A. Baiocchi Paredes , Abhik Sarkar , Ajay Harikumar , Jiwei Lu
发明人： Koichi Yamada , Jose A. Baiocchi Paredes , Abhik Sarkar , Ajay Harikumar , Jiwei Lu
IPC分类号： G06F9/45 , G06F9/445
CPC分类号： G06F8/52 , G06F8/61
摘要： Technologies for binary translation include a computing device that allocates a translation cache shared by all threads associated with a corresponding execution domain. The computing device assigns a thread to an execution domain, translates original binary code of the thread to generate translated binary code, and installs the translated binary code into the corresponding translation cache for execution. The computing device may allocate a global region cache, generate region metadata associated with the original binary code of a thread, and store the region metadata in the global region cache. The original binary code may be translated using the region metadata. The computing device may allocate a global prototype cache, translate the original binary code of a thread to generate prototype code, and install the prototype code in the global prototype cache. The prototype code may be a non-executable version of the translated binary code. Other embodiments are described and claimed.

19. 发明申请

US20150095628A1 TECHNIQUES FOR DETECTING RETURN-ORIENTED PROGRAMMING 审中-公开
标题翻译：用于检测面向方向编程的技术
公开(公告)号：US20150095628A1
公开(公告)日：2015-04-02
申请号：US14129531
申请日：2013-05-23
申请人： Koichi Yamada , Palanivelra Shanmugavelayutham , Arvind Krishnaswamy , Jason M. Agron , Jiwei Lu
发明人： Koichi Yamada , Palanivelra Shanmugavelayutham , Arvind Krishnaswamy , Jason M. Agron , Jiwei Lu
IPC分类号： G06F9/30 , G06F12/08
CPC分类号： G06F9/30058 , G06F12/0875 , G06F21/54 , G06F2212/452
摘要： Various embodiments are generally directed to techniques to detect a return-oriented programming (ROP) attack by verifying target addresses of branch instructions during execution. An apparatus includes a processor component, and a comparison component for execution by the processor component to determine whether there is a matching valid target address for a target address of a branch instruction associated with a translated portion of a routine in a table comprising valid target addresses. Other embodiments are described and claimed.
摘要翻译：各种实施例通常涉及通过在执行期间验证分支指令的目标地址来检测面向返回编程（ROP）攻击的技术。一种装置包括处理器组件和用于由处理器组件执行的比较组件，用于确定是否存在与包括有效目标地址的表中的例程的转换部分相关联的转移指令的目标地址的匹配有效目标地址。描述和要求保护其他实施例。

20. 发明授权

US08627302B2 Sampling based runtime optimizer for efficient debugging of applications 有权
标题翻译：基于采样的运行时优化器，用于应用程序的高效调试
公开(公告)号：US08627302B2
公开(公告)日：2014-01-07
申请号：US11945989
申请日：2007-11-27
申请人： William Y. Chen , Jiwei Lu
发明人： William Y. Chen , Jiwei Lu
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F11/3628 , G06F11/3461 , G06F11/3476 , G06F11/3632 , G06F11/3664 , G06F2201/86 , G06F2201/865
摘要： A method of reproducing runtime environment for debugging an application includes reading an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of events, actions, and a time mark of occurrence for each of the actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file. Further, the method includes running the application, attaching an optimizer, and triggering each of the actions to occur at a time mark of occurrence associated with each of the actions. Then, each of the actions and associated events is analyzed by comparing the events produced by running the application with the events in the optimizer file. If a fault is produced by the triggering, a debugger is invoked to analyze the fault.
摘要翻译：再现用于调试应用的运行时环境的方法包括从非易失性存储介质读取优化器文件。优化程序文件包括运行时环境，应用程序定义信息和日志。日志包括每个操作的事件，操作和发生时间标记的摘要。然后定义用于调试应用程序的运行时环境，并使用优化程序文件中的应用程序定义信息设置应用程序运行时间。此外，该方法包括运行应用程序，附加优化器以及触发在与每个动作相关联的发生的时间标记处发生的每个动作。然后，通过将运行应用程序生成的事件与优化程序文件中的事件进行比较来分析每个操作和关联事件。如果触发产生故障，则调用调试器来分析故障。

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