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11. 发明申请

US20050005759A1 UNIVERSAL TUNER MOUNT 失效
标题翻译：通用调谐器
公开(公告)号：US20050005759A1
公开(公告)日：2005-01-13
申请号：US10604317
申请日：2003-07-10
申请人： James Dulaney , Andrew Nelson , Robert Palmer , Mark Wilson
发明人： James Dulaney , Andrew Nelson , Robert Palmer , Mark Wilson
IPC分类号： G10D9/04 , G10G7/02
CPC分类号： G10G7/02
摘要： A universal mount for acoustically coupling a musical instrument tuner to an instrument has a link connected to the tuner at one end, the link adapted and arranged to have selectable loose and fixed states, with the link including complementary first and second clamping halves joined by a compression element, and a clamp connected to the other end of the link for acoustically coupling the tuner to the musical instrument.
摘要翻译：用于将乐器调谐器声学耦合到仪器的通用安装件具有在一端连接到调谐器的连杆，所述连杆被适配和布置成具有可选择的松散和固定状态，其中所述连杆包括互补的第一和第二夹紧半部压缩元件和连接到连杆的另一端的夹具，用于将调谐器声学耦合到乐器。

12. 发明授权

US5855204A Multi-layer mop 失效
标题翻译：多层拖把
公开(公告)号：US5855204A
公开(公告)日：1999-01-05
申请号：US557129
申请日：1996-06-18
申请人： Ronald Gray , Robert Palmer
发明人： Ronald Gray , Robert Palmer
IPC分类号： A47L1/15 , A47L13/20
CPC分类号： A47L1/15 , A47L13/20
摘要： An apparatus is provided for cleaning a surface �5!, the apparatus including a plurality of water absorbing flexible washing layers �10! positioned and secured in a vertical stack �20!. The bottom layer �30! in the stack �20! has the smallest surface area of the plurality of layers �10!, and each successive layer �10! from the bottom to the top of the stack has a successively larger area. A binding means �80! secures the layers �10! together at a central portion �15!, thus forming an integral assembly in which peripheral portions �18! of the layers �10! can move freely. The layers �10! are constructed of a material formulation of approximately 30% viscose material and 70% synthetic fiber in a density of approximately 400 grams per square meter and a thickness of approximately 2.6 mm. Each layer �10! preferably has a plurality of cuts �40! that define fingers �50! on the peripheral portion �18! of the layers �10!.
摘要翻译： PCT No.PCT / US95 / 07366 Sec。 371日期1996年6月18日 102（e）日期1996年6月18日PCT提交1995年6月8日PCT公布。出版物WO96 / 41564 日期1996年12月27日提供一种用于清洁表面[5]的装置，该装置包括多个定位并固定在垂直叠层中的吸水柔性洗涤层[20]。堆叠[20]中的底层[30]具有多个层[10]的最小表面积，并且从堆叠的底部到顶部的每个连续层[10]具有连续较大的面积。装订装置[80]在中心部分[15]将层[10]固定在一起，从而形成整体组件，其中层[10]的周边部分[18]可以自由移动。层[10]由约30％粘胶材料和70％合成纤维的材料配方构成，密度约为400克/平方米，厚度约为2.6毫米。每个层[10]优选地具有在层[10]的周边部分[18]上限定指状物[50]的多个切口[40]。

13. 发明授权

US08935559B2 System and method for reducing crosstalk in on-chip networks using a contraflow interconnect and offset repeaters 有权
标题翻译：使用反向互连和偏移中继器减少片上网络串扰的系统和方法
公开(公告)号：US08935559B2
公开(公告)日：2015-01-13
申请号：US13360571
申请日：2012-01-27
申请人： John W. Poulton , Robert Palmer , Thomas Hastings Greer, III
发明人： John W. Poulton , Robert Palmer , Thomas Hastings Greer, III
IPC分类号： G06F1/04 , G06F17/50 , H04L25/08
CPC分类号： G06F17/5077 , G06F13/4068 , H04L25/085
摘要： A data connector includes two different sets of wires that transport data between components of a computer system. A first set of wires transports data from a first component to a second component. A second set of wires transports data from the second component to the first component. The first set of wires is interlaced with the second set of wires so that each wire in the data connector transports data in the opposite direction of one or more neighboring wires.
摘要翻译：数据连接器包括在计算机系统的组件之间传送数据的两组不同的导线。第一组导线将数据从第一组件传输到第二组件。第二组线将数据从第二组件传送到第一组件。第一组导线与第二组导线交错，使得数据连接器中的每根导线沿着一个或多个相邻导线的相反方向输送数据。

14. 发明授权

US08689159B1 Redundancy for on-chip interconnect 有权
标题翻译：片上互连冗余
公开(公告)号：US08689159B1
公开(公告)日：2014-04-01
申请号：US13612629
申请日：2012-09-12
申请人： Robert Palmer , John W. Poulton , Thomas Hastings Greer, III , William James Dally
发明人： Robert Palmer , John W. Poulton , Thomas Hastings Greer, III , William James Dally
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： One embodiment sets forth a technique for on-chip satisfying timing requirements of on-chip source-synchronous, CMOS-repeater-based interconnect. Each channel of the on-chip interconnect may include one or more redundant wires. Calibration logic is configured to apply transition patterns to wires comprising each channel and calibration patterns that are generated in response to the transition patterns are captured. Based on the calibration patterns, wires that best satisfy the timing requirements of the on-chip interconnect are selected for use to transmit data. The calibration logic also trims the delays of the clock and selected data wires based on captured calibration patterns to improve the timing margin of the on-chip interconnect. Improving the timing margin of the on-chip interconnect improves chip yields.
摘要翻译：一个实施例提出了片上源同步，基于CMOS中继器的互连的片上满足定时要求的技术。片上互连的每个通道可以包括一个或多个冗余电线。校准逻辑被配置为将转换模式应用于包括每个通道的线和响应于捕获转换模式而生成的校准图案。基于校准模式，选择最能满足片上互连的时序要求的导线用于传输数据。校准逻辑还基于捕获的校准模式修整时钟和所选数据线的延迟，以提高片上互连的时序裕度。提高片上互连的时序裕度提高了芯片产量。

15. 发明授权

US08605094B1 Graphical display of locations 有权
标题翻译：图形显示位置
公开(公告)号：US08605094B1
公开(公告)日：2013-12-10
申请号：US13572962
申请日：2012-08-13
申请人： Anthony Alfaro , Austen Boyd , Robert Palmer
发明人： Anthony Alfaro , Austen Boyd , Robert Palmer
IPC分类号： G06T11/20
CPC分类号： H04W4/023 , G06T11/60 , H04W4/029 , H04W4/21
摘要： Methods, systems, and apparatuses are disclosed which include receiving an indication of a first future date from a user, determining that one or more friends of the user in a social network are associated with one or more future locations including a second future date that matches the first future date, displaying a geographic map including a friend representation corresponding to each of the one or more future locations where the one or more friend of the user are going to be physically present, the friend representation including a number of friends of the user that are physically present at the respective future location on the first future date, receiving, from the user, an indication at one of the friend representations, and displaying a list including at least one of one or more friends associated with the future location and one or more events associated with the future location.
摘要翻译：公开了方法，系统和装置，其包括从用户接收到第一未来日期的指示，确定社交网络中的用户的一个或多个朋友与一个或多个未来位置相关联，包括与之相匹配的第二未来日期第一未来日期，显示包括对应于用户的一个或多个朋友将要实际存在的一个或多个未来位置中的每一个的朋友表示的地理地图，该朋友表示包括该用户的多个朋友其在第一未来日期的物理存在于相应的未来位置，从用户接收在一个朋友表示处的指示，并且显示包括与未来位置相关联的一个或多个朋友中的至少一个的列表，以及一个或更多与未来位置相关联的事件。

16. 发明授权

US08589808B1 Suggestions in a social network 有权
标题翻译：在社交网络中的建议
公开(公告)号：US08589808B1
公开(公告)日：2013-11-19
申请号：US13572934
申请日：2012-08-13
申请人： Anthony Alfaro , Austen Boyd , Robert Palmer
发明人： Anthony Alfaro , Austen Boyd , Robert Palmer
IPC分类号： G06F3/00
CPC分类号： G06F3/04847 , G01S19/14 , G06F3/0481 , G06F3/04883 , G06Q10/10 , G06Q10/109 , G06Q10/1095 , G06Q50/01 , G09B29/007 , H04L12/18 , H04L29/08108 , H04L51/20 , H04L51/32 , H04L67/306 , H04M1/27455
摘要： Methods, systems, and apparatuses are disclosed which include gathering future location information of one or more friends of a user, receiving from a computing device, an indication of a second future date, displaying the future locations that are associated with a first future date that matches the second future date, receiving, at the computing device from the user, a selection of one of the future locations displayed, displaying one or more friends of the user associated with the selected future location, determining that a digital connection does not exist between the first friend and the second friend in a social network, providing an indication on the computing device showing that the digital connection does not exist, receiving an indication from the user to initiate contact between the first friend and the second friend, and providing a first notification to the first friend and the second friend.
摘要翻译：公开了方法，系统和装置，其包括收集用户的一个或多个朋友的未来位置信息，从计算设备接收第二未来日期的指示，显示与第一未来日期相关联的未来位置，与第二未来日期匹配，在来自用户的计算设备处接收显示的未来位置之一的选择，显示与所选择的未来位置相关联的用户的一个或多个朋友，确定在所选择的未来位置之间不存在数字连接在社交网络中的第一个朋友和第二个朋友，在计算设备上提供显示数字连接不存在的指示，从用户接收指示以启动第一个朋友和第二个朋友之间的联系，并提供第一个通知第一个朋友和第二个朋友。

17. 发明申请

US20130198555A1 SYSTEM AND METHOD FOR REDUCING CROSSTALK IN ON-CHIP NETWORKS 有权
标题翻译：用于减少片上网络中的CROSSTALK的系统和方法
公开(公告)号：US20130198555A1
公开(公告)日：2013-08-01
申请号：US13360571
申请日：2012-01-27
申请人： John W. POULTON , Robert Palmer , Thomas Hastings Greer, III
发明人： John W. POULTON , Robert Palmer , Thomas Hastings Greer, III
IPC分类号： G06F13/36 , G06F1/04
CPC分类号： G06F17/5077 , G06F13/4068 , H04L25/085
摘要： A data connector includes two different sets of wires that transport data between components of a computer system. A first set of wires transports data from a first component to a second component. A second set of wires transports data from the second component to the first component. The first set of wires is interlaced with the second set of wires so that each wire in the data connector transports data in the opposite direction of one or more neighboring wires.
摘要翻译：数据连接器包括在计算机系统的组件之间传送数据的两组不同的导线。第一组导线将数据从第一组件传输到第二组件。第二组线将数据从第二组件传送到第一组件。第一组导线与第二组导线交错，使得数据连接器中的每根导线沿着一个或多个相邻导线的相反方向输送数据。

18. 发明申请

US20110023035A1 Command Synchronisation 审中-公开
标题翻译：命令同步
公开(公告)号：US20110023035A1
公开(公告)日：2011-01-27
申请号：US12671632
申请日：2008-07-31
申请人： Robert Palmer
发明人： Robert Palmer
IPC分类号： G06F9/46
CPC分类号： G06F9/52
摘要： The order in which commands issued by a process to one or more hardware processing units should be executed is determined based upon whether the commands are issued to just one hardware processing unit, or to more than one. When the commands are issued to just the one hardware processing unit, the hardware processing unit it allowed to determined their order of execution itself. However, when the commands are issued to more than one hardware processing unit, their order of execution is determined externally to the hardware processing units. This is of particular use in scheduling the execution of commands issued by multi-threaded processes.
摘要翻译：一个进程向一个或多个硬件处理单元发出的命令的执行顺序是根据这些命令是仅发给一个硬件处理单元还是一个以上的硬件处理单元来确定的。当命令只发给一个硬件处理单元时，硬件处理单元就可以自己确定执行顺序。然而，当命令被发布到多个硬件处理单元时，它们的执行顺序在硬件处理单元的外部确定。这在调度由多线程进程发出的命令的执行时特别有用。

19. 发明申请

US20080094109A1 WIDE-RANGE MULTI-PHASE CLOCK GENERATOR 审中-公开
标题翻译：宽范围多相时钟发生器
公开(公告)号：US20080094109A1
公开(公告)日：2008-04-24
申请号：US11963747
申请日：2007-12-21
申请人： Ramin Farjad-rad , John Poulton , John Eble , Thomas Greer , Robert Palmer
发明人： Ramin Farjad-rad , John Poulton , John Eble , Thomas Greer , Robert Palmer
IPC分类号： H03K17/00
CPC分类号： G06F1/06 , G06F1/04 , H03L7/0812 , H03L7/0995 , H03L7/0998
摘要： A wide-range multi-phase clock generator having a first clock generating circuit, a frequency divider circuit, and a plurality of multiplexers. The first clock generating circuit generates a plurality of first clock signals, each having a first frequency and a respective one of a plurality of different phase angles. The frequency divider circuit receives the plurality of first clock signals from the first clock generating circuit, and generates a plurality of second clock signals, each having a second frequency and a respective one of the plurality of different phase angles. The multiplexers each have a first input coupled to receive a respective one of the first clock signals and a second input coupled to receive a respective one of the second clock signals having substantially the same phase angle as the one of the first clock signals.
摘要翻译：一种具有第一时钟发生电路，分频器电路和多个多路复用器的宽范围多相时钟发生器。第一时钟产生电路产生多个第一时钟信号，每个第一时钟信号具有第一频率和多个不同相位角中的相应一个。分频器电路从第一时钟发生电路接收多个第一时钟信号，并产生多个第二时钟信号，每个具有第二频率和多个不同相位角中的相应一个。多路复用器各自具有耦合以接收第一时钟信号中的相应一个的第一输入和耦合以接收具有与第一时钟信号之一基本相同的相位角的第二时钟信号中的相应一个的第二输入。

20. 发明申请

US20070173397A1 Biofuel centrifuge 失效
标题翻译：生物燃料离心机
公开(公告)号：US20070173397A1
公开(公告)日：2007-07-26
申请号：US11636396
申请日：2006-12-08
申请人： Jeffrey Hinman , Robert Palmer
发明人： Jeffrey Hinman , Robert Palmer
IPC分类号： B04B13/00
CPC分类号： B04B13/00 , B04B1/04 , B04B11/02 , B04B11/04 , B04B2013/006
摘要： A centrifuge includes a provision for measuring a physical parameter corresponding to the position of a phase interface inside the centrifuge. The centrifuge is controlled responsive to the inferred position of the phase interface.
摘要翻译：离心机包括用于测量对应于离心机内的相界面的位置的物理参数的设备。响应于相界面的推断位置控制离心机。

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