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    • 11. 发明授权
    • Display device
    • 显示设备
    • US08525953B2
    • 2013-09-03
    • US13497383
    • 2010-06-08
    • Hiromi KatohYasuhiro SugitaKohhei TanakaKaoru YamamotoNaru UsukuraHiroaki Shigeta
    • Hiromi KatohYasuhiro SugitaKohhei TanakaKaoru YamamotoNaru UsukuraHiroaki Shigeta
    • G02F1/133
    • G06F3/0412G06F3/0418G06F3/042G09G3/3406G09G2360/144G09G2360/148
    • A plurality of first and second sensor pixel circuits each sensing light during a designated sensing period and retaining the amount of sensed light otherwise are arranged in a pixel region. A backlight is turned on once for a predetermined time in one-frame period. A sensing period when the backlight is turned on and a sensing period when the backlight is turned off are set once, respectively, in the one-frame period. The first sensor pixel circuit is reset. The second sensor pixel circuit is reset. Read from sensor pixel circuits of two types is performed in parallel in a line sequential manner during a period other than the periods and. A difference circuit provided outside of the sensor pixel circuits is used for obtaining a difference between an amount of light when the backlight is turned on and an amount of light when the backlight is turned off.
    • 多个第一和第二传感器像素电路在指定的检测周期期间感测光并保持感测光的量,否则布置在像素区域中。 背光源在一帧周期内打开一段预定时间。 在一帧期间分别设定背光源开启的感测期间和背光源关闭时的感测期间一次。 第一传感器像素电路被复位。 第二传感器像素电路被复位。 从周期和周期以外的期间以线顺序的方式并行地进行两种类型的传感器像素电路的读取。 设置在传感器像素电路外部的差分电路用于获得当背光打开时的光量与背光被关闭时的光量之间的差。
    • 12. 发明授权
    • Display device
    • 显示设备
    • US09335854B2
    • 2016-05-10
    • US13497354
    • 2010-06-08
    • Yasuhiro SugitaKohhei TanakaKaoru YamamotoHiromi Katoh
    • Yasuhiro SugitaKohhei TanakaKaoru YamamotoHiromi Katoh
    • G06F3/038G09G5/00G06F3/041G09G3/34G06F3/042
    • G06F3/0412G06F3/0416G06F3/042G09G3/3406G09G2360/144G09G2360/148
    • A plurality of first sensor pixel circuits each sensing light during a sensing period when a backlight is turned on and retaining the amount of sensed light otherwise in accordance with a clock signal and a plurality of second sensor pixel circuits each sensing light during a sensing period when the backlight is turned off and retaining the amount of sensed light otherwise in accordance with a clock signal are arranged in a pixel region. The sensor pixel circuits of two types are connected to different output lines, so that a difference between two output signals is obtained at the outside of the sensor pixel circuit. The sensor pixel circuits described above are used for detecting a difference between an amount of light to be incident when the backlight is turned on and an amount of light to be incident when the backlight is turned off.
    • 多个第一传感器像素电路,每个在感测时段期间感测光,当背光被接通时,并且在感测时段期间根据时钟信号和多个第二传感器像素电路保持感测光的量,否则每个感测光都感测到光 背光源被关闭,并且保持根据时钟信号的感测光量保持在像素区域中。 两种类型的传感器像素电路连接到不同的输出线,从而在传感器像素电路的外部获得两个输出信号之间的差异。 上述传感器像素电路用于检测当背光被接通时要入射的光量与当背光被关闭时入射的光量之间的差异。
    • 13. 发明申请
    • Display Device
    • 显示设备
    • US20120262424A1
    • 2012-10-18
    • US13497268
    • 2010-06-08
    • Kohhei TanakaYasuhiro SugitaKaoru YamamotoChristopher Brown
    • Kohhei TanakaYasuhiro SugitaKaoru YamamotoChristopher Brown
    • G06F3/042
    • G06F3/0412G06F3/042G09G3/34G09G3/3406G09G2300/08G09G2310/0237G09G2360/144G09G2360/145
    • A plurality of sensor pixel circuits each including two photodiodes, one accumulation node accumulating charge corresponding to an amount of light, and a read transistor having a control terminal connected to the accumulation node are arranged in a pixel region. In accordance with a clock signal, when a backlight is turned on, a transistor turns on, a current flows through the photodiode, and a potential at the accumulation node drops. When the backlight is turned off, a transistor turns on, a current flows through the photodiode, and the potential at the accumulation node rises. Sensitivity characteristics of the two photodiodes may be changed using the clock signal. The sensor pixel circuit described above is used for detecting a difference between an amount of light to be incident when the backlight is turned on and an amount of light to be incident when the backlight is turned off.
    • 每个包括两个光电二极管的多个传感器像素电路,一个累积节点累积对应于光量的电荷,以及具有连接到累积节点的控制端子的读出晶体管被布置在像素区域中。 根据时钟信号,当背光源导通时,晶体管导通,电流流过光电二极管,并且累积节点处的电位下降。 当背光被关闭时,晶体管导通,电流流过光电二极管,并且累积节点的电位上升。 可以使用时钟信号来改变两个光电二极管的灵敏度特性。 上述传感器像素电路用于检测当背光被接通时要入射的光量与当背光被关闭时入射的光量之间的差异。
    • 16. 发明申请
    • Display Device
    • 显示设备
    • US20120176355A1
    • 2012-07-12
    • US13497354
    • 2010-06-08
    • Yasuhiro SugitaKohhei TanakaKaoru YamamotoHiromi Katoh
    • Yasuhiro SugitaKohhei TanakaKaoru YamamotoHiromi Katoh
    • G09G5/00
    • G06F3/0412G06F3/0416G06F3/042G09G3/3406G09G2360/144G09G2360/148
    • A plurality of first sensor pixel circuits each sensing light during a sensing period when a backlight is turned on and retaining the amount of sensed light otherwise in accordance with a clock signal and a plurality of second sensor pixel circuits each sensing light during a sensing period when the backlight is turned off and retaining the amount of sensed light otherwise in accordance with a clock signal are arranged in a pixel region. The sensor pixel circuits of two types are connected to different output lines, so that a difference between two output signals is obtained at the outside of the sensor pixel circuit. The sensor pixel circuits described above are used for detecting a difference between an amount of light to be incident when the backlight is turned on and an amount of light to be incident when the backlight is turned off.
    • 多个第一传感器像素电路,每个在感测时段期间感测光,当背光被接通时,并且在感测时段期间根据时钟信号和多个第二传感器像素电路保持感测光的量,否则每个感测光都感测到光 背光源被关闭,并且保持根据时钟信号的感测光量保持在像素区域中。 两种类型的传感器像素电路连接到不同的输出线,从而在传感器像素电路的外部获得两个输出信号之间的差异。 上述传感器像素电路用于检测当背光被接通时要入射的光量与当背光被关闭时入射的光量之间的差异。
    • 17. 发明申请
    • SHIFT REGISTER AND DISPLAY DEVICE HAVING THE SAME
    • 移位寄存器和具有该寄存器的显示器件
    • US20130100007A1
    • 2013-04-25
    • US13805769
    • 2011-04-04
    • Kaoru YamamotoYasuyuki Ogawa
    • Kaoru YamamotoYasuyuki Ogawa
    • G11C19/28G09G3/36
    • G11C19/28G09G3/36G09G3/3677G09G2310/0286G11C19/184
    • A shift register 10 is configured such that m unit circuits 11 each including a shift unit 12 and three buffer units 13r, 13g, and 13b are in a multi-stage cascade connection and that 3m signals in total including three signals from each stage are outputted. The m shift units 12 perform a shift operation, and a first signal Y is outputted from each stage. When a clock signal CK is at a high level, the first signal Y rises higher than a normal high level due to bootstrapping. The buffer unit 13r controls an output signal YR to be at a high level based on the buffer control signal CR and the first signal Y. A buffer control circuit 7 controls buffer control signals CR, CG, and CB to be at a high level for a time period shorter than a half cycle of the clock signal. With this, a shift register with a reduced circuit amount and low power consumption is provided.
    • 移位寄存器10被配置为使得包括移位单元12和三个缓冲单元13r,13g和13b的m个单元电路11处于多级级联连接,并且总共包括来自每个级的三个信号的3m信号 。 m移位单元12执行移位操作,并且从每个级输出第一信号Y. 当时钟信号CK处于高电平时,由于引导,第一信号Y比正常高电平上升。 缓冲器单元13r基于缓冲器控制信号CR和第一信号Y将输出信号YR控制在高电平。缓冲器控制电路7将缓冲器控制信号CR,CG和CB控制在高电平,以便 比时钟信号的半周期短的时间段。 由此,提供了具有降低的电路量和低功耗的移位寄存器。
    • 18. 发明授权
    • Shift register and display device having the same
    • 移位寄存器和具有相同功能的显示设备
    • US09330782B2
    • 2016-05-03
    • US13805769
    • 2011-04-04
    • Kaoru YamamotoYasuyuki Ogawa
    • Kaoru YamamotoYasuyuki Ogawa
    • G11C19/18G11C19/28G09G3/36
    • G11C19/28G09G3/36G09G3/3677G09G2310/0286G11C19/184
    • A shift register 10 is configured such that m unit circuits 11 each including a shift unit 12 and three buffer units 13r, 13g, and 13b are in a multi-stage cascade connection and that 3m signals in total including three signals from each stage are outputted. The m shift units 12 perform a shift operation, and a first signal Y is outputted from each stage. When a clock signal CK is at a high level, the first signal Y rises higher than a normal high level due to bootstrapping. The buffer unit 13r controls an output signal YR to be at a high level based on the buffer control signal CR and the first signal Y. A buffer control circuit 7 controls buffer control signals CR, CG, and CB to be at a high level for a time period shorter than a half cycle of the clock signal. With this, a shift register with a reduced circuit amount and low power consumption is provided.
    • 移位寄存器10被配置为使得包括移位单元12和三个缓冲单元13r,13g和13b的m个单元电路11处于多级级联连接,并且总共包括来自每个级的三个信号的3m信号 。 m移位单元12执行移位操作,并且从每个级输出第一信号Y. 当时钟信号CK处于高电平时,由于引导,第一信号Y比正常高电平上升。 缓冲器单元13r基于缓冲器控制信号CR和第一信号Y将输出信号YR控制在高电平。缓冲器控制电路7将缓冲器控制信号CR,CG和CB控制在高电平,以便 比时钟信号的半周期短的时间段。 由此,提供了具有降低的电路量和低功耗的移位寄存器。
    • 19. 发明申请
    • DISPLAY DEVICE AND DRIVE METHOD FOR SAME
    • 显示装置和驱动方法
    • US20130113768A1
    • 2013-05-09
    • US13810823
    • 2011-07-26
    • Kaoru YamamotoYasuhiro SugitaKohei Tanaka
    • Kaoru YamamotoYasuhiro SugitaKohei Tanaka
    • G09G5/00
    • G09G5/003G02F1/13338G02F2001/13312G06F3/0412G06F3/0416G06F3/042
    • Disclosed is a display device having an optical sensor with increased sensitivity. The display device is provided with: a display panel that includes a plurality of display pixel circuits (8) and a plurality of sensor pixel circuits (9a) in a display region (4); and a driver circuit (7) that supplies a driving signal to the sensor pixel circuits (9a). The sensor pixel circuits (9a) are each provided with: a light receiving element (PD1); a storage node (INT) that retains electrical charges corresponding to the light amount that entered the light receiving element (PD1); and a read-out switching element (M1) connected to the storage node (INT). The display device is further provided with a first switching element (T1) that is connected between the light receiving element (PD1) and the storage node (INT) and that operates in a saturation region, and a second switching element (T2) that resets the storage node (INT).
    • 公开了具有灵敏度增加的光学传感器的显示装置。 显示装置具有:在显示区域(4)中包括多个显示像素电路(8)和多个传感器像素电路(9a)的显示面板; 以及将驱动信号提供给传感器像素电路(9a)的驱动电路(7)。 传感器像素电路(9a)各自设置有:光接收元件(PD1); 存储节点(INT),其保持与进入所述光接收元件(PD1)的光量相对应的电荷; 以及连接到存储节点(INT)的读出开关元件(M1)。 显示装置还具备连接在光接收元件(PD1)和存储节点(INT)之间并在饱和区域中工作的第一开关元件(T1)和复位的第二开关元件(T2) 存储节点(INT)。