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    • 12. 发明授权
    • Apparatus for searching TCP and UDP sockets
    • 用于搜索TCP和UDP套接字的设备
    • US07751346B2
    • 2010-07-06
    • US11605801
    • 2006-11-29
    • Chan-Ho ParkSeong-Woon KimMyung-Joon Kim
    • Chan-Ho ParkSeong-Woon KimMyung-Joon Kim
    • H04L12/28
    • H04L69/16H04L69/12H04L69/161H04L69/162
    • An apparatus for searching a socket ID of a received packet in a transmission control protocol (TCP) and a user datagram protocol (UDP) is provided. The apparatus includes: a master module, a branch table module and a tree table module. The master module analyzes command information from a processor, transfers commands to the branch table module and to the tree table module, receives results from the branch table module and from the tree table module, and reports the received results to the processor. The branch table module receives commands from the master module and manages a branch table by using only the lower 10 bits of a simple internet protocol (IP) address of the commands. The tree table module is coupled to the master module and to the branch table module, in which the tree table module manages a binary tree.
    • 提供了一种用于在传输控制协议(TCP)和用户数据报协议(UDP)中搜索接收到的分组的套接字ID的装置。 该装置包括:主模块,分支表模块和树形表模块。 主模块从处理器分析命令信息,将命令传送到分支表模块和树形表模块,从分支表模块和树形表模块接收结果,并将接收到的结果报告给处理器。 分支表模块从主模块接收命令,并通过仅使用命令的简单互联网协议(IP)地址的低10位来管理分支表。 树表模块耦合到主模块和分支表模块,树模块管理二叉树。
    • 13. 发明申请
    • WRAPPER CIRCUIT FOR GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS SYSTEM AND METHOD FOR OPERATING THE SAME
    • 用于全球异地同步同步系统的封装电路及其操作方法
    • US20090150706A1
    • 2009-06-11
    • US12186114
    • 2008-08-05
    • Myeong-Hoon OHSeong-Woon KimMyung-Joon KimSung-Nam Kim
    • Myeong-Hoon OHSeong-Woon KimMyung-Joon KimSung-Nam Kim
    • G06F1/12H04L7/00
    • G06F1/08G06F1/3203
    • Provided are a high-performance wrapper circuit for a globally asynchronous locally synchronous (GALS) system and a synchronization method using the same, which are capable of solving a synchronization problem caused when data are transmitted between locally synchronous modules employing different clocks, and a method for operating the wrapper circuit. The GALS system includes a clock generator for supplying an operation clock to a locally synchronous module, a sender port for transmitting data to the outside according to a data transmission request signal output from the locally synchronous module, and generating a first clock stop signal for stopping an operation of the clock generator, and a receiver port for receiving data from the outside, and generating a second clock stop signal for stopping the operation of the clock generator. The sender port generates the first clock stop signal to the clock generator when a next data transmission request signal is received before completing a data transmission performed by a previous data transmission request signal output from the locally synchronous module.
    • 提供了一种用于全球异步本地同步(GALS)系统的高性能封装电路和使用该高性能封装电路的同步方法,其能够解决当采用不同时钟的本地同步模块之间传输数据时引起的同步问题,以及方法 用于操作包装电路。 GALS系统包括用于向本地同步模块提供操作时钟的时钟发生器,用于根据从本地同步模块输出的数据发送请求信号向外部发送数据的发送器端口,以及生成用于停止的第一时钟停止信号 时钟发生器的操作和用于从外部接收数据的接收器端口,以及产生用于停止时钟发生器的操作的第二时钟停止信号。 当在完成由本地同步模块输出的先前数据传输请求信号执行的数据传输之前接收到下一个数据传输请求信号时,发送器端口产生到时钟发生器的第一个时钟停止信号。
    • 14. 发明申请
    • System and method for processing integrated queries against input data stream and data stored in database using trigger
    • 使用触发器对输入数据流和存储在数据库中的数据进行集成查询的系统和方法
    • US20070136254A1
    • 2007-06-14
    • US11594641
    • 2006-11-08
    • Hyun-Hwa ChoiMi-Young LeeMyung-Cheol LeeMyung-Joon Kim
    • Hyun-Hwa ChoiMi-Young LeeMyung-Cheol LeeMyung-Joon Kim
    • G06F17/30G06F7/00
    • G06F16/24568G06F16/80
    • Provided are a system and a method for processing integrated queries against an input data stream and data stored in a database using trigger. The system for processing an integrated query against an input data stream and data stored in a database using a trigger, including: a data stream manager for managing a continuously inputted data stream; a trigger result manager for registering a trigger in a database which interworks with the trigger result manager and forming a set of results that are obtained by executing the registered trigger to thereby provide the set of results in real time; and an executer for processing an integrated query against the data stream from the data stream manager and data stored in the database, wherein the integrated query is processed by referring to the set of results from the trigger result manager for the data stored in the database.
    • 提供了一种用于使用触发器来处理针对输入数据流的集成查询和存储在数据库中的数据的系统和方法。 用于使用触发来处理针对输入数据流的综合查询和存储在数据库中的数据的系统,包括:用于管理连续输入的数据流的数据流管理器; 触发结果管理器,用于在与触发结果管理器进行交互的数据库中注册触发器,并形成通过执行注册的触发而获得的一组结果,从而实时提供该组结果; 以及执行器,用于处理来自数据流管理器的数据流的综合查询和存储在数据库中的数据,其中通过参考存储在数据库中的数据的触发结果管理器的结果集来处理集成查询。
    • 16. 发明授权
    • System for controlling data transfer protocol with a host bus interface
    • 用于通过主机总线接口控制数据传输协议的系统
    • US06871237B2
    • 2005-03-22
    • US10418127
    • 2003-04-18
    • Jong Seok HanYong Seok ChoiSang Man MohMyung-Joon KimKee-Wook Rim
    • Jong Seok HanYong Seok ChoiSang Man MohMyung-Joon KimKee-Wook Rim
    • G06F13/00G06F13/14G06F13/28
    • G06F13/28
    • The present invention is a data transfer protocol control system with a host bus interface that includes a transmitting/receiving command DMA, a transmitting data DMA and a receiving data DMA for controlling data transfer protocol with a host bus interface considering characteristic, usage frequency, simultaneous processing functions of the command DMA and the data DMAs. A host interface bus is efficiently used and bus usage ratio is distributed properly to support transfer flow properly and improve the entire system performance. The data transfer protocol control system with a host bus interface includes a transmitting/receiving command DMA for instructing the command DMA request buffer to read and write command message data, a transmitting data DMA for instructing the transmitting data DMA request buffer to read the command message data, a receiving data DMA for instructing the receiving data DMA request buffer to write the command message data and a data transfer protocol control device for putting read information, write information and message data on a host bus, receiving message data and a transfer response signal and delivering the message data through the response buffer of the corresponding DMA.
    • 本发明是一种具有主机总线接口的数据传输协议控制系统,其包括发送/接收命令DMA,发送数据DMA和用于通过主机总线接口控制数据传输协议的接收数据DMA,考虑特性,使用频率,同时 命令DMA和数据DMA的处理功能。 主机接口总线被有效地使用,总线使用率正确分配,以适当地支持传输流程,并提高整个系统性能。 具有主机总线接口的数据传输协议控制系统包括用于指令DMA请求缓冲器读取和写入命令消息数据的发送/接收命令DMA,用于指示发送数据DMA请求缓冲器读取命令消息的发送数据DMA 数据,用于指示接收数据DMA请求缓冲器写入命令消息数据的接收数据DMA和用于将读信息,写信息和消息数据放在主机总线上的数据传输协议控制装置,接收消息数据和传送响应信号 并通过相应DMA的响应缓冲区传送消息数据。
    • 18. 发明授权
    • PCI express packet filter including descrambler
    • PCI express包过滤器包括解扰器
    • US07957294B2
    • 2011-06-07
    • US11633046
    • 2006-12-01
    • Yong-Seok ChoiSeong-Woon KimMyung-Joon Kim
    • Yong-Seok ChoiSeong-Woon KimMyung-Joon Kim
    • H04L12/26H04J3/16G06F13/12G06F13/20H04L29/06
    • H04L69/12H04L69/323H04L69/324
    • A packet detecting device used in a receiver employing PCI Express protocol is disclosed. The packet detecting device includes: a physical layer packet detecting unit for detecting a physical layer packet from a PCI express packet received and parallelized to 16 bit data through a physical deserializer; a descrambling unit for descrambling a physical layer packet from a PCI express packet received and parallelized to 16 bit data through a physical deserializer; a data link layer packet detecting unit for detecting a data link layer packet from a descrambled packet outputted from the descrambling unit; and a transaction layer packet detecting unit for detecting a transaction layer packet from a descrambled packet outputted from the descrambling unit.
    • 公开了一种在采用PCI Express协议的接收机中使用的分组检测装置。 分组检测装置包括:物理层分组检测单元,用于通过物理解串器从接收并并行化到16位数据的PCI express分组中检测物理层分组; 解扰单元,用于通过物理解串器将来自PCI express分组的物理层分组解扰并接收并并行化为16位数据; 数据链路层分组检测单元,用于从解扰单元输出的解扰分组中检测数据链路层分组; 以及事务层分组检测单元,用于从解扰单元输出的解扰分组中检测事务层分组。