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11. 发明专利

JP2011071533A Method of manufacturing multilayer printed circuit board 有权
标题翻译：制造多层印刷电路板的方法
公开(公告)号：JP2011071533A
公开(公告)日：2011-04-07
申请号：JP2010251951
申请日：2010-11-10
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： MOK JEE SOO , YOO JE GWANG , RYU CHANG SUP
IPC分类号： H01R12/50 , H05K3/46 , B23K26/00 , B23K26/36 , H05K3/00
CPC分类号： H05K3/4007 , H01R12/523 , H05K3/0017 , H05K3/207 , H05K3/4644 , H05K2201/0355 , H05K2201/0367 , H05K2201/09481 , H05K2201/096 , H05K2203/016 , H05K2203/1536
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed circuit board and its manufacturing method, which allow the thickness of multilayer printed circuit board to be decreased, its manufacturing steps to be reduced, and productive efficiency to be increased. SOLUTION: This multilayer printed circuit board includes: a buildup layer (108) including many circuit layers and many insulating layers; an insulating resin layer (101) formed in the outermost layer of the circuit layers of one surface of the buildup layer (108) printed with bumps; and a solder resist layer (112) formed in the outermost layer on the other surface of the buildup layer (108). In the multilayer printed circuit board, the buildup layer (108) on the other surface of the insulating resin layer (101) printed with the bumps on one surface, and the solder resist layer (112) are laminated in order. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种能够降低多层印刷电路板的厚度的多层印刷电路板及其制造方法，其制造步骤将被降低，并且提高生产效率。解决方案：该多层印刷电路板包括：包括许多电路层和许多绝缘层的堆积层（108）; 绝缘树脂层（101），其形成在印刷有凸块的积层（108）的一个表面的电路层的最外层中; 以及形成在所述积层（108）的另一表面上的最外层中的阻焊层（112）。在多层印刷电路板中，在一个表面上印刷有凸块的绝缘树脂层（101）的另一个表面上的积聚层（108）和阻焊层（112）依次层叠。版权所有（C）2011，JPO＆INPIT

12. 发明专利

JP2011061179A Printed circuit board and method for manufacturing the same 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：JP2011061179A
公开(公告)日：2011-03-24
申请号：JP2009288083
申请日：2009-12-18
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： KANG MYUNG SAM , RYU CHANG SUP
IPC分类号： H05K3/24
CPC分类号： C25D5/022 , C25D7/12 , H05K3/0035 , H05K3/242 , H05K3/243 , H05K3/3473 , H05K3/4007 , H05K3/42 , H05K2201/0367 , H05K2201/09481 , H05K2203/054 , H05K2203/0577 , H05K2203/1581
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board and a method for manufacturing the same.
SOLUTION: This printed circuit board may include a substrate portion including an electrode portion formed on the surface, a solder resist layer formed on the surface of the substrate portion and having an opening formed so that the electrode portion is exposed to the outside, and a bump layer formed to have the same diameter as that the diameter of the opening and used to electrically couple an external chip component.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种印刷电路板及其制造方法。解决方案：该印刷电路板可以包括基板部分，该基板部分包括形成在该表面上的电极部分，阻焊层形成在该基板部分的表面上并且具有形成为使得电极部分暴露于外部的开口以及形成为具有与开口的直径相同的直径并用于电耦合外部芯片部件的凸块层。版权所有（C）2011，JPO＆INPIT

13. 发明专利

JP2011029585A Semiconductor package and method of manufacturing the same 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：JP2011029585A
公开(公告)日：2011-02-10
申请号：JP2009277816
申请日：2009-12-07
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： AHN JIN YONG , RYU CHANG SUP
IPC分类号： H01L23/12 , H01L25/00 , H05K3/00 , H05K3/46
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L23/367 , H01L23/3675 , H01L23/49816 , H01L23/50 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/24195 , H01L2224/32245 , H01L2224/73267 , H01L2224/9222 , H01L2924/01029 , H01L2924/15311 , H01L2924/18162 , H01L2924/19042 , H01L2924/19043
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor package which can be thinned and suppress bending in a manufacturing process, and a method of manufacturing the same. SOLUTION: A semiconductor package 100 can comprise an insulator 120 having first and second opening portions 121, 122; an active element 140 disposed inside the first opening portion 121; a passive element 130 disposed inside the second opening portion 122; a protection member 110 which is disposed in a lower part of the insulator 120 and covers a lower part of the passive element 130; a build-up layer 150 disposed on the insulator 120 and electrically connected with the active element 140, and an external connection means 180 electrically connected with the build-up layer 150. A heat dissipation member 300 can be attached to a lower surface of the active element 140. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种可以在制造过程中变薄并抑制弯曲的半导体封装及其制造方法。解决方案：半导体封装100可以包括具有第一和第二开口部分121,122的绝缘体120; 设置在第一开口部121内的有源元件140; 设置在第二开口部分122内的无源元件130; 保护构件110，其设置在绝缘体120的下部并覆盖无源元件130的下部; 设置在绝缘体120上并与有源元件140电连接的积聚层150以及与积聚层150电连接的外部连接装置180.散热构件300可以附接到活跃元素140.版权所有（C）2011，JPO＆INPIT

14. 发明专利

JP2014036224A Flat dam and chip packaging method using the same 审中-公开
标题翻译：平板和芯片包装方法
公开(公告)号：JP2014036224A
公开(公告)日：2014-02-24
申请号：JP2013086160
申请日：2013-04-16
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： LEE CHANG BO , RYU CHANG SUP , KO YOUNG GWAN , CHOI CHOL-HO
IPC分类号： H05K3/28 , H01L21/60 , H01L23/12 , H01L23/29 , H01L23/31
CPC分类号： H01L24/03 , H01L21/4846 , H01L21/563 , H01L23/24 , H01L23/49816 , H01L23/49894 , H01L24/05 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/131 , H01L2224/16237 , H01L2224/16238 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2224/83104 , H01L2224/83855 , H01L2924/10253 , H01L2924/00 , H01L2924/00014 , H01L2924/014
摘要： PROBLEM TO BE SOLVED: To provide a flat dam and a chip packaging method using the same which are capable of easily preventing the overflow of an underfill and improving the warpage resistance in a chip package.SOLUTION: A flat dam 140 is formed in a package region of an insulation layer provided on a board 100 to limit movement of an underfill 210.
摘要翻译：要解决的问题：提供一种能够容易地防止底部填充物溢出并提高芯片封装中的翘曲阻力的扁平坝和芯片封装方法。解决方案：平坦坝140形成在封装设置在板100上以限制底部填充物210的移动的绝缘层的区域。

15. 发明专利

JP2014033169A Manufacturing method of printed circuit board 审中-公开
标题翻译：印刷电路板的制造方法
公开(公告)号：JP2014033169A
公开(公告)日：2014-02-20
申请号：JP2012206324
申请日：2012-09-19
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： LEE CHANG BO , KIM DOHWAN , CHOI CHOL-HO , RYU CHANG SUP
IPC分类号： H05K3/28 , H05K3/24 , H05K3/34
CPC分类号： H05K3/18 , H01L23/13 , H01L2924/0002 , H05K3/0073 , H05K3/243 , H05K3/28 , H05K3/282 , H05K3/3452 , H05K2201/09845 , H05K2201/099 , H05K2203/107 , H05K2203/1476 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board for a PoP (Package on Package) on which a semiconductor element is easily mounted.SOLUTION: A manufacturing method of a printed circuit board comprises: a step of forming a step opening at a first surface processing area side where a circuit layer 120 of a first surface processing area is exposed by applying an exposure and development step to a first opening of the first surface processing area side; a step of forming a first surface processing layer 150 on the exposed circuit layer 120 of the first surface processing area; a step of forming a second opening 134 at a second surface processing area side by applying laser processing to a first opening 132 at a second surface processing area side to expose a circuit layer 120 of the second surface processing area; and a step of forming a second surface processing layer 160 on the exposed circuit layer 120 of the second surface processing area. A solder resist layer 130 is formed in a stepped shape corresponding to the step opening at the first surface processing area side.
摘要翻译：要解决的问题：提供一种用于容易安装半导体元件的PoP（封装封装）印刷电路板。解决方案：印刷电路板的制造方法包括：在第一个步骤中形成台阶开口的步骤通过对第一表面处理区域侧的第一开口施加曝光和显影步骤来暴露第一表面处理区域的电路层120的表面处理区域侧; 在第一表面处理区域的暴露电路层120上形成第一表面处理层150的步骤; 通过对第二表面处理区域侧的第一开口132进行激光加工，在第二表面处理区域侧形成第二开口部134的工序，露出第二表面处理区域的电路层120; 以及在第二表面处理区域的暴露电路层120上形成第二表面处理层160的步骤。阻焊层130形成为与第一表面处理区域侧的台阶开口相对应的阶梯形状。

16. 发明专利

JP2014010451A Exposure equipment and exposure method 审中-公开
标题翻译：曝光设备和曝光方法
公开(公告)号：JP2014010451A
公开(公告)日：2014-01-20
申请号：JP2013125992
申请日：2013-06-14
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： LEE CHANG BO , CHOI CHEOL HO , RYU CHANG SUP
IPC分类号： G03F9/00 , G01B11/00 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To provide exposure equipment and an exposure method capable of high reliability arrangement between a substrate and a mask.SOLUTION: The exposure equipment comprises: an input part 110 of acquiring image data to the arrangement mark of a substrate; a design data storage part 150 stored with design data to the exposure position of the substrate; a coordinate data generation part 120 of generating coordinate data equivalent to the position of the arrangement mark using the image data acquired by the input part 110; a virtual division part 130 of forming the virtual region of the substrate using the coordinate data of the coordinate data generation part 120 and dividing the virtual region with a diagonal line to form respective divided virtual regions; a linear correction part 140 of performing linear correction to the virtual regions respectively divided by the virtual division part to generate linear data; an exposure data generation part 160 of generating exposure data as exposure position change value using the linear data of the linear correction part 140 and the design part of the storage part 150; and an exposure part 170 of performing exposure using the design data and the exposure data.
摘要翻译：要解决的问题：提供能够在基板和掩模之间具有高可靠性布置的曝光设备和曝光方法。解决方案：曝光设备包括：将图像数据采集到基板的布置标记的输入部分110; 将设计数据存储到基板的曝光位置的设计数据存储部分150; 使用由输入部110获取的图像数据生成与布置标记的位置相当的坐标数据的坐标数据生成部120; 使用坐标数据生成部120的坐标数据形成基板的虚拟区域并用对角线分割虚拟区域的虚拟分割部130，形成分割的虚拟区域; 对由虚拟分割部分分割的虚拟区域进行线性校正的线性校正部140，生成线性数据; 使用线性校正部140的线性数据和存储部150的设计部分，生成曝光数据作为曝光位置变化值的曝光数据生成部160; 以及使用设计数据和曝光数据进行曝光的曝光部170。

17. 发明专利

JP2012235176A Multilayer printed-circuit board and method of manufacturing the same 有权
标题翻译：多层印刷电路板及其制造方法
公开(公告)号：JP2012235176A
公开(公告)日：2012-11-29
申请号：JP2012196160
申请日：2012-09-06
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： MOK JEE SOO , YOO JE GWANG , RYU CHANG SUP
IPC分类号： H05K3/46
CPC分类号： H05K3/1258 , H01L2224/11 , H05K3/4069 , H05K3/4602 , H05K2201/0394 , H05K2201/09481 , H05K2201/09545 , H05K2201/096 , H05K2203/0568 , H05K2203/1152 , Y10T29/49156
摘要： PROBLEM TO BE SOLVED: To eliminate the need for a separate PSR process because a deflection of a board is prevented during and after manufacturing of the board and a support prevents the deflection of the board and has a function of a solder resist layer.SOLUTION: In a manufacturing method, a circuit pattern (56) is formed on a double-sided or single-sided copper-clad laminate, a build-up layer (57) is laminated on its top, and then a solder resist layer (58) is formed on an upper surface of the build-up layer (57). Thus, an insulating resin layer (50), having a via hole (54), comprising a first circuit layer including the circuit pattern (56), which is formed on one side, and a second circuit layer including a connecting pad for mounting a solder ball projecting over the via hole (54), which is formed on the other side, the build-up layer (57) including a number of insulating layers and circuit layers formed on the first circuit layer and the solder resist layer (58) formed on the outermost layer of the build-up layer (57) are included.
摘要翻译：要解决的问题：为了消除对单独的PSR处理的需要，因为在板的制造期间和之后防止了板的偏转，并且支撑件防止板的偏转并且具有阻焊层的功能。解决方案：在制造方法中，在双面或单面覆铜层压板上形成电路图案（56），在其顶部层叠积层（57），然后将焊料抗蚀剂层（58）形成在积层（57）的上表面上。因此，具有通孔（54）的绝缘树脂层（50）包括形成在一侧的包括电路图案（56）的第一电路层和包括用于安装在另一侧形成的通孔（54）上的焊球，包括形成在第一电路层和阻焊层（58）上的多个绝缘层和电路层的堆积层（57）形成在积层层（57）的最外层上。版权所有（C）2013，JPO＆INPIT

18. 发明专利

JP2012080144A Manufacturing method for semiconductor package 有权
标题翻译：半导体封装的制造方法
公开(公告)号：JP2012080144A
公开(公告)日：2012-04-19
申请号：JP2012015077
申请日：2012-01-27
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： AHN JIN YONG , RYU CHANG SUP
IPC分类号： H01L23/12 , H01L25/04 , H01L25/18
CPC分类号： H01L23/3128 , H01L21/568 , H01L21/6835 , H01L23/367 , H01L23/3675 , H01L23/49816 , H01L23/50 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/24195 , H01L2224/32245 , H01L2224/73267 , H01L2224/9222 , H01L2924/01029 , H01L2924/15311 , H01L2924/18162 , H01L2924/19042 , H01L2924/19043
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor package which can be thinned and whose warp can be suppressed in a manufacturing process.SOLUTION: A manufacturing method for a semiconductor package comprises: a step of stacking an insulator 120 on a carrier substrate; a step of forming a semiconductor package 100 including a build-up layer 150 electrically connected to an active element 140 and a passive element 130 provided for the carrier substrate; a step of forming a protective member 110 below the semiconductor package 100 by separating the semiconductor package 100 from the carrier substrate; and a step of forming external connection means 180 on the semiconductor package 100. The step of forming the protective member 110 below the semiconductor package 100 by separating the semiconductor package 100 from the carrier substrate includes a step of removing an adhesive layer disposed on a bottom surface of the semiconductor package 100 by separating from a release layer and a step of forming the protective member on the bottom surface of the semiconductor package 100.
摘要翻译：解决的问题：提供一种半导体封装的制造方法，该制造方法可以在制造过程中变薄并且可以抑制其翘曲。解决方案：半导体封装的制造方法包括：将绝缘体120堆叠在载体基板上的步骤; 形成半导体封装100的步骤，该半导体封装100包括电连接到有源元件140的积聚层150和为载体衬底提供的无源元件130; 通过将半导体封装100与载体衬底分离来在半导体封装100的下方形成保护构件110的步骤; 以及在半导体封装100上形成外部连接装置180的步骤。通过将半导体封装100与载体衬底分离来在半导体封装100的下方形成保护构件110的步骤包括去除设置在底部上的粘合剂层的步骤半导体封装100的表面通过从剥离层分离和在半导体封装100的底表面上形成保护构件的步骤。版权所有（C）2012，JPO＆INPIT

19. 发明专利

JP2011035367A Printed circuit board and electronic product 审中-公开
标题翻译：印刷电路板和电子产品
公开(公告)号：JP2011035367A
公开(公告)日：2011-02-17
申请号：JP2009295654
申请日：2009-12-25
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： KIM HAN , RYU CHANG SUP
IPC分类号： H05K9/00 , H05K1/14 , H05K3/46
CPC分类号： H05K1/0237 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2924/15153 , H01L2924/15192 , H01L2924/15313 , H01L2924/16251 , H01L2924/3025 , H01Q1/526 , H05K1/0224 , H05K1/0236 , H05K1/0298 , H05K1/144 , H05K1/183 , H05K9/0009 , H05K9/0052 , H05K2201/09681 , H05K2201/10371
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board which can readily absorb various frequencies, can be easily applied since there is no antenna effect, and which can be economically manufactured on a mass production basis, and to provide an electronic product that uses the board.
SOLUTION: The printed circuit board includes a first substrate, having an electronic component mounted thereon and a second substrate which is located on the upper part of the first substrate, covering at least part of the upper surface of the first substrate and which has an EBG structure inserted therein so as to shield the noise radiated in the upper direction from the first substrate.
COPYRIGHT: (C)2011,JPO&INPIT

20. 发明专利

JP2009272600A Printed circuit board manufacturing method 有权
标题翻译：印刷电路板制造方法
公开(公告)号：JP2009272600A
公开(公告)日：2009-11-19
申请号：JP2008262176
申请日：2008-10-08
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： PARK JUN-HEYOUNG , YOO JE-GWANG , RYU CHANG SUP , KIM SUNG YONG , BAE JONG SUK , MOK JEE SOO
IPC分类号： H05K3/40 , H05K1/09 , H05K3/22
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board manufacturing method that enables implementation of a fine circuit pattern and a high density circuit pattern, reduction of cost and time involved in the manufacturing process, and enhancement of reliability in insulation between patterns. SOLUTION: The printed circuit board manufacturing method includes the steps of: forming a first circuit pattern; forming a bump on the first circuit pattern; laminating an insulant on the first circuit pattern such that the first circuit pattern is embedded into the insulant and the insulant is passed through by the bump; forming a second circuit pattern on the insulant; and pressing the second circuit pattern such that the second circuit pattern is embedded into the insulant. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供能够实现精细电路图案和高密度电路图案的印刷电路板制造方法，降低制造工艺中涉及的成本和时间，以及提高图案之间的绝缘性的可靠性。印刷电路板的制造方法包括以下步骤：形成第一电路图案; 在第一电路图案上形成凸块; 在第一电路图案上层叠绝缘体，使得第一电路图案嵌入绝缘体中，并且绝缘体通过凸块穿过; 在绝缘体上形成第二电路图案; 以及按压所述第二电路图案，使得所述第二电路图案嵌入所述绝缘体中。版权所有（C）2010，JPO＆INPIT

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