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    • 11. 发明授权
    • Conductive oxide electrodes
    • 导电氧化物电极
    • US08390100B2
    • 2013-03-05
    • US12653854
    • 2009-12-18
    • Jonathan Bornstein
    • Jonathan Bornstein
    • H01L21/44
    • H01L45/12H01L27/2409H01L27/2418H01L27/2481H01L45/08H01L45/1233H01L45/1253H01L45/146H01L45/147
    • Conductive oxide electrodes are described, including a bi-layer barrier structure electrically coupled with an adhesion layer, and an electrode layer, wherein the bi-layer barrier structure includes a first barrier layer electrically coupled with the adhesion layer, and a second barrier layer electrically coupled with the first barrier layer and to the electrode layer. The conductive oxide electrodes and their associated layers can be fabricated BEOL above a substrate that includes active circuitry fabricated FEOL and electrically coupled with the conductive oxide electrodes through an interconnect structure that can also be fabricated FEOL. The conductive oxide electrodes can be used to electrically couple a plurality of non-volatile re-writeable memory cells with conductive array lines in a two-terminal cross-point memory array fabricated BEOL over the substrate and its active circuitry, the active circuitry configured to perform data operations on the memory array.
    • 描述了导电氧化物电极,其包括与粘合层电耦合的双层阻挡结构和电极层,其中双层阻挡结构包括与粘合层电耦合的第一阻挡层,以及第二阻挡层电 与第一阻挡层和电极层耦合。 导电氧化物电极及其相关层可以在包括有源电路制造的FEOL并且与导电氧化物电极电耦合通过也可以被制造的互连结构的基底上制造BEOL。 导电氧化物电极可用于将多个非易失性可重写存储器单元与在衬底及其有源电路上制造的双端交叉点存储器阵列中的导电阵列线电耦合,该有源电路被配置为 对存储器阵列执行数据操作。
    • 12. 发明申请
    • Conductive oxide electrodes
    • 导电氧化物电极
    • US20100155953A1
    • 2010-06-24
    • US12653854
    • 2009-12-18
    • Jonathan Bornstein
    • Jonathan Bornstein
    • H01L29/41H01L29/43
    • H01L45/12H01L27/2409H01L27/2418H01L27/2481H01L45/08H01L45/1233H01L45/1253H01L45/146H01L45/147
    • Conductive oxide electrodes are described, including a bi-layer barrier structure electrically coupled with an adhesion layer, and an electrode layer, wherein the bi-layer barrier structure includes a first barrier layer electrically coupled with the adhesion layer, and a second barrier layer electrically coupled with the first barrier layer and to the electrode layer. The conductive oxide electrodes and their associated layers can be fabricated BEOL above a substrate that includes active circuitry fabricated FEOL and electrically coupled with the conductive oxide electrodes through an interconnect structure that can also be fabricated FEOL. The conductive oxide electrodes can be used to electrically couple a plurality of non-volatile re-writeable memory cells with conductive array lines in a two-terminal cross-point memory array fabricated BEOL over the substrate and its active circuitry, the active circuitry configured to perform data operations on the memory array.
    • 描述了导电氧化物电极,其包括与粘合层电耦合的双层阻挡结构和电极层,其中双层阻挡结构包括与粘合层电耦合的第一阻挡层,以及第二阻挡层电 与第一阻挡层和电极层耦合。 导电氧化物电极及其相关层可以在包括有源电路制造的FEOL并且与导电氧化物电极电耦合通过也可以被制造的互连结构的基底上制造BEOL。 导电氧化物电极可用于将多个非易失性可重写存储器单元与在衬底及其有源电路上制造的双端交叉点存储器阵列中的导电阵列线电耦合,该有源电路被配置为 对存储器阵列执行数据操作。
    • 13. 发明申请
    • Memory stack cladding
    • 存储堆叠包层
    • US20100155723A1
    • 2010-06-24
    • US12653859
    • 2009-12-18
    • Jonathan BornsteinJulie Casperson Brewer
    • Jonathan BornsteinJulie Casperson Brewer
    • H01L29/22H01L21/34
    • H01L45/12H01L27/2418H01L27/2481H01L45/08H01L45/1233H01L45/147H01L45/1675
    • Examples of memory stack cladding are described, including a memory stack, comprising a first electrode formed on a substrate, a conductive metal oxide layer deposited on the first electrode, a tunnel barrier layer comprising an insulating metal oxide, the tunnel barrier layer being deposited on the conductive metal oxide layer, a second electrode formed on the tunnel barrier layer, a glue layer deposited on the second electrode, a mask layer deposited on the glue layer, and a cladding layer deposited substantially over one or more surfaces of the memory stack, the cladding layer being configured to provide a barrier to prevent one or more hydrogen ions from diffusing through the one or more surfaces of the memory stack. The memory stack may define a two-terminal non-volatile memory cell operative to store data as a plurality of conductivity profiles that can be non-destructively determined by applying a read voltage.
    • 描述了存储器堆叠包层的示例,包括存储器堆叠,其包括形成在衬底上的第一电极,沉积在第一电极上的导电金属氧化物层,包括绝缘金属氧化物的隧道势垒层,隧道势垒层沉积在 导电金属氧化物层,形成在隧道势垒层上的第二电极,沉积在第二电极上的胶层,沉积在胶层上的掩模层以及基本上沉积在存储堆的一个或多个表面上的包覆层, 所述包覆层被配置为提供阻挡层以防止一个或多个氢离子通过所述存储器堆叠的所述一个或多个表面扩散。 存储器堆栈可以定义一个双端非易失性存储器单元,其操作以将数据存储为可以通过施加读取电压而非破坏性地确定的多个导电率分布。
    • 14. 发明授权
    • Multi-step selective etching for cross-point memory
    • 用于交叉点存储器的多步选择性蚀刻
    • US07618894B2
    • 2009-11-17
    • US11881475
    • 2007-07-26
    • Jonathan BornsteinTravis Byonghyop
    • Jonathan BornsteinTravis Byonghyop
    • H01L21/465
    • H01L21/32136G11C13/0009H01L27/101H01L45/08H01L45/12H01L45/1233H01L45/147H01L45/1675
    • Multi-step selective etching. Etching an unmasked region associated with each layer of a plurality of layers, the plurality of layers comprising a stack, wherein the unmasked region of each of the plurality of layers is etched while exposed to a temperature, a pressure, a vacuum, using a plurality of etchants, wherein at least one of the plurality of etchants comprises an inert gas and oxygen, wherein the etchant oxidizes the at least one layer that can be oxidized such that the etching stops, the plurality of etchants leaving substantially unaffected a masked region associated with each layer of the plurality of layers, wherein two or more of the plurality of layers comprises a memory stack, and preventing corrosion of at least one of the plurality of layers comprising a conductive metal oxide by supplying oxygen to the stack after etching the unmasked region without breaking the vacuum.
    • 多步选择性蚀刻。 蚀刻与多个层的每个层相关联的未掩模区域,所述多个层包括堆叠,其中在暴露于温度,压力,真空的情况下,多层中的每一层的未屏蔽区域被蚀刻,使用多个层 的蚀刻剂,其中所述多个蚀刻剂中的至少一个包含惰性气体和氧气,其中所述蚀刻剂氧化所述至少一个可被氧化的层,使得蚀刻停止,所述多个蚀刻剂基本上不影响与 所述多个层中的每个层,其中所述多个层中的两个或更多层包括存储堆叠,并且通过在蚀刻所述未掩模区域之后向所述堆叠提供氧而防止包括导电金属氧化物的所述多个层中的至少一个的腐蚀 不破坏真空。