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11. 发明授权

US07493409B2 Apparatus, system and method for implementing a generalized queue pair in a system area network 失效
标题翻译：用于在系统区域网络中实现广义队列对的装置，系统和方法
公开(公告)号：US07493409B2
公开(公告)日：2009-02-17
申请号：US10411425
申请日：2003-04-10
申请人： David F. Craddock , Donald William Schmidt , Bruce Marshall Walk
发明人： David F. Craddock , Donald William Schmidt , Bruce Marshall Walk
IPC分类号： G06F15/173 , G06F15/177 , G06F15/16
CPC分类号： H04L49/901 , H04L49/90 , H04L67/1097 , H04L69/329
摘要： The present invention provides an apparatus, system and method for providing a generalized queue pair for use with host channel adapters of a system area network. With the apparatus, system and method, the hypervisor of a host channel adapter maintains a P_Key table for each logical port of the host channel adapter. When a request is received to allocate a queue pair from a requestor application associated with a logical port, a P_Key mode is set in a control register associated with the queue pair based on the type of requestor application that sent the request. Based on this P_Key mode, one or more P_Keys from a P_Key table associated with the logical port from which the request was received are written to one or more P_Key registers allocated to the queue pair. These P_Keys are then used to perform P_Key checks of incoming data packets. In addition, these P_Keys are inserted into headers of outgoing data packets. In a preferred embodiment, the P_Key modes may be a single P_Key check mode, a multiple P_Key check mode, and a P_Key check disabled mode.
摘要翻译：本发明提供了一种用于提供与系统区域网络的主机信道适配器一起使用的广义队列对的装置，系统和方法。使用设备，系统和方法，主机通道适配器的管理程序维护主机通道适配器的每个逻辑端口的P_Key表。当接收到从与逻辑端口相关联的请求者应用分配队列对的请求时，基于发送请求的请求者应用的类型，在与队列对关联的控制寄存器中设置P_Key模式。基于该P_Key模式，来自与接收请求的逻辑端口相关联的P_Key表中的一个或多个P_Key被写入分配给队列对的一个或多个P_Key寄存器。这些P_Keys然后用于执行P_Key检查输入数据包。另外，这些P_Keys被插入输出数据包的头。在优选实施例中，P_Key模式可以是单个P_Key检查模式，多个P_Key检查模式和P_Key检查禁用模式。

12. 发明授权

US07475209B2 Moving hardware context structures in memory while maintaining system operation 有权
标题翻译：在维护系统运行的同时，在内存中移动硬件上下文结构
公开(公告)号：US07475209B2
公开(公告)日：2009-01-06
申请号：US10845498
申请日：2004-05-13
申请人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
发明人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
IPC分类号： G06F12/00
CPC分类号： G06F12/0223
摘要： An adapter includes registers, a local context table, and logic that allows copying hardware context structures from a first location in memory to a second location in memory while the computer system continues to run. The local context table in the adapter is loaded with a desired block of context entries from the first location in memory. Values in the registers cause the adapter to write this desired block of context entries to the second location in memory in a way that does not inhibit the operation of the computer system.
摘要翻译：适配器包括寄存器，本地上下文表和逻辑，其允许在计算机系统继续运行时将硬件上下文结构从存储器中的第一位置复制到存储器中的第二位置。适配器中的本地上下文表从内存中的第一个位置加载了所需的上下文条目块。寄存器中的值使适配器以不阻碍计算机系统操作的方式将上述条目的所需块写入存储器中的第二个位置。

13. 发明申请

US20080235478A1 MOVING HARDWARE CONTEXT STRUCTURES IN MEMORY WHILE MAINTAINING SYSTEM OPERATION 有权
标题翻译：在保持系统运行的情况下移动存储器中的硬件上下文结构
公开(公告)号：US20080235478A1
公开(公告)日：2008-09-25
申请号：US12134052
申请日：2008-06-05
申请人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
发明人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
IPC分类号： G06F12/00
CPC分类号： G06F12/0223
摘要： An adapter includes registers, a local context table, and logic that allows copying hardware context structures from a first location in memory to a second location in memory while the computer system continues to run. The local context table in the adapter is loaded with a desired block of context entries from the first location in memory. Values in the registers cause the adapter to write this desired block of context entries to the second location in memory in a way that does not inhibit the operation of the computer system.
摘要翻译：适配器包括寄存器，本地上下文表和逻辑，其允许在计算机系统继续运行时将硬件上下文结构从存储器中的第一位置复制到存储器中的第二位置。适配器中的本地上下文表从内存中的第一个位置加载了所需的上下文条目块。寄存器中的值使适配器以不阻碍计算机系统操作的方式将上述条目的所需块写入存储器中的第二个位置。

14. 发明授权

US07681003B2 Moving hardware context structures in memory while maintaining system operation 有权
标题翻译：在维护系统运行的同时，在内存中移动硬件上下文结构
公开(公告)号：US07681003B2
公开(公告)日：2010-03-16
申请号：US12134052
申请日：2008-06-05
申请人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
发明人： Ronald Edward Fuhs , Ryan Scott Haraden , Bruce Marshall Walk
IPC分类号： G06F12/00
CPC分类号： G06F12/0223
摘要： An adapter includes registers, a local context table, and logic that allows copying hardware context structures from a first location in memory to a second location in memory while the computer system continues to run. The local context table in the adapter is loaded with a desired block of context entries from the first location in memory. Values in the registers cause the adapter to write this desired block of context entries to the second location in memory in a way that does not inhibit the operation of the computer system.
摘要翻译：适配器包括寄存器，本地上下文表和逻辑，其允许在计算机系统继续运行时将硬件上下文结构从存储器中的第一位置复制到存储器中的第二位置。适配器中的本地上下文表从内存中的第一个位置加载了所需的上下文条目块。寄存器中的值导致适配器以不阻止计算机系统操作的方式将上述条目的所需块写入存储器中的第二个位置。

15. 发明申请

US20080141058A1 SYSTEM, METHOD, AND ARTICLE OF MANUFACTURE FOR SYNCHRONIZING TIME OF DAY CLOCKS ON FIRST AND SECOND COMPUTERS 有权
标题翻译：第一台和第二台计时器同步时钟同步的系统，方法和制造
公开(公告)号：US20080141058A1
公开(公告)日：2008-06-12
申请号：US11873557
申请日：2007-10-17
申请人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
发明人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
IPC分类号： G06F1/14 , G06F15/16
CPC分类号： G06F1/14 , G04G5/00 , G04G7/00
摘要： A system, method, and article of manufacture for synchronizing first and second time-of-day clocks on first and second computers, respectively, are provided. The first and second computers have first and second network interface cards with third and fourth clocks, respectively, thereon. The system utilizes time stamp values generated by the third and fourth clocks to synchronize the first and second time-of-day clocks.
摘要翻译：提供了分别在第一和第二计算机上同步第一和第二时钟的系统，方法和制品。第一和第二计算机具有分别具有第三和第四时钟的第一和第二网络接口卡。系统利用由第三和第四时钟产生的时间戳值来同步第一和第二时钟时钟。

16. 发明授权

US07330488B2 System, method, and article of manufacture for synchronizing time of day clocks on first and second computers 有权
标题翻译：用于在第一和第二计算机上同步时钟的系统，方法和制品
公开(公告)号：US07330488B2
公开(公告)日：2008-02-12
申请号：US11016465
申请日：2004-12-17
申请人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
发明人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
IPC分类号： H04J3/06
CPC分类号： G06F1/14 , G04G5/00 , G04G7/00
摘要： A system, method, and article of manufacture for synchronizing first and second time-of-day clocks on first and second computers, respectively, are provided. The first and second computers have first and second network interface cards with third and fourth clocks, respectively, thereon. The system utilizes time stamp values generated by the third and fourth clocks to synchronize the first and second time-of-day clocks.
摘要翻译：提供了分别在第一和第二计算机上同步第一和第二时钟的系统，方法和制品。第一和第二计算机具有分别具有第三和第四时钟的第一和第二网络接口卡。系统利用由第三和第四时钟产生的时间戳值来同步第一和第二时钟时钟。

17. 发明授权

US07668207B2 System, method, and article of manufacture for synchronizing time of day clocks on first and second computers 有权
标题翻译：用于在第一和第二计算机上同步时钟的系统，方法和制品
公开(公告)号：US07668207B2
公开(公告)日：2010-02-23
申请号：US11873557
申请日：2007-10-17
申请人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
发明人： David F. Craddock , Richard K. Errickson , Thomas A. Gregg , Bruce Marshall Walk
IPC分类号： H04J3/06
CPC分类号： G06F1/14 , G04G5/00 , G04G7/00
摘要： A system, method, and article of manufacture for synchronizing first and second time-of-day clocks on first and second computers, respectively, are provided. The first and second computers have first and second network interface cards with third and fourth clocks, respectively, thereon. The system utilizes time stamp values generated by the third and fourth clocks to synchronize the first and second time-of-day clocks.
摘要翻译：提供了分别在第一和第二计算机上同步第一和第二时钟的系统，方法和制品。第一和第二计算机具有分别具有第三和第四时钟的第一和第二网络接口卡。系统利用由第三和第四时钟产生的时间戳值来同步第一和第二时钟时钟。

18. 发明授权

US08416785B2 Implementing ghost packet removal within a reliable meshed network 失效
标题翻译：在可靠的网状网络中实现ghost包删除
公开(公告)号：US08416785B2
公开(公告)日：2013-04-09
申请号：US12764193
申请日：2010-04-21
申请人： Phillip Rogers Hillier, III , David Alan Shedivy , Kenneth Michael Valk , Bruce Marshall Walk
发明人： Phillip Rogers Hillier, III , David Alan Shedivy , Kenneth Michael Valk , Bruce Marshall Walk
IPC分类号： H04L12/28
CPC分类号： H04L47/34 , H04L45/245 , H04L49/552
摘要： A method and circuit for implementing multiple active paths between source and destination devices in an interconnect system while removing ghost packets, and a design structure on which the subject circuit resides are provided. Each packet includes a generation ID and is assigned an End-to-End (ETE) sequence number in the source interconnect chip that represents the packet position in an ordered packet stream from the source device. The packets are transmitted from a source interconnect chip source to a destination interconnect chip on the multiple active paths. The generation ID of a received packet is compared with a current generation ID at a destination interconnect chip to validate packet acceptance. The destination interconnect chip uses the ETE sequence numbers to reorder the accepted received packets into the correct order before sending the packets to the destination device.
摘要翻译：一种用于在去除重影分组的同时在互连系统中实现源和目的设备之间的多个活动路径的方法和电路，以及提供了所述主题电路所在的设计结构。每个分组包括生成ID，并且在源互连芯片中分配表示来自源设备的有序分组流中的分组位置的端到端（ETE）序列号。分组从源互连芯片源传输到多个主动路径上的目的地互连芯片。将接收到的分组的生成ID与目的地互连芯片上的当前生成ID进行比较，以验证分组接受。目的互连芯片在将数据包发送到目标设备之前，使用ETE序列号将接收的接收数据包重新排序为正确的顺序。

19. 发明授权

US5666560A Storage method and hierarchical padding structure for direct access storage device (DASD) data compression 失效
标题翻译：直接存取存储设备（DASD）数据压缩的存储方法和分层填充结构
公开(公告)号：US5666560A
公开(公告)日：1997-09-09
申请号：US510804
申请日：1995-08-03
申请人： Daniel Frank Moertl , John Douglas Stevens , Gene Steven Van Grinsven , Bruce Marshall Walk
发明人： Daniel Frank Moertl , John Douglas Stevens , Gene Steven Van Grinsven , Bruce Marshall Walk
IPC分类号： G06F3/06 , G11B20/00 , G11B20/10 , G06F12/02 , G06F12/08
CPC分类号： G06F3/0601 , G11B20/00007 , G11B20/10 , G06F2003/0697 , G06F2212/401
摘要： A data compression storage method and data compression hierarchical padding structure are provided for a direct access storage device (DASD) using fixed block architecture (FBA). A minimum page allocation defining a minimum number of sectors allocated for each logical compressed data page is selected. The DASD is segmented into at least one compression group. Each compression group has a fixed logical size and includes a selected number of DASD compressed data pages with an initial page allocation of a number of sectors. The initial page allocation is greater than or equal to the minimum page allocation. A minimum number of compressed data regions is allocated within each compression group. A selected number of additional compressed data regions including a plurality of sectors for padding is allocated within each compression group. The plurality of padding sectors are distributed between the compression pages. An exception region is allocated within each compression group. Compressed data is written to a selected DASD compressed data page and typically updated in place. Compressed data is written and updated to the selected DASD compressed data page using sector borrowing of available free sectors from adjacent pages if needed.
摘要翻译：为使用固定块架构（FBA）的直接存取存储设备（DASD）提供数据压缩存储方法和数据压缩分层填充结构。选择定义为每个逻辑压缩数据页分配的最小扇区数的最小页分配。 DASD被分割成至少一个压缩组。每个压缩组具有固定的逻辑大小，并且包括具有多个扇区的初始页分配的所选数量的DASD压缩数据页。初始页面分配大于或等于最小页面分配。在每个压缩组中分配最小数量的压缩数据区域。在每个压缩组内分配选择数量的包括用于填充的多个扇区的附加压缩数据区域。多个填充扇区分布在压缩页之间。在每个压缩组内分配一个异常区域。压缩数据被写入选定的DASD压缩数据页面，并通常在现场进行更新。如果需要，压缩数据被写入并更新到所选择的DASD压缩数据页面，使用从相邻页面获得的可用空闲扇区的扇区借用。

20. 发明授权

US06324620B1 Dynamic DASD data management and partitioning based on access frequency utilization and capacity 失效
标题翻译：基于访问频率利用率和容量的动态DASD数据管理和分区
公开(公告)号：US06324620B1
公开(公告)日：2001-11-27
申请号：US09121449
申请日：1998-07-23
申请人： Patrick James Christenson , Michael Joseph Corrigan , Thomas Richard Crowley , Michael Steven Faunce , Michael James McDermott , Timothy John Mullins , Glen Warren Nelson , Russell Paul VanDuine , Bruce Marshall Walk
发明人： Patrick James Christenson , Michael Joseph Corrigan , Thomas Richard Crowley , Michael Steven Faunce , Michael James McDermott , Timothy John Mullins , Glen Warren Nelson , Russell Paul VanDuine , Bruce Marshall Walk
IPC分类号： G06F1200
CPC分类号： G06F3/061 , G06F3/0644 , G06F3/0653 , G06F3/0674
摘要： Method and apparatus for managing data on DASD units to improve system performance comprises monitoring portions of data on a plurality of DASD units to determine the times the data is accessed within a given time period, and characterizing accessed data portions of a DASD unit as HOT and COLD data. The DASD units are monitored to determine the number of times each unit is accessed within a time period to develop utilization factors reflective of the number of times the DASD unit is accessed during the time period. HOT and COLD data is moved between DASD units based on the utilization factors of the DASD units.
摘要翻译：用于管理DASD单元上的数据以提高系统性能的方法和装置包括监视多个DASD单元上的数据部分以确定在给定时间段内数据被访问的次数，以及将DASD单元的访问数据部分表征为HOT，以及 COLD数据。监视DASD单元以确定每个单元在一段时间内访问的次数，以开发反映在该时间段期间访问DASD单元的次数的利用因子。基于DASD单元的利用率，HOT和COLD数据在DASD单元之间移动。

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