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11. 发明申请

US20050257018A1 Apparatus and method for moving hardware context structures in memory while maintaining system operation 有权
标题翻译：用于在维护系统操作的同时在存储器中移动硬件上下文结构的装置和方法
公开(公告)号：US20050257018A1
公开(公告)日：2005-11-17
申请号：US10845498
申请日：2004-05-13
申请人： Ronald Fuhs , Ryan Haraden , Bruce Walk
发明人： Ronald Fuhs , Ryan Haraden , Bruce Walk
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0223
摘要： An adapter includes registers, a local context table, and logic that allows copying hardware context structures from a first location in memory to a second location in memory while the computer system continues to run. The local context table in the adapter is loaded with a desired block of context entries from the first location in memory. Values in the registers cause the adapter to write this desired block of context entries to the second location in memory in a way that does not inhibit the operation of the computer system.
摘要翻译：适配器包括寄存器，本地上下文表和逻辑，其允许在计算机系统继续运行时将硬件上下文结构从存储器中的第一位置复制到存储器中的第二位置。适配器中的本地上下文表从内存中的第一个位置加载了所需的上下文条目块。寄存器中的值使适配器以不阻碍计算机系统操作的方式将上述条目的所需块写入存储器中的第二个位置。

12. 发明申请

US20060047862A1 Automatic hardware data link initialization 审中-公开
标题翻译：自动硬件数据链接初始化
公开(公告)号：US20060047862A1
公开(公告)日：2006-03-02
申请号：US10932710
申请日：2004-09-02
申请人： Robert Shearer , Bruce Walk
发明人： Robert Shearer , Bruce Walk
IPC分类号： G06F3/00
CPC分类号： H04L41/08
摘要： Methods and apparatuses that may be utilized to automatically train and activate communications links between two or more devices are provided. In some embodiments, one or more state machines may be used to monitor and control the behavior of receive and transmit logic during the automatic training and activation, thus, reducing or eliminating the need for software intervention. As a result, training and activation may begin with little delay after a power-on cycle.
摘要翻译：提供了可用于自动训练和激活两个或多个设备之间的通信链路的方法和设备。在一些实施例中，一个或多个状态机可用于在自动训练和激活期间监视和控制接收和发送逻辑的行为，从而减少或消除对软件干预的需要。因此，在上电周期之后，培训和激活可能几乎不会延迟。

13. 发明申请

US20080117931A1 DYNAMIC LOAD-BASED CREDIT DISTRIBUTION 失效
标题翻译：基于动态负载的信用分配
公开(公告)号：US20080117931A1
公开(公告)日：2008-05-22
申请号：US12018226
申请日：2008-01-23
申请人： Bruce Beukema , Jamie Kuesel , Robert Shearer , Bruce Walk
发明人： Bruce Beukema , Jamie Kuesel , Robert Shearer , Bruce Walk
IPC分类号： H04J3/16
CPC分类号： G06F13/4208
摘要： Methods and systems for dynamically adjusting credits used to distribute available bus bandwidth among multiple virtual channels, based on the workload of each virtual channel, are provided. Accordingly, for some embodiments, virtual channels with higher workloads relative to other virtual channels may receive a higher allocation of bus bandwidth (more credits).
摘要翻译：提供了基于每个虚拟通道的工作负载动态调整用于在多个虚拟通道中分配可用总线带宽的信用的方法和系统。因此，对于一些实施例，相对于其他虚拟信道具有较高工作负载的虚拟信道可以接收更高的总线带宽分配（更多信用）。

14. 发明申请

US20050254519A1 Dynamic load-based credit distribution 有权
标题翻译：基于动态负载的信用分配
公开(公告)号：US20050254519A1
公开(公告)日：2005-11-17
申请号：US10845497
申请日：2004-05-13
申请人： Bruce Beukema , Jamie Kuesel , Robert Shearer , Bruce Walk
发明人： Bruce Beukema , Jamie Kuesel , Robert Shearer , Bruce Walk
IPC分类号： G06F13/42 , H04J3/16
CPC分类号： G06F13/4208
摘要： Methods and systems for dynamically adjusting credits used to distribute available bus bandwidth among multiple virtual channels, based on the workload of each virtual channel, are provided. Accordingly, for some embodiments, virtual channels with higher workloads relative to other virtual channels may receive a higher allocation of bus bandwidth (more credits).
摘要翻译：提供了基于每个虚拟通道的工作负载动态调整用于在多个虚拟通道中分配可用总线带宽的信用的方法和系统。因此，对于一些实施例，相对于其他虚拟信道具有较高工作负载的虚拟信道可以接收更高的总线带宽分配（更多信用）。

15. 发明申请

US20050060445A1 Method for implementing dynamic virtual lane buffer reconfiguration 失效
标题翻译：实现动态虚拟通道缓冲区重新配置的方法
公开(公告)号：US20050060445A1
公开(公告)日：2005-03-17
申请号：US10660033
申请日：2003-09-11
申请人： Bruce Beukema , Ronald Fuhs , Calvin Paynton , Steven Rogers , Bruce Walk
发明人： Bruce Beukema , Ronald Fuhs , Calvin Paynton , Steven Rogers , Bruce Walk
IPC分类号： G06F3/00 , H04L12/56
CPC分类号： H04L47/30 , H04L49/35 , H04L49/358 , H04L49/90 , H04L49/9078
摘要： A method, apparatus and computer program product are provided for implementing dynamic Virtual Lane buffer reconfiguration in a channel adapter. A first register is provided for communicating an adapter buffer size and allocation capability for the channel adapter. At least one second register is provided for communicating a current port buffer size and one second register is associated with each physical port of the channel adapter. A plurality of third registers is provided for communicating a current VL buffer size, and one third register is associated with each VL of each physical port of the channel adapter. The second register is used for receiving change requests for adjusting the current port buffer size for an associated physical port. The third register is used for receiving change requests for adjusting the current VL buffer size for an associated VL.
摘要翻译：提供了一种用于在通道适配器中实现动态虚拟通道缓冲器重新配置的方法，装置和计算机程序产品。第一个寄存器用于传送适配器缓冲区大小和通道适配器的分配能力。提供至少一个第二寄存器用于传送当前端口缓冲器大小，一个第二寄存器与信道适配器的每个物理端口相关联。提供多个第三寄存器用于传送当前的VL缓冲器大小，并且一个第三寄存器与通道适配器的每个物理端口的每个VL相关联。第二个寄存器用于接收用于调整相关物理端口的当前端口缓冲区大小的更改请求。第三寄存器用于接收用于调整相关VL的当前VL缓冲器大小的改变请求。

16. 发明申请

US20060222004A1 Methods and apparatus for transferring data 审中-公开
标题翻译：用于传输数据的方法和装置
公开(公告)号：US20060222004A1
公开(公告)日：2006-10-05
申请号：US11097735
申请日：2005-04-01
申请人： Bruce Beukema , Lance Hehenberger , Nathaniel Sellin , Robert Shearer , Bruce Walk
发明人： Bruce Beukema , Lance Hehenberger , Nathaniel Sellin , Robert Shearer , Bruce Walk
IPC分类号： H04L12/28
CPC分类号： H04L69/18
摘要： In a first aspect, a first method is provided for transferring data using an Infiniband (IB) protocol. The first method includes the steps of (1) receiving a non-IB packet having header data and payload data at a first node of a computer system; and (2) modifying data in the non-IB packet to convert the non-IB packet to an IB packet having header data and payload data. The header data of the non-IB packet is not included in the payload data of the IB packet resulting from the conversion. Numerous other aspects are provided.
摘要翻译：在第一方面，提供了使用Infiniband（IB）协议传送数据的第一种方法。第一种方法包括以下步骤：（1）在计算机系统的第一节点处接收具有报头数据和有效载荷数据的非IB分组; 和（2）修改非IB分组中的数据以将非IB分组转换为具有报头数据和有效载荷数据的IB分组。非IB分组的报头数据不包括在由转换产生的IB分组的有效载荷数据中。提供了许多其他方面。

17. 发明申请

US20060026358A1 Method and apparatus of supporting cacheable registers 有权
标题翻译：支持可缓存寄存器的方法和装置
公开(公告)号：US20060026358A1
公开(公告)日：2006-02-02
申请号：US10901600
申请日：2004-07-29
申请人： Bruce Beukema , Jon Kriegel , Jamie Kuesel , Eric Mejdrich , Robert Shearer , Bruce Walk
发明人： Bruce Beukema , Jon Kriegel , Jamie Kuesel , Eric Mejdrich , Robert Shearer , Bruce Walk
IPC分类号： G06F12/00
CPC分类号： G06F12/0888
摘要： Computer systems with direct updating of cache (e.g., primary L1 cache) memories of a processor, such as a central processing unit (CPU) or graphics processing unit (GPU). Special addresses are reserved for high speed memory. Memory access requests involving these reserved addresses are routed directly to the high speed memory. Memory access requests not involving these reserved addresses are routed to memory external to the processor.
摘要翻译：具有直接更新诸如中央处理单元（CPU）或图形处理单元（GPU）的处理器的高速缓存（例如，主要L1高速缓存）存储器的计算机系统。专用地址保留给高速存储器。涉及这些保留地址的存储器访问请求直接路由到高速存储器。不涉及这些保留地址的存储器访问请求被路由到处理器外部的存储器。

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