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11. 发明授权

US08163658B2 Multiple patterning using improved patternable low-k dielectric materials 有权
标题翻译：使用改进的可图案化的低k电介质材料进行多重图案化
公开(公告)号：US08163658B2
公开(公告)日：2012-04-24
申请号：US12546235
申请日：2009-08-24
申请人： Qinghuang Lin
发明人： Qinghuang Lin
IPC分类号： H01L21/469 , H01L23/58
CPC分类号： H01L21/3105 , C08G77/04 , G03F7/0035 , G03F7/0757 , G03F7/091 , H01L21/02126 , H01L21/02274 , H01L21/02282 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/28123 , H01L21/31 , H01L21/31144 , H01L21/3121
摘要： A method of double patterning a semiconductor structure with a single material which after patterning becomes a permanent part of the semiconductor structure. More specifically, a method to form a patterned semiconductor structure with small features is provided which are difficult to obtain using conventional exposure lithographic processes. The method of the present invention includes the use of patternable low-k materials which after patterning remain as a low-k dielectric material within the semiconductor structure. The method is useful in forming semiconductor interconnect structures in which the patternable low-k materials after patterning and curing become a permanent element, e.g., a patterned interlayer low-k material, of the interconnect structure.
摘要翻译：用图案化之后的单一材料对半导体结构进行双重图案化的方法成为半导体结构的永久部分。更具体地，提供了一种形成具有小特征的图案化半导体结构的方法，其难以使用常规曝光光刻工艺获得。本发明的方法包括使用可图案化的低k材料，其在图案化之后保持为半导体结构内的低k电介质材料。该方法在形成半导体互连结构中是有用的，其中图案化和固化后的可图案化的低k材料成为互连结构的永久性元件，例如图案化的层间低k材料。

12. 发明申请

US20110312177A1 PATTERNABLE DIELECTRIC FILM STRUCTURE WITH IMPROVED LITHOGRAPHY AND METHOD OF FABRICATING SAME 有权
标题翻译：具有改进的光刻的方形电介质膜结构及其制造方法
公开(公告)号：US20110312177A1
公开(公告)日：2011-12-22
申请号：US13219144
申请日：2011-08-26
申请人： Qinghuang Lin , Deborah A. Neumayer
发明人： Qinghuang Lin , Deborah A. Neumayer
IPC分类号： H01L21/768
CPC分类号： H01L21/76808 , H01L21/02118 , H01L21/02167 , H01L21/02274 , H01L21/02282 , H01L21/0276 , H01L21/31 , H01L21/3121 , H01L21/3122 , H01L21/3148 , H01L21/76832 , H01L21/76835 , H01L21/76843 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate, said inorganic antireflective coating is vapor deposited and comprises atoms of M, C and H wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La; forming at least one interconnect pattern within the at least one patternable low-k material; and curing the at least one patternable low-k material. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.
摘要翻译：本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。一般来说，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料，所述无机抗反射涂层被气相沉积并包含M，C和H原子其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种; 在所述至少一个可编码的低k材料内形成至少一个互连图案; 以及固化所述至少一种可图案化的低k材料。本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。

13. 发明申请

US20110291284A1 INTERCONNECT STRUCTURE WITH AN OXYGEN-DOPED SiC ANTIREFLECTIVE COATING AND METHOD OF FABRICATION 有权
标题翻译：与OXYGEN-DOPED SiC抗反射涂层的互连结构及制造方法
公开(公告)号：US20110291284A1
公开(公告)日：2011-12-01
申请号：US12788912
申请日：2010-05-27
申请人： Dario L. Goldfarb , Ranee W. Kwong , Qinghuang Lin , Deborah A. Neumayer , Hosadurga Shobha
发明人： Dario L. Goldfarb , Ranee W. Kwong , Qinghuang Lin , Deborah A. Neumayer , Hosadurga Shobha
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L21/76802 , H01L21/02126 , H01L21/022 , H01L21/02274 , H01L21/02282 , H01L21/76808 , H01L21/76829 , H01L21/76832 , H01L21/76835 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53271 , H01L23/53276 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： An interconnect structure is provided that includes at least one patterned and cured photo-patternable low k material located on a surface of a patterned and cured oxygen-doped SiC antireflective coating (ARC). A conductively filled region is located within the at least one patterned and cured photo-patternable low k material and the patterned and cured oxygen-doped SiC ARC. The oxygen-doped SiC ARC, which is a thin layer (i.e., less than 400 angstroms), does not produce standing waves that may degrade the diffusion barrier and the electrically conductive feature that are embedded within the patterned and cured photo-patternable low k dielectric material and, as such, structural integrity is maintained. Furthermore, since a thin oxygen-doped SiC ARC is employed, the plasma etch process time used to open the material stack of the ARC/dielectric cap can be reduced, thus reducing potential plasma damage to the patterned and cured photo-patternable low k material. Also, the oxygen-doped SiC ARC can withstand current BEOL processing conditions.
摘要翻译：提供了一种互连结构，其包括位于图案化和固化的氧掺杂的SiC抗反射涂层（ARC）的表面上的至少一个图案化和固化的可光图案化的低k材料。导电填充区域位于至少一个图案化和固化的可光图案化低k材料和图案化和固化的氧掺杂SiC ARC内。作为薄层（即，小于400埃）的氧掺杂SiC ARC不产生可能降解扩散阻挡层和嵌入图案化和固化的可光图案化低k内的导电特征的驻波介电材料，因此，维持结构完整性。此外，由于采用薄氧掺杂SiC ARC，因此可以减少用于打开ARC /电介质盖的材料堆叠的等离子体蚀刻工艺时间，从而减少图案化和固化的可光图案化低k材料的潜在等离子体损伤。此外，氧掺杂的SiC ARC可以承受当前的BEOL加工条件。

14. 发明申请

US20100314768A1 INTERCONNECT STRUCTURE FABRICATED WITHOUT DRY PLASMA ETCH PROCESSING 有权
标题翻译：互连结构在没有干等离子体处理的情况下制成
公开(公告)号：US20100314768A1
公开(公告)日：2010-12-16
申请号：US12483588
申请日：2009-06-12
申请人： Maxime Darnon , Jeffrey P. Gambino , Elbert E. Huang , Qinghuang Lin
发明人： Maxime Darnon , Jeffrey P. Gambino , Elbert E. Huang , Qinghuang Lin
IPC分类号： H01L23/535 , H01L21/768
CPC分类号： H01L23/53295 , H01L21/4846 , H01L21/76808 , H01L21/76834 , H01L21/76849 , H01L23/49894 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L2221/1031 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： An interconnect structure within a microelectronic structure and a method for fabricating the interconnect structure within the microelectronic structure use a developable bottom anti-reflective coating layer and at least one imageable inter-level dielectric layer located thereupon over a substrate that includes a base dielectric layer and a first conductor layer located and formed embedded within the base dielectric layer. Incident to use of the developable bottom anti-reflective coating layer and the at least one imageable inter-level dielectric layer, an aperture, such as but not limited to a dual damascene aperture, may be formed through the at least one imageable inter-level dielectric layer and the developable anti-reflective coating layer to expose a capping layer located and formed upon the first conductor layer, absent use of a dry plasma etch method when forming the interconnect structure within the microelectronic structure.
摘要翻译：微电子结构内的互连结构和用于在微电子结构内制造互连结构的方法使用可显影底部抗反射涂层和位于其上的至少一个可成像的层间电介质层，该基底包括基底电介质层和第一导体层，其位于并形成为嵌入在所述基极介质层内。使用可显影底部抗反射涂层和至少一个可成像的层间电介质层的事件可以通过至少一个可成像的层间间隔形成孔，例如但不限于双镶嵌孔，介电层和可显影的抗反射涂层，以在位于和形成在第一导体层上时露出覆盖层，当在微电子结构内形成互连结构时，不使用干等离子体蚀刻方法。

15. 发明申请

US20100207276A1 SPIN-ON ANTIREFLECTIVE COATING FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS AND INTERCONNECT STRUCTURES 有权
标题翻译：用于整合电介质材料和互连结构的旋转抗反射涂层（SPIN-ON ANTIREFLECTIVE COATING FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS AND INTERCONNECT STRUCTURES
公开(公告)号：US20100207276A1
公开(公告)日：2010-08-19
申请号：US12772451
申请日：2010-05-03
申请人： Robert D. Allen , Phillip J. Brock , Blake W. Davis , Wu-Song S. Huang , Qinghuang Lin , Alshakim Nelson , Sampath Purushothaman , Ratnam Sooriyakumaran
发明人： Robert D. Allen , Phillip J. Brock , Blake W. Davis , Wu-Song S. Huang , Qinghuang Lin , Alshakim Nelson , Sampath Purushothaman , Ratnam Sooriyakumaran
IPC分类号： H01L23/522 , C09D5/00
CPC分类号： H01L21/76808 , H01L21/02137 , H01L21/02282 , H01L21/02304 , H01L21/02348 , H01L21/0276 , H01L21/3122 , H01L21/76802 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , Y10T428/24802 , H01L2924/00
摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate. The inorganic ARC is liquid deposited and comprises a polymer that has at least one monomer unit comprising the formula M-R1 wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La and R1 is a chromophore. At least one interconnect pattern is formed within the at least one patternable low-k material and thereafter the at least one patternable low-k material is cured. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.
摘要翻译：本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。通常，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料。无机ARC是液体沉积的，并且包含具有至少一个单体单元的聚合物，该单体单元包括式M-R1，其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种， R1是发色团。在至少一个可模制的低k材料内形成至少一个互连图案，此后至少一个可图案化的低k材料固化。本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。

16. 发明授权

US07714079B2 Patternable low dielectric constant materials and their use in ULSI interconnection 有权
标题翻译：可图形的低介电常数材料及其在ULSI互连中的应用
公开(公告)号：US07714079B2
公开(公告)日：2010-05-11
申请号：US11933530
申请日：2007-11-01
申请人： Qinghuang Lin , Ratnam Sooriyakumaran
发明人： Qinghuang Lin , Ratnam Sooriyakumaran
IPC分类号： C08L83/04 , B32B27/06 , B32B9/04 , C08G77/04
CPC分类号： G03F7/0757 , C08G77/04 , C08G77/24 , C09D183/08 , G03F7/0046 , H01L21/02118 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02348 , H01L21/31 , H01L21/3122 , H01L21/3124 , H01L21/31695 , H01L21/76814 , H01L21/7682 , H01L23/5329 , H01L2221/1047 , H01L2924/0002 , Y10T428/31663 , H01L2924/00
摘要： The present invention relates to ultra-large scale integrated (ULSI) interconnect structures, and more particularly to patternable low dielectric constant (low-k) materials suitable for use in ULSI interconnect structures. The patternable low-k dielectrics disclosed herein are functionalized polymers that having one or more acid-sensitive imageable functional groups.
摘要翻译：本发明涉及超大规模集成（ULSI）互连结构，更具体地涉及适用于ULSI互连结构的可编程低介电常数（低k）材料。本文公开的可图案化的低k电介质是具有一个或多个酸敏感可成像官能团的官能化聚合物。

17. 发明授权

US07709177B2 Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof 失效
公开(公告)号：US07709177B2
公开(公告)日：2010-05-04
申请号：US11906390
申请日：2007-10-02
申请人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles LaTulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
发明人： Marie Angelopoulos , Katherina E. Babich , Douglas Charles LaTulipe , Qinghuang Lin , David R. Medeiros , Wayne Martin Moreau , Karen E. Petrillo , John P. Simons
IPC分类号： G03F7/004 , G03F7/30
CPC分类号： G03F7/091 , G03F7/0757 , G03F7/094 , G03F7/405 , Y10S430/145
摘要： Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.

18. 发明申请

US20090081418A1 SPIN-ON ANTIREFLECTIVE COATING FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS AND INTERCONNECT STRUCTURES 有权
标题翻译：用于整合电介质材料和互连结构的旋转抗反射涂层（SPIN-ON ANTIREFLECTIVE COATING FOR INTEGRATION OF PATTERNABLE DIELECTRIC MATERIALS AND INTERCONNECT STRUCTURES
公开(公告)号：US20090081418A1
公开(公告)日：2009-03-26
申请号：US11858615
申请日：2007-09-20
申请人： Robert D. Allen , Phillip J. Brock , Blake W. Davis , Wu-Song S. Huang , Qinghuang Lin , Alshakim Nelson , Sampath Purushothaman , Ratnam Sooriyakumaran
发明人： Robert D. Allen , Phillip J. Brock , Blake W. Davis , Wu-Song S. Huang , Qinghuang Lin , Alshakim Nelson , Sampath Purushothaman , Ratnam Sooriyakumaran
IPC分类号： B32B5/00 , G03F7/00
CPC分类号： H01L21/76808 , H01L21/02137 , H01L21/02282 , H01L21/02304 , H01L21/02348 , H01L21/0276 , H01L21/3122 , H01L21/76802 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , Y10T428/24802 , H01L2924/00
摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate. The inorganic ARC is liquid deposited and comprises a polymer that has at least one monomer unit comprising the formula M-R1 wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La and R1 is a chromophore. At least one interconnect pattern is formed within the at least one patternable low-k material and thereafter the at least one patternable low-k material is cured. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.
摘要翻译：本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。通常，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料。无机ARC是液体沉积的，并且包含具有至少一个单体单元的聚合物，该单体单元包括式M-R1，其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种， R1是发色团。在至少一个可模制的低k材料内形成至少一个互连图案，此后至少一个可图案化的低k材料固化。本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。

19. 发明申请

US20080200034A1 METHOD TO REMOVE BEOL SACRIFICIAL MATERIALS AND CHEMICAL RESIDUES BY IRRADIATION 失效
标题翻译：通过辐射去除波纹材料和化学残留物的方法
公开(公告)号：US20080200034A1
公开(公告)日：2008-08-21
申请号：US11677100
申请日：2007-02-21
申请人： Qinghuang Lin , Elbert E. Huang , Christy S. Tyberg , Ronald A. DellaGuardia
发明人： Qinghuang Lin , Elbert E. Huang , Christy S. Tyberg , Ronald A. DellaGuardia
IPC分类号： H01L21/311
CPC分类号： H01L21/31127 , H01L21/02063 , H01L21/3105 , H01L21/31058 , H01L21/31138 , H01L21/31144 , H01L21/76808 , H01L21/76814 , H01L21/76825 , H01L21/76826
摘要： A method to fabricate interconnect structures that are part of integrated circuits and microelectronic devices by utilization of an irradiation to remove and clean a sacrificial material used therein is described. The advantages of utilizing the irradiation to remove the sacrificial material include reduced damage to interlayer dielectric layers that result in enhanced device performance and/or increased reliability.
摘要翻译：描述了通过利用照射去除和清洁其中使用的牺牲材料来制造作为集成电路和微电子器件的一部分的互连结构的方法。利用照射去除牺牲材料的优点包括降低对层间电介质层的损伤，导致增强的器件性能和/或增加的可靠性。

20. 发明申请

US20080150091A1 MULTIPLE PATTERNING USING PATTERNABLE LOW-k DIELECTRIC MATERIALS 有权
标题翻译：使用图形低k介质材料进行多种格式化
公开(公告)号：US20080150091A1
公开(公告)日：2008-06-26
申请号：US12029848
申请日：2008-02-12
申请人： Qinghuang Lin
发明人： Qinghuang Lin
IPC分类号： H01L21/469 , H01L23/58
CPC分类号： H04L25/4902 , H04L5/1423 , H04L25/4906
摘要： A method of double patterning a semiconductor structure with a single material which after patterning becomes a permanent part of the semiconductor structure. More specifically, a method to form a patterned semiconductor structure with small features is provided which are difficult to obtain using conventional exposure lithographic processes. The method of the present invention includes the use of patternable low-k dielectric materials which after patterning remain as a low k dielectric material within the semiconductor structure. The method is useful in forming semiconductor interconnect structures in which the patternable low k dielectric materials after patterning and curing become a permanent element, e.g., a patterned interlayer low k dielectric material, of the interconnect structure.
摘要翻译：用图案化之后的单一材料对半导体结构进行双重图案化的方法成为半导体结构的永久部分。更具体地，提供了一种形成具有小特征的图案化半导体结构的方法，其难以使用常规曝光光刻工艺获得。本发明的方法包括使用可图案化的低k介电材料，其在图案化之后保持为半导体结构内的低k电介质材料。该方法在形成半导体互连结构中是有用的，其中在图案化和固化之后图形化的低k电介质材料成为互连结构的永久性元件，例如图案化的层间低k电介质材料。

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