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    • 11. 发明申请
    • Current sensing for flash
    • 闪光灯电流检测
    • US20080013382A1
    • 2008-01-17
    • US11486591
    • 2006-07-14
    • Qiang Tang
    • Qiang Tang
    • G11C16/04G11C11/34
    • G11C16/28G11C16/0483
    • A current sensing data read/verify process and sense amplifier is described that senses memory cells of a non-volatile memory array utilizing a current sensing process that places a current source to provide current to the bit line. The voltage level of the bit line is then set by the current provided by the current source and the current sunk from the bit line through the selected memory cell to the source line, which is dependent on the threshold voltage of its programmed or erased state. If the selected memory cell is erased, current flows through the memory cell to the source line and the bit line voltage falls. If the selected memory cell is programmed, little or no current flows through the cell, and the bit line voltage rises and is sensed by the sense amplifier.
    • 描述了电流感测数据读取/验证处理和读出放大器,其利用放置电流源以向位线提供电流的电流感测处理来感测非易失性存储器阵列的存储器单元。 然后,位线的电压电平由电流源提供的电流设置,当前通过所选择的存储单元从位线下降到源极线,其取决于其编程或擦除状态的阈值电压。 如果所选择的存储单元被擦除,则电流流过存储器单元到源极线并且位线电压下降。 如果选择的存储单元被编程,则很少或没有电流流过单元,并且位线电压升高并由读出放大器感测。
    • 17. 发明申请
    • CURRENT SENSING FOR FLASH
    • 电流检测
    • US20100182843A1
    • 2010-07-22
    • US12748741
    • 2010-03-29
    • Qiang Tang
    • Qiang Tang
    • G11C16/06G11C16/04
    • G11C16/28G11C16/0483
    • A current sensing data read/verify process and sense amplifier is described that senses memory cells of a non-volatile memory array utilizing a current sensing process that places a current source to provide current to the bit line. The voltage level of the bit line is then set by the current provided by the current source and the current sunk from the bit line through the selected memory cell to the source line, which is dependent on the threshold voltage of its programmed or erased state. If the selected memory cell is erased, current flows through the memory cell to the source line and the bit line voltage falls. If the selected memory cell is programmed, little or no current flows through the cell, and the bit line voltage rises and is sensed by the sense amplifier.
    • 描述了电流感测数据读取/验证处理和读出放大器,其利用放置电流源以向位线提供电流的电流感测过程来感测非易失性存储器阵列的存储器单元。 然后,位线的电压电平由电流源提供的电流设置,当前通过所选择的存储单元从位线下降到源极线,其取决于其编程或擦除状态的阈值电压。 如果所选择的存储单元被擦除,则电流流过存储器单元到源极线并且位线电压下降。 如果选择的存储单元被编程,则很少或没有电流流过单元,并且位线电压升高并由读出放大器感测。
    • 20. 发明申请
    • CURRENT MIRROR CIRCUIT HAVING DRAIN-SOURCE VOLTAGE CLAMP
    • 具有漏源电压钳的电流镜电路
    • US20090001959A1
    • 2009-01-01
    • US12204287
    • 2008-09-04
    • Qiang Tang
    • Qiang Tang
    • G05F3/16
    • G05F3/262
    • A circuit and method for providing an output current that includes biasing an output transistor in accordance with a reference current to conduct the output current and further includes maintaining a voltage across the output transistor. One embodiment includes conducting a reference current through a diode-coupled first field-effect transistor (FET) and biasing a gate of a second FET matched to the diode-coupled first FET by a voltage equal to a gate voltage of the diode-coupled first FET. A current equal to the reference current is conducted through a third FET having a gate coupled to a drain of the second FET, the third FET matched to the second FET.
    • 一种用于提供输出电流的电路和方法,包括根据参考电流偏置输出晶体管以导通输出电流,还包括维持输出晶体管两端的电压。 一个实施例包括通过二极管耦合的第一场效应晶体管(FET)引导参考电流,并且将与二极管耦合的第一FET匹配的第二FET的栅极偏置等于二极管耦合的第一FET的栅极电压的电压 FET。 通过具有与第二FET的漏极耦合的栅极的第三FET导通等于参考电流的电流,第三FET与第二FET匹配。