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    • 11. 发明申请
    • Synchronization method and program for a parallel computer
    • 并行计算机的同步方法和程序
    • US20060212868A1
    • 2006-09-21
    • US11312345
    • 2005-12-21
    • Koichi TakayamaHidetaka Aoki
    • Koichi TakayamaHidetaka Aoki
    • G06F9/46
    • G06F9/52G06F9/522
    • Barrier synchronization between multiprocessors is performed at high speed while reducing overhead of parallel processing without adding any special hardware mechanism. A parallel computer synchronization method is provided to synchronize threads through barrier synchronization for parallel execution of plural threads on plural processor modules. The parallel computer has plural processor modules (P0 and P1) equipped with plural processor cores (cpu0 to cpu3). The processor cores are each assigned plural threads (Th0 to Th7) to execute multithread processing. The plural threads (Th0 to Th7) are set in hierarchical groups (Gr), and barrier synchronization is performed on each group separately.
    • 多处理器之间的屏障同步以高速执行,同时减少并行处理的开销,而不增加任何特殊的硬件机制。 提供了一种并行计算机同步方法,以通过屏障同步来同步线程,以并行执行多个处理器模块上的多个线程。 并行计算机具有多个处理器模块(P 0和P 1),其具有多个处理器核心(cpu 0至cpu 3)。 处理器核心被分配多个线程(Th 0到Th 7),以执行多线程处理。 多个线程(Th 0至Th 7)被设置为分层组(Gr),并且对每个组分别进行障碍同步。
    • 12. 发明申请
    • Shared-memory multiprocessor
    • 共享内存多处理器
    • US20050198438A1
    • 2005-09-08
    • US11065259
    • 2005-02-25
    • Hidetaka Aoki
    • Hidetaka Aoki
    • G06F12/08G06F12/00
    • G06F12/0817G06F2212/253
    • It is possible to simplify a transaction for maintaining cache coherency in a shared-memory multiprocessor. A directory is provided that has a bit train indicating, for each of the pages of a main memory, whether the page is registered in a cache of each node group (zero when not registered). A processor has an instruction to clear a directory entry corresponding to a specified page to zero. A contracting device monitors a transaction for maintaining cache coherency that flows through an interconnection network, and it detects bits in the directory that can be set to zero.
    • 可以简化用于维护共享内存多处理器中的高速缓存一致性的事务。 提供了一个目录,其具有位列,针对主存储器的每个页面是否将页面注册到每个节点组的高速缓存中(在未注册时为零)。 处理器具有将与指定页面相对应的目录条目清除为零的指令。 承包设备监视事务以维护流过互连网络的高速缓存一致性,并且它检测目录中可以设置为零的位。