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11. 发明申请

US20120303991A1 METHOD AND APPARATUS FOR IMPROVED POWER MANAGEMENT OF MICROPROCESSORS BY INSTRUCTION GROUPING 有权
标题翻译：通过指令分组改进微处理器功率管理的方法和装置
公开(公告)号：US20120303991A1
公开(公告)日：2012-11-29
申请号：US13569809
申请日：2012-08-08
申请人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
发明人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
IPC分类号： G06F1/32 , G06F9/38
CPC分类号： G06F1/3287 , G06F1/3206 , G06F1/3234 , G06F9/3836 , G06F9/3869 , G06F9/3871
摘要： A method of power gating a microprocessor having an instruction scheduling unit for receiving issued instructions from an instruction decoder; an execution unit receiving and sending signals from and to the instruction scheduling unit; and a state machine. The method comprises: obtaining a number of instructions per cycle being issued to the instruction scheduling unit; determining, if the number of instruction per cycle being issued to the instruction scheduling unit is less than a threshold level, and then determining if at least two of the instructions being issued to the instruction scheduling unit are independent of each other only when the instructions per cycle is less than the threshold level; determining when at least two of the instructions being issued to the instruction scheduling unit are independent of each other; and power gating the microprocessor to gate off power to idle macros with a signal from the state machine.
摘要翻译：一种具有指令调度单元的微处理器的电源门控方法，用于从指令解码器接收发出的指令; 执行单元从指令调度单元接收和发送信号; 和状态机。该方法包括：获得每个周期的指令数量，发出给指令调度单元; 确定如果发出给指令调度单元的每个周期的指令数量小于阈值水平，然后确定发出到指令调度单元的至少两个指令是否相互独立，只有当每个指令周期小于阈值水平; 确定发出到指令调度单元的指令中的至少两个是否彼此独立; 和电源门控微处理器通过来自状态机的信号关闭空闲宏的电源。

12. 发明授权

US08245065B2 Power gating processor execution units when number of instructions issued per cycle falls below threshold and are independent until instruction queue is full 失效
标题翻译：电源门控处理器执行单元，当每个周期发出的指令数量低于阈值时，并且在指令队列已满之前是独立的
公开(公告)号：US08245065B2
公开(公告)日：2012-08-14
申请号：US12397830
申请日：2009-03-04
申请人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
发明人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
IPC分类号： G06F1/32 , G06F9/38
CPC分类号： G06F1/3287 , G06F1/3206 , G06F1/3234 , G06F9/3836 , G06F9/3869 , G06F9/3871
摘要： A method of power gating a microprocessor having an instruction scheduling unit for receiving issued instructions from an instruction decode unit; an execution unit coupled to receive and send signals from and to the instruction scheduling unit; and a state machine located within the execution unit, the method comprises: obtaining a number of instructions per cycle being issued to the instruction scheduling unit; determining, subsequent to obtaining the number of instructions per cycle, if the number of instruction per cycle being issued to the instruction scheduling unit is less than a threshold level, and then determining if at least two of the instructions being issued to the instruction scheduling unit are independent of each other only when the instructions per cycle is less than the threshold level; determining when at least two of the instructions being issued to the instruction scheduling unit are independent of each other; and power gating the microprocessor to gate off power to idle macros with a signal from the state machine when the instructions are independent of each other without incurring significant loss of performance until an issue queue in the instruction scheduling unit is filled with instruction data.
摘要翻译：一种具有指令调度单元的微处理器的电源门控方法，用于从指令解码单元接收发出的指令; 执行单元，被耦合以从所述指令调度单元接收和发送信号; 以及位于所述执行单元内的状态机，所述方法包括：获取每个循环的指令数量，并发送给所述指令调度单元; 确定在每个周期获得指令数量之后，如果发出到指令调度单元的每个周期的指令数量小于阈值水平，然后确定是否发出至少两个指令发送到指令调度单元只有当每个周期的指令小于阈值水平时，它们彼此独立; 确定发出到指令调度单元的指令中的至少两个是否彼此独立; 以及当指令彼此独立而不引起显着的性能损失时，直到指令调度单元中的问题队列填充有指令数据，门控微处理器将来自状态机的信号关闭到空闲宏的电源。

13. 发明授权

US08806253B2 Power down of execution units for issued instruction accumulation when issue rate of instructions falls below threshold and at least two are independent 有权
标题翻译：当指令的发布率低于阈值并且至少两个是独立的时，关闭执行单元以发出指令累加
公开(公告)号：US08806253B2
公开(公告)日：2014-08-12
申请号：US13569809
申请日：2012-08-08
申请人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
发明人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
IPC分类号： G06F1/32 , G06F9/38
CPC分类号： G06F1/3287 , G06F1/3206 , G06F1/3234 , G06F9/3836 , G06F9/3869 , G06F9/3871
摘要： A method of power gating a microprocessor having an instruction scheduling unit for receiving issued instructions from an instruction decoder; an execution unit receiving and sending signals from and to the instruction scheduling unit; and a state machine. The method comprises: obtaining a number of instructions per cycle being issued to the instruction scheduling unit; determining, if the number of instruction per cycle being issued to the instruction scheduling unit is less than a threshold level, and then determining if at least two of the instructions being issued to the instruction scheduling unit are independent of each other only when the instructions per cycle is less than the threshold level; determining when at least two of the instructions being issued to the instruction scheduling unit are independent of each other; and power gating the microprocessor to gate off power to idle macros with a signal from the state machine.
摘要翻译：一种具有指令调度单元的微处理器的电源门控方法，用于从指令解码器接收发出的指令; 执行单元从指令调度单元接收和发送信号; 和状态机。该方法包括：获得每个周期的指令数量，发出给指令调度单元; 确定如果发出给指令调度单元的每个周期的指令数量小于阈值水平，然后确定发出到指令调度单元的至少两个指令是否相互独立，只有当每个指令周期小于阈值水平; 确定发出到指令调度单元的指令中的至少两个是否彼此独立; 和电源门控微处理器通过来自状态机的信号关闭空闲宏的电源。

14. 发明申请

US20130204916A1 RESIDUE-BASED ERROR DETECTION FOR A PROCESSOR EXECUTION UNIT THAT SUPPORTS VECTOR OPERATIONS 有权
标题翻译：支持向导操作的处理器执行单元的基于残差的错误检测
公开(公告)号：US20130204916A1
公开(公告)日：2013-08-08
申请号：US13367032
申请日：2012-02-06
申请人： Maarten Boersma , Juergen Haess
发明人： Maarten Boersma , Juergen Haess
IPC分类号： G06F7/38
CPC分类号： G06F7/38 , G06F7/483 , G06F7/5443 , G06F7/72 , G06F11/1008
摘要： A residue generating circuit for an execution unit that supports vector operations includes an operand register and a residue generator coupled to the operand register. The residue generator includes a first residue generation tree coupled to a first section of the operand register and a second residue generation tree coupled to a second section of the operand register. The first residue generation tree is configured to generate a first residue for first data included in the first section of the operand register. The second residue generation tree is configured to generate a second residue for second data included in a second section of the operand register. The first section of the operand register includes a different number of register bits than the second section of the operand register. Configuring a residue-generation tree to be split into multiple residue generation trees facilitates residue checking multiple independent vector instruction operands within a full width dataflow in parallel or alternatively residue checking a full width operand of a standard instruction.
摘要翻译：用于支持向量操作的执行单元的残差产生电路包括耦合到操作数寄存器的操作数寄存器和残差发生器。残余生成器包括耦合到操作数寄存器的第一部分的第一残余生成树和耦合到操作数寄存器的第二部分的第二残留生成树。第一残差生成树被配置为为包括在操作数寄存器的第一部分中的第一数据产生第一残余。第二残差产生树被配置为产生包括在操作数寄存器的第二部分中的第二数据的第二残差。操作数寄存器的第一部分包括与操作数寄存器的第二部分不同的寄存器位数。配置要分割为多个残差生成树的残留生成树有助于在全宽数据流内并行检查多个独立向量指令操作数，或者替代残差检查标准指令的全宽操作数。

15. 发明申请

US20100228955A1 METHOD AND APPARATUS FOR IMPROVED POWER MANAGEMENT OF MICROPROCESSORS BY INSTRUCTION GROUPING 失效
标题翻译：通过指令分组改进微处理器功率管理的方法和装置
公开(公告)号：US20100228955A1
公开(公告)日：2010-09-09
申请号：US12397830
申请日：2009-03-04
申请人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
发明人： Tim Niggemeier , Harry Barowski , Maarten Boersma , Gunnar Spiess
IPC分类号： G06F9/312
CPC分类号： G06F1/3287 , G06F1/3206 , G06F1/3234 , G06F9/3836 , G06F9/3869 , G06F9/3871
摘要： A method of power gating a microprocessor having an instruction scheduling unit for receiving issued instructions from an instruction decode unit; an execution unit coupled to receive and send signals from and to the instruction scheduling unit; and a state machine located within the execution unit, the method comprises: obtaining a number of instructions per cycle being issued to the instruction scheduling unit; determining, subsequent to obtaining the number of instructions per cycle, if the number of instruction per cycle being issued to the instruction scheduling unit is less than a threshold level, and then determining if at least two of the instructions being issued to the instruction scheduling unit are independent of each other only when the instructions per cycle is less than the threshold level; determining when at least two of the instructions being issued to the instruction scheduling unit are independent of each other; and power gating the microprocessor to gate off power to idle macros with a signal from the state machine when the instructions are independent of each other without incurring significant loss of performance until an issue queue in the instruction scheduling unit is filled with instruction data.
摘要翻译：一种具有指令调度单元的微处理器的电源门控方法，用于从指令解码单元接收发出的指令; 执行单元，被耦合以从所述指令调度单元接收和发送信号; 以及位于所述执行单元内的状态机，所述方法包括：获取每个循环的指令数量，并发送给所述指令调度单元; 确定在每个周期获得指令数量之后，如果发出到指令调度单元的每个周期的指令数量小于阈值水平，然后确定是否发出至少两个指令发送到指令调度单元只有当每个周期的指令小于阈值水平时，它们彼此独立; 确定发出到指令调度单元的指令中的至少两个是否彼此独立; 以及当指令彼此独立而不引起显着的性能损失时，直到指令调度单元中的问题队列填充有指令数据，门控微处理器将来自状态机的信号关闭到空闲宏的电源。

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