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11. 发明申请

WO2010020065A1 METHOD FOR FABRICATING INGAN-BASED MULTI-QUANTUM WELL LAYERS 审中-公开
标题翻译：用于制造基于多元素的多层厚层的方法
公开(公告)号：WO2010020065A1
公开(公告)日：2010-02-25
申请号：PCT/CN2008/001488
申请日：2008-08-19
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , WANG, Li , MO, Chunlan , FANG, Wenqing
发明人： JIANG, Fengyi , WANG, Li , MO, Chunlan , FANG, Wenqing
IPC分类号： H01L33/30 , C23C16/34 , H01L33/04 , H01L21/205 , H01L21/365
CPC分类号： H01L21/0262 , H01L21/0254 , H01L33/007 , H01L33/06
摘要： A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.
摘要翻译：通过使用氮化镓铟（InGaN）半导体材料制造量子阱的方法包括在反应器室中以第一预定温度在层状III-V族氮化物结构中制造势阱，通过将反应器中的In前体气体注入到一种Ga前体气体。该方法还包括在制造势阱之后，终止Ga前体气体，保持In前体气体的流动，并将反应器室中的温度升高到第二预定温度，同时调节In前体气体流速从第一流量到第二流量。此外，该方法包括在维持第二流量的同时在第二预定温度下退火和稳定势阱。该方法还包括在恢复Ga前体气体的同时在第二预定温度下制造位于势阱上方的势垒。

12. 发明申请

WO2008128444A1 METHOD FOR OBTAINING HIGH-QUALITY BOUNDARY FOR SEMICONDUCTOR DEVICES FABRICATED ON A PARTITIONED SUBSTRATE 审中-公开
标题翻译：用于获取高分子边界的方法，用于在分离的基板上制作的半导体器件
公开(公告)号：WO2008128444A1
公开(公告)日：2008-10-30
申请号：PCT/CN2008/000902
申请日：2008-05-06
申请人： LATTICE POWER (JIANGXI) CORPORATION , WANG, Li , JIANG, Fengyi
发明人： WANG, Li , JIANG, Fengyi
IPC分类号： H01L33/00 , H01L21/301
CPC分类号： H01L33/007 , H01S5/32341 , H01S5/327
摘要： A process for obtaining high-quality boundaries for individual multilayer structures (114) which are fabricated on a trench-partitioned substrate is provided. The process comprises following steps: preparing a trench-partitioned substrate wherein the substrate surface is partitioned into arrays of isolated deposition platforms(108),which are separated by arrays of trenches(102); forming a multilayer structure(114), which comprises a first doped layer(204), an active layer(206), and a second doped layer(208), on one of the deposition platforms(108); removing sidewalls of the multilayer structures (114).A semiconductor device with high-quality boundaries obtained by removing sidewalls of the multilayer structures (114) is also provided.
摘要翻译：提供了制造在沟槽分隔的衬底上的单个多层结构（114）的高质量边界的方法。该方法包括以下步骤：制备沟槽分隔的衬底，其中衬底表面被分隔成由沟槽阵列（102）分开的隔离沉积平台（108）的阵列; 在所述沉积平台（108）之一上形成包括第一掺杂层（204），有源层（206）和第二掺杂层（208）的多层结构（114）。去除多层结构（114）的侧壁。还提供了通过去除多层结构（114）的侧壁获得的具有高质量边界的半导体器件。

13. 发明申请

WO2010020077A1 METHOD FOR FABRICATING INGAAIN LIGHT-EMITTING DEVICE ON A COMBINED SUBSTRATE 审中-公开
标题翻译：在组合衬底上制造激光发光器件的方法
公开(公告)号：WO2010020077A1
公开(公告)日：2010-02-25
申请号：PCT/CN2008/001510
申请日：2008-08-22
申请人： LATTICE POWER (JIANGXI) CORPORATION , XIONG, Chuanbing , JIANG, Fengyi , WANG, Li , ZHANG, Shaohua , WANG, Guping , WANG, Guangxu
发明人： XIONG, Chuanbing , JIANG, Fengyi , WANG, Li , ZHANG, Shaohua , WANG, Guping , WANG, Guangxu
IPC分类号： H01L33/00 , H01L21/20
CPC分类号： H01L21/0237 , H01L21/02439 , H01L21/02505 , H01L21/0254 , H01L33/0079 , H01L33/0095 , H01L33/44
摘要： One embodiment of the present invention provides a method for fabricating an InGaAlN light-emitting semiconductor structure. During the fabrication process, at least one single-crystal sacrificial layer is deposited on the surface of a base substrate to form a combined substrate, wherein the single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the single crystal layer forms a sacrificial layer. Next, the InGaAlN light-emitting semiconductor structure is fabricated on the combined substrate. The InGaAlN structure fabricated on the combined substrate is then transferred to a support substrate, thereby facilitating a vertical electrode configuration. Transferring the InGaAlN structure involves etching the single-crystal sacrificial layer with a chemical etchant. Furthermore, the InGaAlN and the base substrate are resistant to the chemical etchant. The base substrate can be reused after the InGaAlN structure is transferred.
摘要翻译：本发明的一个实施例提供一种制造InGaAlN发光半导体结构的方法。在制造过程中，至少一个单晶牺牲层沉积在基底表面上以形成组合衬底，其中单晶牺牲层与InGaAlN晶格匹配，其中单晶层形成牺牲层。接下来，在组合衬底上制造InGaAlN发光半导体结构。然后将在组合衬底上制造的InGaAlN结构转移到支撑衬底，从而有助于垂直电极配置。转移InGaAlN结构包括用化学蚀刻剂蚀刻单晶牺牲层。此外，InGaAlN和基底对化学蚀刻剂具有耐受性。在传输InGaAlN结构后，可以重新使用基底。

14. 发明申请

WO2010020069A1 METHOD FOR FABRICATING InGaAlN LIGHT-EMITTING DIODES WITH A METAL SUBSTRATE 审中-公开
标题翻译：用金属基材制造InGaAlN发光二极管的方法
公开(公告)号：WO2010020069A1
公开(公告)日：2010-02-25
申请号：PCT/CN2008/001493
申请日：2008-08-19
申请人： LATTICE POWER (JIANGXI) CORPORATION , XIONG, Chuanbing , JIANG, Fengyi , WANG, Li , FANG, Wenqing , WANG, Guping , ZHANG, Shaohua
发明人： XIONG, Chuanbing , JIANG, Fengyi , WANG, Li , FANG, Wenqing , WANG, Guping , ZHANG, Shaohua
IPC分类号： H01L33/00 , H01L21/20
CPC分类号： H01L33/0079 , H01L33/007 , H01L33/382 , H01L33/44
摘要： One embodiment of the present invention provides a method for fabricating light-emitting diodes. The method includes etching grooves on a growth substrate, thereby creating mesas on the growth substrate. The method further includes fabricating on each of the mesas an indium gallium aluminum nitride (InGaAlN) multilayer structure which contains a p-type layer, a multi-quantum-well layer, and an n-type layer. In addition, the method includes depositing one or more metal substrate layers on top of the InGaAlN multilayer structure. Moreover, the method includes removing the growth substrate. Furthermore, the method includes creating electrodes on both sides of the InGaAlN multilayer structure, thereby resulting in a vertical-electrode configuration.
摘要翻译：本发明的一个实施例提供一种制造发光二极管的方法。该方法包括在生长衬底上蚀刻凹槽，从而在生长衬底上形成台面。该方法还包括在每个台面上制造包含p型层，多量子阱层和n型层的铟镓铝氮化物（InGaAlN）多层结构。此外，该方法包括在InGaAlN多层结构的顶部上沉积一个或多个金属衬底层。此外，该方法包括去除生长衬底。此外，该方法包括在InGaAlN多层结构的两侧形成电极，从而形成垂直电极结构。

15. 发明申请

WO2010020066A1 METHOD FOR FABRICATING SEMICONDUCTOR LIGHT-EMITTING DEVICE WITH DOUBLE-SIDED PASSIVATION 审中-公开
标题翻译：用于制造具有双面钝化的半导体发光器件的方法
公开(公告)号：WO2010020066A1
公开(公告)日：2010-02-25
申请号：PCT/CN2008/001490
申请日：2008-08-19
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , WANG, Li
发明人： JIANG, Fengyi , WANG, Li
IPC分类号： H01L33/12
CPC分类号： H01L33/0079 , H01L33/44
摘要： A method for fabricating a semiconductor light-emitting device includes fabricating a multilayer semiconductor structure on a first substrate, wherein the multilayer semiconductor structure comprises a first doped semiconductor layer, an MQW active layer, a second doped semiconductor layer, and a first passivation layer. The method further involves patterning and etching part of the first passivation layer to expose the first doped semiconductor layer. A first electrode is then formed, which is coupled to the first doped semiconductor layer. Next, the multilayer structure is bonded to a second substrate; and the first substrate is removed. A second electrode is formed, which is coupled to the second doped semiconductor layer. Further, a second passivation layer is formed, which substantially covers the sidewalls of multilayer structure and part of the surface of the second doped semiconductor layer which is not covered by the second electrode.
摘要翻译：一种制造半导体发光器件的方法包括在第一衬底上制造多层半导体结构，其中所述多层半导体结构包括第一掺杂半导体层，MQW有源层，第二掺杂半导体层和第一钝化层。该方法还包括图案化和蚀刻第一钝化层的一部分以暴露第一掺杂半导体层。然后形成第一电极，其耦合到第一掺杂半导体层。接着，将多层结构体接合到第二基板上; 并且去除第一衬底。形成第二电极，其耦合到第二掺杂半导体层。此外，形成第二钝化层，其基本上覆盖多层结构的侧壁和第二掺杂半导体层的未被第二电极覆盖的部分表面。

16. 发明申请

WO2009000144A1 METHOD FOR FABRICATING A P-TYPE SEMICONDUCTOR STRUCTURE 审中-公开
标题翻译：制造P型半导体结构的方法
公开(公告)号：WO2009000144A1
公开(公告)日：2008-12-31
申请号：PCT/CN2008/000972
申请日：2008-05-20
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , WANG, Li , FANG, Wenqing , MO, Chunlan
发明人： JIANG, Fengyi , WANG, Li , FANG, Wenqing , MO, Chunlan
IPC分类号： H01L33/00
CPC分类号： H01L33/007 , H01L21/0254 , H01L21/02579 , H01L21/0262 , H01L33/325
摘要： A method for fabricating a group III-V p-type nitride structure.The method comprises growing a first layer of p-type group III-V material (204,301) with a first acceptor density in a first growing environment.The method further comprises growing a second layer of p-type group III-V material (205,302),which is thicker than the first layer (204,301) and which has a second acceptor density,on top of the first layer (204,301) in a second growing environment.In addition,the method comprises growing a third layer of p-type group III-V material (206,303),which is thinner than the second layer (205,302) and which has a third acceptor density,on top of the second layer (205,302) in a third growing enviroment. The invention further provides a LED which is fabricated by the said-above method.
摘要翻译：一种制造III-V族p型氮化物结构的方法，该方法包括在第一生长环境中以第一受体密度生长第一层p型III-V族材料（204,301）。该方法还包括生长在第二生长环境中，在第一层（204,301）的顶部上具有比第一层（204,301）厚且具有第二受主密度的第二层p型III-V族材料（205,302）。此外，该方法包括在第二层（205,302）的顶部上生长比第二层（205,302）薄且具有第三受体密度的第三层p型III-V族材料（206,303）第三个增长的环境。本发明还提供一种通过上述方法制造的LED。

17. 发明申请

WO2010020071A1 LIGHT-EMITTING DEVICE BASED ON STRAIN-ADJUSTABLE InGaAlN FILM 审中-公开
标题翻译：基于应变可变InGaAlN膜的发光器件
公开(公告)号：WO2010020071A1
公开(公告)日：2010-02-25
申请号：PCT/CN2008/001495
申请日：2008-08-19
申请人： LATTICE POWER (JIANGXI) CORPORATION , XIONG, Chuanbing , JIANG, Fengyi , FANG, Wenqing , WANG, Li , WANG, Guping
发明人： XIONG, Chuanbing , JIANG, Fengyi , FANG, Wenqing , WANG, Li , WANG, Guping
IPC分类号： H01L33/00 , H01L23/14 , H01L33/12 , H01L21/203 , H01L27/15
CPC分类号： H01L21/02458 , H01L21/02381 , H01L21/02505 , H01L21/0254 , H01L33/0079 , H01L33/44 , H01L33/46
摘要： A method for fabricating a semiconductor light-emitting device based on a strain adjustable multilayer semiconductor film is disclosed. The method includes epitaxially growing a multilayer semiconductor film on a growth substrate, wherein the multilayer semiconductor film comprises a first doped semiconductor layer, a second doped semiconductor layer, and a multi-quantum-wells (MQW) active layer; forming an ohmic-contact metal layer on the first doped semiconductor layer; depositing a metal substrate on top of the ohmic-contact metal layer, wherein the density and/or material composition of the metal substrate is adjustable along the vertical direction, thereby causing the strain in the multilayer semiconductor film to be adjustable; etching off the growth substrate; and forming an ohmic-electrode coupled to the second doped semiconductor layer.
摘要翻译：公开了一种用于制造基于应变可调多层半导体膜的半导体发光器件的方法。该方法包括在生长衬底上外延生长多层半导体膜，其中多层半导体膜包括第一掺杂半导体层，第二掺杂半导体层和多量子阱（MQW）有源层; 在所述第一掺杂半导体层上形成欧姆接触金属层; 在欧姆接触金属层的顶部上沉积金属衬底，其中金属衬底的密度和/或材料组成可沿着垂直方向调节，从而使多层半导体膜中的应变可调; 蚀刻生长衬底; 以及形成耦合到所述第二掺杂半导体层的欧姆电极。

18. 发明申请

WO2009026749A1 METHOD FOR FABRICATING A LOW-RESISTIVITY OHMIC CONTACT TO A P-TYPE III-V NITRIDE SEMICONDUCTOR MATERIAL AT LOW TEMPERATURE 审中-公开
标题翻译：在低温下制造P型III-V型氮化物半导体材料的低电阻OHMIC接触方法
公开(公告)号：WO2009026749A1
公开(公告)日：2009-03-05
申请号：PCT/CN2007/002617
申请日：2007-08-31
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , WANG, Li , FANG, Wenqing , MO, Chunlan
发明人： JIANG, Fengyi , WANG, Li , FANG, Wenqing , MO, Chunlan
IPC分类号： H01L33/00
CPC分类号： H01L33/0095 , H01L33/32 , H01L33/40
摘要： One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-tyep layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.
摘要翻译：本发明的一个实施例提供了一种用欧姆接触层制造III-V族氮化物结构的方法。该方法包括用p型层制造III-V族氮化物结构。该方法还包括在p型层上沉积欧姆接触层，而不首先退火p层。该方法还包括随后在预定温度下在退火室中退火预定时间段内的p型层和欧姆接触层，从而降低单次退火中p型层的电阻率和欧姆接触处理。

19. 发明申请

WO2007048346A1 SEMICONDUCTOR LIGHT-EMITTING DEVICE WITH METAL SUPPORT SUBSTRATE 审中-公开
标题翻译：具有金属支撑衬底的半导体发光器件
公开(公告)号：WO2007048346A1
公开(公告)日：2007-05-03
申请号：PCT/CN2006/002871
申请日：2006-10-26
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , XIONG, Chuanbing , FANG, Wenqing , WANG, Li
发明人： JIANG, Fengyi , XIONG, Chuanbing , FANG, Wenqing , WANG, Li
IPC分类号： H01L33/00
CPC分类号： H01L33/0079 , H01L33/32 , H01L33/40 , H01L33/641
摘要： One embodiment of the present invention provides a semiconductor light- emitting device which includes a multilayer structure. The multilayer structure comprises a first doped layer, an active layer, and a second doped layer. The semiconductor light-emitting device further includes a first Ohmic-contact layer configured to form a conductive path to the first doped layer, a second Ohmic-contact layer configured to form a conductive path to the second doped layer, and a support substrate comprising not less than 15% chromium (Cr) measured in weight percentage.
摘要翻译：本发明的一个实施例提供一种包括多层结构的半导体发光器件。多层结构包括第一掺杂层，有源层和第二掺杂层。所述半导体发光器件还包括配置成形成到所述第一掺杂层的导电路径的第一欧姆接触层，被配置为形成到所述第二掺杂层的导电路径的第二欧姆接触层，以及不包括小于15％的铬（Cr）以重量百分比测量。

20. 发明申请

WO2009046577A1 METHOD FOR FABRICATING AN N-TYPE SEMICONDUCTOR MATERIAL USING SILANE AS A PRECURSOR 审中-公开
标题翻译：使用硅烷作为前驱体制备N型半导体材料的方法
公开(公告)号：WO2009046577A1
公开(公告)日：2009-04-16
申请号：PCT/CN2007/002946
申请日：2007-10-12
申请人： LATTICE POWER (JIANGXI) CORPORATION , JIANG, Fengyi , WANG, Li , MO, Chunlan , FANG, Wenqing
发明人： JIANG, Fengyi , WANG, Li , MO, Chunlan , FANG, Wenqing
IPC分类号： C23C16/34 , H01L21/205 , H01L33/00
CPC分类号： H01L21/02576 , H01L21/02378 , H01L21/02381 , H01L21/0242 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L33/007
摘要： A method for fabricating a group III-V n-type nitride structure comprises fabricating a growth Si substrate and then depositing a group III-V n-type layer above the Si substrate using silane gas (SiH 4 ) as a precursor at a flow rate set to a first predetermined value (210). Subsequently, the SiH 4 flow rate is reduced to a second predetermined value during the fabrication of the n-type layer (220). The method also comprises forming a multi-quantum-well active region above the n-type layer. In addition, the flow rate is reduced over a predetermined period of time, and the second predetermined value is reached at a predetermined, sufficiently small distance from the interface between the n-type layer and the active region (230).
摘要翻译：制备III-V族氮化物结构的方法包括制造生长Si衬底，然后使用硅烷气体（SiH 4）作为前体在流速设定下沉积Si衬底上的III-V族III型层到第一预定值（210）。随后，在制造n型层（220）期间，将SiH 4流量减小到第二预定值。该方法还包括在n型层上形成多量子阱有源区。此外，在预定时间段内减小流量，并且在与n型层和有源区域（230）之间的界面预定的足够小的距离处达到第二预定值。

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