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11. 发明授权

US07644293B2 Method and apparatus for dynamically controlling power management in a distributed system 失效
标题翻译：在分布式系统中动态控制电源管理的方法和装置
公开(公告)号：US07644293B2
公开(公告)日：2010-01-05
申请号：US11479438
申请日：2006-06-29
申请人： Krishnakanth Sistla , Steven R. Hutsell , Yen-Cheng Liu
发明人： Krishnakanth Sistla , Steven R. Hutsell , Yen-Cheng Liu
IPC分类号： G06F1/32
CPC分类号： G06F1/3275 , G06F1/3209 , Y02D10/13 , Y02D10/14
摘要： According to one embodiment of the invention, an activity detector comprises a resource partitioned into a plurality of chunks, a power controller and an activity detection unit. In communication with the activity detector and the resource, the power controller, based on measured activity by the activity detector, activates an additional chunk of the plurality of chunks and assigned the additional chunk to a specified agent or deactivates at least one chunk of the plurality of chunks.
摘要翻译：根据本发明的一个实施例，活动检测器包括被划分成多个块的资源，功率控制器和活动检测单元。在与活动检测器和资源通信的情况下，功率控制器基于活动检测器测量的活动，激活多个块中的附加块并且将附加块分配给指定的代理或者去激活多个块中的至少一个块的块。

12. 发明申请

US20090006871A1 METHOD, SYSTEM, AND APPARATUS FOR A CORE ACTIVITY DETECTOR TO FACILITATE DYNAMIC POWER MANAGEMENT IN A DISTRIBUTED SYSTEM 有权
标题翻译：一种核心活动检测器在分布式系统中动态动态管理的方法，系统和装置
公开(公告)号：US20090006871A1
公开(公告)日：2009-01-01
申请号：US11770618
申请日：2007-06-28
申请人： Yen-Cheng Liu , Steven R. Hutsell , Krishnakanth Sistla
发明人： Yen-Cheng Liu , Steven R. Hutsell , Krishnakanth Sistla
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , H04W52/028 , Y02D70/00
摘要： A system and method to provide source controlled dynamic power management. An activity detector in a source determines expected future resource usage. Based on that expected usage, the source generates a power management command and sends that command to a destination. The destination then adjusts the power level of the resource based in the command.
摘要翻译：一种提供源控制动态电源管理的系统和方法。源中的活动检测器确定将来的资源使用量。根据该预期用途，源产生电源管理命令并将该命令发送到目的地。然后，目标将根据命令调整资源的功率级别。

13. 发明申请

US20120089850A1 Optimizing Power Usage By Factoring Processor Architectural Events To PMU 有权
标题翻译：通过将处理器架构事件归因于PMU来优化功耗
公开(公告)号：US20120089850A1
公开(公告)日：2012-04-12
申请号：US13329700
申请日：2011-12-19
申请人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
发明人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
IPC分类号： G06F1/26
CPC分类号： G06F1/3243 , G06F1/206 , G06F1/3203 , G06F1/3206 , G06F1/324 , G06F1/3275 , G06F1/3287 , G06F12/0811 , G06F15/80 , G06F2212/283 , G11C7/1072 , G11C7/1075 , Y02D10/16
摘要： A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.
摘要翻译：公开了一种监视架构事件的方法和装置。架构事件通过推送总线机制链接在一起，每个架构事件都具有指定的时隙。在每个核心中至少有一个分支的推送总线。推送总线的每个分支可以监视一个核心与所有的架构事件。然后将通过推送总线从事件收集的所有数据发送到电源控制单元。

14. 发明申请

US20080002603A1 Method and apparatus to dynamically adjust resource power usage in a distributed system 有权
标题翻译：在分布式系统中动态调整资源使用的方法和装置
公开(公告)号：US20080002603A1
公开(公告)日：2008-01-03
申请号：US11479009
申请日：2006-06-29
申请人： Steven R. Hutsell , Krishnakanth Sistla , Yen-cheng Liu
发明人： Steven R. Hutsell , Krishnakanth Sistla , Yen-cheng Liu
IPC分类号： H04B7/185
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171
摘要： A system and method to provide source controlled dynamic power management. An activity detector in a source determines expected future resource usage. Based on that expected usage, the source generates a power management command and sends that command to a destination. The destination then adjusts the power level of the resource based in the command.
摘要翻译：一种提供源控制动态电源管理的系统和方法。源中的活动检测器确定将来的资源使用量。根据该预期用途，源产生电源管理命令并将该命令发送到目的地。然后，目标将根据命令调整资源的功率级别。

15. 发明授权

US08473766B2 Optimizing power usage by processor cores based on architectural events 有权
标题翻译：基于架构事件优化处理器内核的功耗
公开(公告)号：US08473766B2
公开(公告)日：2013-06-25
申请号：US13609006
申请日：2012-09-10
申请人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
发明人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
IPC分类号： G06F1/00
CPC分类号： G06F1/3243 , G06F1/206 , G06F1/3203 , G06F1/3206 , G06F1/324 , G06F1/3275 , G06F1/3287 , G06F12/0811 , G06F15/80 , G06F2212/283 , G11C7/1072 , G11C7/1075 , Y02D10/16
摘要： A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.
摘要翻译：公开了一种监视架构事件的方法和装置。架构事件通过推送总线机制链接在一起，每个架构事件都具有指定的时隙。在每个核心中至少有一个分支的推送总线。推送总线的每个分支可以监视一个核心与所有的架构事件。然后将通过推送总线从事件收集的所有数据发送到电源控制单元。

16. 发明申请

US20130031400A1 OPTIMIZING POWER USAGE BY PROCESSOR CORES BASED ON ARCHITECTURAL EVENTS 有权
标题翻译：基于建筑事件处理器优化功率使用
公开(公告)号：US20130031400A1
公开(公告)日：2013-01-31
申请号：US13609006
申请日：2012-09-10
申请人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
发明人： Yen-Cheng Liu , P. Keong Or , Krishnakanth Sistla , Ganapati Srinivasa
IPC分类号： G06F1/28
CPC分类号： G06F1/3243 , G06F1/206 , G06F1/3203 , G06F1/3206 , G06F1/324 , G06F1/3275 , G06F1/3287 , G06F12/0811 , G06F15/80 , G06F2212/283 , G11C7/1072 , G11C7/1075 , Y02D10/16
摘要： A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.
摘要翻译：公开了一种监视架构事件的方法和装置。架构事件通过推送总线机制链接在一起，每个架构事件都具有指定的时隙。在每个核心中至少有一个分支的推送总线。推送总线的每个分支可以监视一个核心与所有的架构事件。然后将通过推送总线从事件收集的所有数据发送到电源控制单元。

17. 发明申请

US20080244195A1 METHODS AND APPARATUSES TO SUPPORT MEMORY TRANSACTIONS USING PARTIAL PHYSICAL ADDRESSES 有权
标题翻译：使用部分物理地址支持存储交易的方法和设备
公开(公告)号：US20080244195A1
公开(公告)日：2008-10-02
申请号：US11694999
申请日：2007-03-31
申请人： Krishnakanth Sistla , Yen-Cheng Liu
发明人： Krishnakanth Sistla , Yen-Cheng Liu
IPC分类号： G06F12/00
CPC分类号： G06F12/0831 , G06F12/0813 , G06F2212/1016
摘要： Methods and apparatuses to support memory transactions using partial physical addresses are disclosed. Method embodiments generally comprise home agents monitoring multiple responses to multiple memory requests, wherein at least one of the responses has a partial address for a memory line, resolving conflicts for the memory requ'fvests, and suspending conflict resolution for the memory requests which match partial address responses until determining the full address. Apparatus embodiments generally comprise a home agent having a response monitor and a conflict resolver. The response monitor may observe a snoop response of a memory agent, wherein the snoop response only has a partial address and is for a memory line of a memory agent. The conflict resolver may suspend conflict resolution for memory transactions which match the partial address of the memory line until the conflict resolver receives a full address for the memory line.
摘要翻译：公开了使用部分物理地址来支持存储器事务的方法和装置。方法实施例通常包括监视对多个存储器请求的多个响应的归属代理，其中响应中的至少一个具有用于存储器线的部分地址，解决用于存储器请求的冲突，以及暂停与部分匹配的存储器请求的冲突解决在确定完整的地址之前应对响应。装置实施例通常包括具有响应监视器和冲突解决器的归属代理。响应监视器可以观察存储器代理的窥探响应，其中侦听响应仅具有部分地址，并且用于存储器代理的存储器线。冲突解决程序可能会暂停与内存条的部分地址匹配的内存事务的冲突解决，直到冲突解决程序接收到存储器行的完整地址为止。

18. 发明申请

US20070005899A1 Processing multicore evictions in a CMP multiprocessor 审中-公开
标题翻译：在CMP多处理器中处理多核驱逐
公开(公告)号：US20070005899A1
公开(公告)日：2007-01-04
申请号：US11173919
申请日：2005-06-30
申请人： Krishnakanth Sistla , Yen-Cheng Liu , Zhong-Ning Cai
发明人： Krishnakanth Sistla , Yen-Cheng Liu , Zhong-Ning Cai
IPC分类号： G06F12/00 , G06F13/28
CPC分类号： G06F12/0824 , G06F12/0811 , G06F12/084 , G06F12/12 , G06F2212/507
摘要： A method and apparatus for improving snooping performance is disclosed. One embodiment provides mechanisms for processing multi-core evictions in a multi-core inclusive shared cache processor. By using parallel eviction state machine, the latency of eviction processing is minimized. Another embodiment provides mechanisms for processing multi-core evictions in a multi-core inclusive shared cache processor in the presence of external conflicts.
摘要翻译：公开了一种用于提高窥探性能的方法和装置。一个实施例提供了用于在多核包含共享高速缓存处理器中处理多核驱逐的机制。通过使用并行驱逐状态机，驱逐处理的延迟最小化。另一实施例提供了在存在外部冲突的情况下在多核包容共享高速缓存处理器中处理多核驱逐的机制。

19. 发明申请

US20060282622A1 Method and apparatus for improving snooping performance in a multi-core multi-processor 审中-公开
标题翻译：在多核多处理器中提高窥探性能的方法和装置
公开(公告)号：US20060282622A1
公开(公告)日：2006-12-14
申请号：US11153031
申请日：2005-06-14
申请人： Krishnakanth Sistla , Yen-Cheng Liu , Zhong-Ning Cai
发明人： Krishnakanth Sistla , Yen-Cheng Liu , Zhong-Ning Cai
IPC分类号： G06F13/28
CPC分类号： G06F12/084 , G06F12/0811 , G06F12/0831
摘要： A method and apparatus for improving snooping performance is disclosed. In one embodiment, one or more content addressable matches are used to determine where and when an address conflict occurs. Depending upon the timing, a read request or a snoop request may be set for retry. In another embodiment, an age order matrix may be used to determine when several core snoop requests may be issued during a same time period, so that the snoops may be processed during this time period.
摘要翻译：公开了一种用于提高窥探性能的方法和装置。在一个实施例中，使用一个或多个内容可寻址匹配来确定发生地址冲突的地点和时间。根据定时，可以设置读请求或窥探请求以重试。在另一个实施例中，可以使用年龄订单矩阵来确定何时可以在相同时间段期间发出几个核心窥探请求，以便在该时间段期间可以处理窥探。

20. 发明授权

US08705311B2 Forming multiprocessor systems using dual processors 失效
标题翻译：形成使用双处理器的多处理器系统
公开(公告)号：US08705311B2
公开(公告)日：2014-04-22
申请号：US13422806
申请日：2012-03-16
申请人： Krishnakanth Sistla , Ganapati Srinivasa
发明人： Krishnakanth Sistla , Ganapati Srinivasa
IPC分类号： G11C8/00 , G06F13/00 , G06F1/12
CPC分类号： G06F15/17337 , G06F12/0817 , G06F12/0831
摘要： In one embodiment, link logic of a multi-chip processor (MCP) formed using multiple processors may interface with a first point-to-point (PtP) link coupled between the MCP and an off-package agent and another PtP link coupled between first and second processors of the MCP, where the on-package PtP link operates at a greater bandwidth than the first PtP link. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，使用多个处理器形成的多芯片处理器（MCP）的链路逻辑可以与耦合在MCP和非封装代理之间的第一点对点（PtP）链路以及耦合在第一和MCP的第二个处理器，其中的封装PtP链路以比第一个PtP链路更大的带宽工作。描述和要求保护其他实施例。

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