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11. 发明申请

US20080186291A1 Display device 有权
标题翻译：显示设备
公开(公告)号：US20080186291A1
公开(公告)日：2008-08-07
申请号：US11902740
申请日：2007-09-25
申请人： Katsumi Matsumoto , Kozo Yasuda , Hiroshi Kageyama
发明人： Katsumi Matsumoto , Kozo Yasuda , Hiroshi Kageyama
IPC分类号： G06F3/038
CPC分类号： G09G3/3688
摘要： The present invention is to prevent a capture error of display data caused by a delay due to a built-in driving circuit in a display device with a built-in driving circuit. The display device comprises: a display area having a plurality of sub pixels; and a driving circuit formed at the periphery of the display area; wherein the driving circuit includes: a first scanning circuit that performs scanning in a first direction; and a latch circuit which latches display data inputted from external based on a scanning output outputted from the first scanning circuit; wherein the driving circuit includes a timing correction circuit which corrects the timing of level change of the scanning output outputted from the first scanning circuit based on a display data synchronization clock inputted from external; wherein the latch circuit latches display data by means of a corrected scanning output outputted from the timing correction circuit; and wherein a transmission line up to the latch circuit of the display data and a transmission line up to the timing correction circuit of the display data synchronization clock are adjacently arranged.
摘要翻译：本发明是为了防止在具有内置驱动电路的显示装置中由于内置驱动电路引起的延迟引起的显示数据的捕获误差。显示装置包括：具有多个子像素的显示区域; 以及形成在所述显示区域的周围的驱动电路; 其中所述驱动电路包括：第一扫描电路，其沿第一方向执行扫描; 以及锁存电路，其基于从所述第一扫描电路输出的扫描输出来锁存从外部输入的显示数据; 其中驱动电路包括一个定时校正电路，该定时校正电路根据从外部输入的显示数据同步时钟校正从第一扫描电路输出的扫描输出的电平变化的定时; 其中所述锁存电路通过从所述定时校正电路输出的经校正的扫描输出来锁存显示数据; 并且其中直到直到显示数据的锁存电路的传输线和直到显示数据同步时钟的定时校正电路的传输线相邻布置。

12. 发明授权

US08102353B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08102353B2
公开(公告)日：2012-01-24
申请号：US11902740
申请日：2007-09-25
申请人： Katsumi Matsumoto , Kozo Yasuda , Hiroshi Kageyama
发明人： Katsumi Matsumoto , Kozo Yasuda , Hiroshi Kageyama
IPC分类号： G09G3/36
CPC分类号： G09G3/3688
摘要： The present invention is to prevent a capture error of display data caused by a delay due to a built-in driving circuit in a display device with a built-in driving circuit. The display device comprises: a display area having a plurality of sub pixels; and a driving circuit formed at the periphery of the display area; wherein the driving circuit includes: a first scanning circuit that performs scanning in a first direction; and a latch circuit which latches display data inputted from external based on a scanning output outputted from the first scanning circuit; wherein the driving circuit includes a timing correction circuit which corrects the timing of level change of the scanning output outputted from the first scanning circuit based on a display data synchronization clock inputted from external; wherein the latch circuit latches display data by means of a corrected scanning output outputted from the timing correction circuit; and wherein a transmission line up to the latch circuit of the display data and a transmission line up to the timing correction circuit of the display data synchronization clock are adjacently arranged.
摘要翻译：本发明是为了防止在具有内置驱动电路的显示装置中由于内置驱动电路引起的延迟引起的显示数据的捕获误差。显示装置包括：具有多个子像素的显示区域; 以及形成在所述显示区域的周围的驱动电路; 其中所述驱动电路包括：第一扫描电路，其沿第一方向执行扫描; 以及锁存电路，其基于从所述第一扫描电路输出的扫描输出来锁存从外部输入的显示数据; 其中驱动电路包括一个定时校正电路，该定时校正电路根据从外部输入的显示数据同步时钟校正从第一扫描电路输出的扫描输出的电平变化的定时; 其中所述锁存电路通过从所述定时校正电路输出的经校正的扫描输出来锁存显示数据; 并且其中直到直到显示数据的锁存电路的传输线和直到显示数据同步时钟的定时校正电路的传输线相邻布置。

13. 发明授权

US08456401B2 Display device 有权
公开(公告)号：US08456401B2
公开(公告)日：2013-06-04
申请号：US12222339
申请日：2008-08-07
申请人： Katsumi Matsumoto , Kozo Yasuda , Yasukazu Kimura , Takuo Kaitoh , Toshihiko Itoga , Hiroshi Kageyama
发明人： Katsumi Matsumoto , Kozo Yasuda , Yasukazu Kimura , Takuo Kaitoh , Toshihiko Itoga , Hiroshi Kageyama
IPC分类号： G09G3/36 , H01L31/00 , H01L31/036
CPC分类号： H01L29/78618 , G02F1/13454 , G02F2001/13685 , G02F2202/104 , H01L27/12 , H01L29/78645 , H01L29/78696
摘要： The gate electrode is formed above the polycrystalline semiconductor layer through the gate insulating film. The polycrystalline semiconductor layer includes a first region overlapping with the gate electrode in plan view. The first region is sandwiched between the second region and the third region. The second region of the polycrystalline semiconductor layer includes a first impurity diffusion region and two second impurity diffusion regions opposite in conductivity type to the first impurity diffusion region. The first region and the first impurity diffusion region are in contact with each other at a first boundary. The first region and the two second impurity diffusion regions are in contact with each other at second boundaries. The two second impurity diffusion regions sandwiching the first impurity diffusion region are provided along the gate electrode. Thus, a leak current is suppressed.

14. 发明申请

US20090073149A1 Display device 有权
标题翻译：显示设备
公开(公告)号：US20090073149A1
公开(公告)日：2009-03-19
申请号：US12222339
申请日：2008-08-07
申请人： Katsumi Matsumoto , Kozo Yasuda , Yasukazu Kimura , Takuo Kaitoh , Toshihiko Itoga , Hiroshi Kageyama
发明人： Katsumi Matsumoto , Kozo Yasuda , Yasukazu Kimura , Takuo Kaitoh , Toshihiko Itoga , Hiroshi Kageyama
IPC分类号： G09G5/00 , H01L29/04
CPC分类号： H01L29/78618 , G02F1/13454 , G02F2001/13685 , G02F2202/104 , H01L27/12 , H01L29/78645 , H01L29/78696
摘要： The gate electrode is formed above the polycrystalline semiconductor layer through the gate insulating film. The polycrystalline semiconductor layer includes a first region overlapping with the gate electrode in plan view. The first region is sandwiched between the second region and the third region. The second region of the polycrystalline semiconductor layer includes a first impurity diffusion region and two second impurity diffusion regions opposite in conductivity type to the first impurity diffusion region. The first region and the first impurity diffusion region are in contact with each other at a first boundary. The first region and the two second impurity diffusion regions are in contact with each other at second boundaries. The two second impurity diffusion regions sandwiching the first impurity diffusion region are provided along the gate electrode. Thus, a leak current is suppressed.
摘要翻译：栅电极通过栅极绝缘膜形成在多晶半导体层的上方。多晶半导体层包括在平面图中与栅电极重叠的第一区域。第一区域夹在第二区域和第三区域之间。多晶半导体层的第二区域包括第一杂质扩散区域和与第一杂质扩散区域相反的导电类型的两个第二杂质扩散区域。第一区域和第一杂质扩散区域在第一边界处彼此接触。第一区域和第二第二杂质扩散区域在第二边界处彼此接触。夹着第一杂质扩散区的两个第二杂质扩散区沿着栅电极设置。因此，泄漏电流被抑制。

15. 发明申请

US20120074298A1 PHOTOSENSOR AND PHOTOSENSOR ARRAY 有权
标题翻译：摄影机和摄影机阵列
公开(公告)号：US20120074298A1
公开(公告)日：2012-03-29
申请号：US13241934
申请日：2011-09-23
申请人： Toshio MIYAZAWA , Atsushi Hasegawa , Terunori Saitou , Kozo Yasuda , Takeshi Yonekura
发明人： Toshio MIYAZAWA , Atsushi Hasegawa , Terunori Saitou , Kozo Yasuda , Takeshi Yonekura
IPC分类号： H01L27/146 , H01L31/028 , H01L31/0376 , H01L31/0224
CPC分类号： H01L27/1461 , H01L27/14692
摘要： A photosensor includes a lower electrode formed of a metal film, an amorphous silicon film disposed on the lower electrode, an n-type amorphous silicon film disposed on the amorphous silicon film, an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage, a capacitive element connected between the lower electrode and a second reference voltage, a switch circuit that inputs a first supply voltage to the lower electrode in an on-state, and puts the lower electrode into a floating state in an off-state, and a detector circuit that detects a voltage change in the lower electrode after irradiating the amorphous silicon film for a given period with light when the switch circuit is on.
摘要翻译：光传感器包括由金属膜形成的下电极，设置在下电极上的非晶硅膜，设置在非晶硅膜上的n型非晶硅膜，设置在n型非晶硅膜上的上电极并且接收第一参考电压，连接在下电极和第二参考电压之间的电容元件，在导通状态下向下电极输入第一电源电压并将下电极置于浮置状态的开关电路处于断开状态的检测电路，以及检测电路，其在开关电路导通时用光照射给定期间的非晶硅膜后，检测下部电极的电压变化。

16. 发明申请

US20110216214A1 PHOTOSENSOR DEVICE 有权
标题翻译：摄影器件
公开(公告)号：US20110216214A1
公开(公告)日：2011-09-08
申请号：US13041645
申请日：2011-03-07
申请人： Kozo Yasuda , Toshio Miyazawa
发明人： Kozo Yasuda , Toshio Miyazawa
IPC分类号： H04N5/228
CPC分类号： H04N5/228 , Y02E10/50
摘要： The present invention provides a photosensor device including: a photodiode array in which photodiodes are arranged in an array shape; scanning lines which are coupled to first electrodes of the photodiodes in respective lines of the photodiode array; read lines which are coupled to second electrodes of the photodiodes in respective columns of the photodiode array; a scanning circuit which is coupled to the scanning lines and sequentially supplies a selected scanning signal to the respective scanning lines in each horizontal scanning period; and a signal processing circuit which is coupled to the read lines and loads each voltage fluctuation of the read lines in one horizontal scanning period as signal voltage when reading a signal, wherein each of the photodiodes is made of amorphous silicon or microcrystal silicon, and forward bias voltage is applied to each of the photodiodes when reading a signal.
摘要翻译：本发明提供一种光电传感器装置，包括：光电二极管阵列，其中光电二极管排列成阵列形状; 扫描线，其耦合到光电二极管阵列的各行中的光电二极管的第一电极; 读取线，其耦合到光电二极管阵列的各个列中的光电二极管的第二电极; 扫描电路，耦合到扫描线，并且在每个水平扫描周期中顺序地将所选择的扫描信号提供给各扫描线; 以及信号处理电路，其耦合到读取线并且在读取信号时在一个水平扫描周期中将读取线的每个电压波动加载为信号电压，其中每个光电二极管由非晶硅或微晶硅制成，并且向前当读取信号时，偏置电压施加到每个光电二极管。

17. 发明申请

US20060221033A1 Display device 审中-公开
标题翻译：显示设备
公开(公告)号：US20060221033A1
公开(公告)日：2006-10-05
申请号：US11378309
申请日：2006-03-20
申请人： Kozo Yasuda , Toshio Miyazawa , Hiroyuki Abe
发明人： Kozo Yasuda , Toshio Miyazawa , Hiroyuki Abe
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/2074 , G09G3/3614 , G09G3/3677 , G09G3/3688 , G09G2300/0809 , G09G2300/0814 , G09G2300/0842 , G09G2300/0857 , G09G2330/021
摘要： In a display device which arranges a memory part for every display pixel, an erroneous operation of the memory part and the power consumption can be reduced. In a display device provided with a display panel which includes a plurality of display pixels, video lines which apply video data to the display pixels, and scanning lines which apply a scanning voltage to the display pixels, the display pixel includes a memory part which stores the video data, a pixel electrode, and a switching part which selectively applies a first video voltage or a second video voltage which differs from the first video voltage to the pixel electrode in response to the video data stored in the memory part.
摘要翻译：在为每个显示像素配置存储器部分的显示装置中，可以减少存储部件的错误操作和功耗。在设置有显示面板的显示装置中，显示面板包括多个显示像素，将视频数据应用于显示像素的视频线以及对显示像素施加扫描电压的扫描线，显示像素包括存储部视频数据，像素电极和切换部分，其响应于存储在存储器部分中的视频数据，选择性地将与第一视频电压不同的第一视频电压或第二视频电压施加到像素电极。

18. 发明授权

US08576314B2 Photosensor device 有权
标题翻译：光电传感器设备
公开(公告)号：US08576314B2
公开(公告)日：2013-11-05
申请号：US13041645
申请日：2011-03-07
申请人： Kozo Yasuda , Toshio Miyazawa
发明人： Kozo Yasuda , Toshio Miyazawa
IPC分类号： H01L31/062 , H04N3/14
CPC分类号： H04N5/228 , Y02E10/50
摘要： The present invention provides a photosensor device including: a photodiode array in which photodiodes are arranged in an array shape; scanning lines which are coupled to first electrodes of the photodiodes in respective lines of the photodiode array; read lines which are coupled to second electrodes of the photodiodes in respective columns of the photodiode array; a scanning circuit which is coupled to the scanning lines and sequentially supplies a selected scanning signal to the respective scanning lines in each horizontal scanning period; and a signal processing circuit which is coupled to the read lines and loads each voltage fluctuation of the read lines in one horizontal scanning period as signal voltage when reading a signal, wherein each of the photodiodes is made of amorphous silicon or microcrystal silicon, and forward bias voltage is applied to each of the photodiodes when reading a signal.
摘要翻译：本发明提供一种光电传感器装置，包括：光电二极管阵列，其中光电二极管排列成阵列形状; 扫描线，其耦合到光电二极管阵列的各行中的光电二极管的第一电极; 读取线，其耦合到光电二极管阵列的各个列中的光电二极管的第二电极; 扫描电路，耦合到扫描线，并且在每个水平扫描周期中顺序地将所选择的扫描信号提供给各扫描线; 以及信号处理电路，其耦合到读取线并且在读取信号时在一个水平扫描周期中将读取线的每个电压波动加载为信号电压，其中每个光电二极管由非晶硅或微晶硅制成，并且向前当读取信号时，偏置电压施加到每个光电二极管。

19. 发明申请

US20080204619A1 Display device 审中-公开
标题翻译：显示设备
公开(公告)号：US20080204619A1
公开(公告)日：2008-08-28
申请号：US12071342
申请日：2008-02-20
申请人： Terunori Saitou , Yoshiharu Owaku , Kozo Yasuda , Toshio Miyazawa
发明人： Terunori Saitou , Yoshiharu Owaku , Kozo Yasuda , Toshio Miyazawa
IPC分类号： G02F1/1343 , H01L27/02 , H01J1/62
CPC分类号： G02F1/136204 , G02F1/13454 , H01L27/1214
摘要： A display device in which gate drive circuits are formed at both sides of an effective screen, and a static charge shield conductive film is formed to cover the gate drive circuits. In the manufacturing step and after producing the display device, the constant voltage is applied to the static charge shield conductive film via the common pad, the earth connection line and the like.
摘要翻译：一种显示装置，其中栅极驱动电路形成在有效屏幕的两侧，并且形成静电荷屏蔽导电膜以覆盖栅极驱动电路。在制造步骤中，在制造显示装置之后，通过公共焊盘，接地线等将恒定电压施加到静电电荷屏蔽导电膜。

20. 发明授权

US08963064B2 Photosensor having upper and lower electrodes with amorphous silicon film and n-type amorphous silicon film therebetween and photosensor array 有权
标题翻译：光电传感器具有具有非晶硅膜的上电极和下电极以及其间的n型非晶硅膜和光电传感器阵列
公开(公告)号：US08963064B2
公开(公告)日：2015-02-24
申请号：US13239754
申请日：2011-09-22
申请人： Takeshi Yonekura , Toshio Miyazawa , Atsushi Hasegawa , Terunori Saitou , Kozo Yasuda
发明人： Takeshi Yonekura , Toshio Miyazawa , Atsushi Hasegawa , Terunori Saitou , Kozo Yasuda
IPC分类号： H01L27/00 , H01L27/146 , H01L31/08 , H01L31/103
CPC分类号： H01L27/14649 , H01L27/1461 , H01L31/08 , H01L31/103
摘要： A photosensor array includes plural photosensor pixels. Each of the photosensor pixels includes a lower electrode, an amorphous silicon film, an n-type amorphous silicon film, and an upper electrode. The photosensor array includes plural scanning lines connected to the upper electrodes, plural read lines connected to the lower electrodes, a scanning circuit that is connected to the plural scanning lines, and sequentially supplies a selection scanning signal of a first voltage to the respective scanning lines, a first unit that inputs a second voltage higher than the first voltage to the plural read lines in a blanking period of one horizontal scanning period, and thereafter puts the plural read lines into the floating state, and a second unit that outputs a voltage change in each of the read lines within one horizontal scanning period as the sensor output voltage of the photosensor pixel.
摘要翻译：光传感器阵列包括多个光电传感器像素。每个光传感器像素包括下电极，非晶硅膜，n型非晶硅膜和上电极。光传感器阵列包括连接到上电极的多个扫描线，连接到下电极的多个读取线，连接到多个扫描线的扫描电路，并且将扫描线顺序地提供给各扫描线的第一电压的选择扫描信号第一单元，在一个水平扫描周期的消隐期间，将多个读取行的第二电压输入到多个读取行，之后将多条读取线置于浮置状态，第二单元输出电压变化在一个水平扫描周期内的每个读取行中，作为光电传感器像素的传感器输出电压。

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