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11. 外观设计

USD502607S1 Electric massaging chair 失效
标题翻译：电动按摩椅
公开(公告)号：USD502607S1
公开(公告)日：2005-03-08
申请号：US29194819
申请日：2003-12-01
申请人： Yoshiyuki Miyake , Jiro Kobayashi , Taro Mochida , Junichi Yamada , Nobutaka Kato
设计人： Yoshiyuki Miyake , Jiro Kobayashi , Taro Mochida , Junichi Yamada , Nobutaka Kato

12. 发明授权

US06438020B1 Ferroelectric memory device having an internal supply voltage, which is lower than the external supply voltage, supplied to the memory cells 有权
标题翻译：提供给存储单元的具有低于外部电源电压的内部电源电压的铁电存储器件
公开(公告)号：US06438020B1
公开(公告)日：2002-08-20
申请号：US09651104
申请日：2000-08-30
申请人： Junichi Yamada
发明人： Junichi Yamada
IPC分类号： G11C1122
CPC分类号： G11C11/22
摘要： There is provided a highly reliable non-volatile ferroelectric memory device in which the permitted number of read/write operation cycles is increased. The device comprises a step-down power supply circuit which generates a supply voltage VINT which is lower than a supply voltage VDD fed from the outside but not less than a coercive voltage of the ferroelectrics for the purpose of improving the resistance to fatigue of and imprinting to the ferroelectrics. Since the characteristics of the ferroelectrics deteriorate more due to fatigue and imprinting as the voltage applied to the ferroelectrics increases, a supply voltage for sense amplifiers and voltage supply circuits are selected to be VINT so that VINT is applied to the ferroelectric capacitors, while a supply voltage for other peripheral circuits is selected to be VDD. With this structure, the reliability of the device with respect to its read/write operations can significantly be improved as compared to the conventional ferroelectric memory devices by minimizing the effect that the signal voltage is reduced and by increasing the permitted number of operation cycles.
摘要翻译：提供了一种高度可靠的非易失性铁电存储器件，其中允许的读/写操作次数增加。该装置包括降压电源电路，其生成低于从外部馈送的电源电压VDD但不低于铁电体的矫顽电压的电源电压VINT，以提高耐疲劳性和印记性到铁电体。由于随着施加到铁电体上的电压的增加，铁电体的特性由于疲劳和压印而变差，因此将读出放大器和电压供给电路的电源电压选择为VINT，以将VINT施加到铁电电容器，同时供给其他外围电路的电压选择为VDD。利用这种结构，与传统的铁电存储器件相比，器件相对于其读/写操作的可靠性可以通过最小化信号电压降低的影响和通过增加允许的操作周期数而显着提高。

13. 发明授权

US06365783B1 Process for producing alcohols 有权
标题翻译：醇的制备方法
公开(公告)号：US06365783B1
公开(公告)日：2002-04-02
申请号：US09577981
申请日：2000-05-25
申请人： Yorozu Yokomori , Tsukasa Hayashi , Toshiaki Ogata , Junichi Yamada , Seiji Saito
发明人： Yorozu Yokomori , Tsukasa Hayashi , Toshiaki Ogata , Junichi Yamada , Seiji Saito
IPC分类号： C07C4550
CPC分类号： C07C45/50 , C07C29/16 , C07C31/125 , C07C47/02
摘要： Provided is a process for producing alcohols or aldehydes by reacting monoolefins with carbon monoxide and hydrogen with less formation of by-products. The process comprises the step of reacting a monoolefin with carbon monoxide and hydrogen in the presence of a cobalt carbonyl catalyst until the conversion of monoolefin reaches 50-90% (the first reaction step), the step of separating unreacted monoolefin from the reaction mixture obtained in the first reaction step (the step of separation of unreacted monoolefin) and the step of reacting the separated unreacted monoolefin with carbon monoxide and hydrogen in the presence of a cobalt carbonyl catalyst (the second reaction step), wherein at least one of the first reaction step and the second reaction step is carried out in the presence of water.
摘要翻译：提供了通过使单烯烃与一氧化碳和氢气反应而形成副产物而生产醇或醛的方法。该方法包括在羰基钴催化剂存在下使单烯烃与一氧化碳和氢气反应的步骤，直到单烯烃的转化率达到50-90％（第一反应步骤），从获得的反应混合物中分离未反应的单烯烃的步骤在第一反应步骤（分离未反应的单烯烃的步骤）和在羰基钴催化剂（第二反应步骤）的存在下使分离的未反应的单烯烃与一氧化碳和氢气反应的步骤，其中第一反应步骤和第二反应步骤在水的存在下进行。

14. 发明授权

US06008068A Process for etching a semiconductor lead frame 失效
标题翻译：用于蚀刻半导体引线框架的工艺
公开(公告)号：US06008068A
公开(公告)日：1999-12-28
申请号：US877549
申请日：1997-06-17
申请人： Junichi Yamada
发明人： Junichi Yamada
IPC分类号： H01L21/48 , H01L23/495
CPC分类号： H01L21/4828 , H01L23/49548 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/01004 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/181
摘要： A method for producing a lead frame having outer leads and inner leads, for use in constructing a resin-sealed semiconductor package comprises etching processes for etching a blank. A first resist pattern having a first opening and a second resist pattern having second openings are formed on the first and the second major surfaces of a blank. The first and the second major surfaces of the blank are etched through the first and the second resist pattern by a first etching process using a first etchant to form a first recess corresponding to the first opening and second recesses corresponding to the second recesses in the first and the second major surfaces, respectively. The first recess is filled up with an etch-resistant layer. The second major surface is etched through the second resist pattern by a second etching process using a second etchant so that portions of the blank corresponding to the second openings of the second resist pattern are etched through to form the tips of the inner leads.
摘要翻译：一种用于制造树脂密封半导体封装的外引线和内引线的引线框架的制造方法，其特征在于包括用于蚀刻坯料的蚀刻工艺。具有第一开口的第一抗蚀剂图案和具有第二开口的第二抗蚀剂图案形成在坯料的第一和第二主表面上。通过使用第一蚀刻剂的第一蚀刻工艺，通过第一蚀刻工艺蚀刻坯料的第一和第二主表面，以形成对应于第一开口的第一凹部和对应于第一凹部中的第一凹部的第一凹部和第二主表面。第一个凹槽填充有耐蚀刻层。通过使用第二蚀刻剂的第二蚀刻工艺，通过第二抗蚀剂图案蚀刻第二主表面，使得对应于第二抗蚀剂图案的第二开口的坯件的部分被蚀刻通过以形成内引线的尖端。

15. 发明授权

US5939774A Semiconductor lead frame 失效
标题翻译：半导体引线框架
公开(公告)号：US5939774A
公开(公告)日：1999-08-17
申请号：US877348
申请日：1997-06-17
申请人： Junichi Yamada
发明人： Junichi Yamada
IPC分类号： C23F1/00 , C23F1/16 , H01L21/48 , H01L21/56 , H01L23/28 , H01L23/495 , H01L23/50
CPC分类号： H01L23/49548 , H01L21/4828 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/181 , Y10T29/49121
摘要： A method for producing a lead frame having outer leads and inner leads, for use in constructing a resin-sealed semiconductor package comprises etching processes for etching a blank. A first resist pattern having a first opening and a second resist pattern having second openings are formed on the first and the second major surfaces of a blank. The first and the second major surfaces of the blank are etched through the first and the second resist pattern by a first etching process using a first etchant to form a first recess corresponding to the first opening and second recesses corresponding to the second recesses in the first and the second major surfaces, respectively. The first recess is filled up with an etch-resistant layer. The second major surface is etched through the second resist pattern by a second etching process using a second etchant so that portions of the blank corresponding to the second openings of the second resist pattern are etched through to form the tips of the inner leads.
摘要翻译：一种用于制造树脂密封半导体封装的外引线和内引线的引线框架的制造方法，其特征在于包括用于蚀刻坯料的蚀刻工艺。具有第一开口的第一抗蚀剂图案和具有第二开口的第二抗蚀剂图案形成在坯料的第一和第二主表面上。通过使用第一蚀刻剂的第一蚀刻工艺，通过第一蚀刻工艺蚀刻坯料的第一和第二主表面，以形成对应于第一开口的第一凹部和对应于第一凹部中的第一凹部的第一凹部和第二主表面。第一个凹槽填充有耐蚀刻层。通过使用第二蚀刻剂的第二蚀刻工艺，通过第二抗蚀剂图案蚀刻第二主表面，使得对应于第二抗蚀剂图案的第二开口的坯件的部分被蚀刻通过以形成内引线的尖端。

16. 发明授权

US5683943A Process for etching a semiconductor lead frame 失效
标题翻译：用于蚀刻半导体引线框架的工艺
公开(公告)号：US5683943A
公开(公告)日：1997-11-04
申请号：US489319
申请日：1995-06-12
申请人： Junichi Yamada
发明人： Junichi Yamada
IPC分类号： C23F1/00 , C23F1/16 , H01L21/48 , H01L21/56 , H01L23/28 , H01L23/495 , H01L23/50
CPC分类号： H01L23/49548 , H01L21/4828 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/181 , Y10T29/49121
摘要： A method for producing a lead frame having outer leads and inner leads, for use in constructing a resin-sealed semiconductor package comprises etching processes for etching a blank. A first resist pattern having a first opening and a second resist pattern having second openings are formed on the first and the second major surfaces of a blank. The first and the second major surfaces of the blank are etched through the first and the second resist pattern by a first etching process using a first etchant to form a first recess corresponding to the first opening and second recesses corresponding to the second recesses in the first and the second major surfaces, respectively. The first recess is filled up with an etch-resistant layer. The second major surface is etched through the second resist pattern by a second etching process using a second etchant so that portions of the blank corresponding to the second openings of the second resist pattern are etched through to form the tips of the inner leads.
摘要翻译：一种用于制造树脂密封半导体封装的外引线和内引线的引线框架的制造方法，其特征在于包括用于蚀刻坯料的蚀刻工艺。具有第一开口的第一抗蚀剂图案和具有第二开口的第二抗蚀剂图案形成在坯料的第一和第二主表面上。通过使用第一蚀刻剂的第一蚀刻工艺，通过第一蚀刻工艺蚀刻坯料的第一和第二主表面，以形成对应于第一开口的第一凹部和对应于第一凹部中的第一凹部的第一凹部和第二主表面。第一个凹槽填充有耐蚀刻层。通过使用第二蚀刻剂的第二蚀刻工艺，通过第二抗蚀剂图案蚀刻第二主表面，使得对应于第二抗蚀剂图案的第二开口的坯件的部分被蚀刻通过以形成内引线的尖端。

17. 外观设计

USD311614S Electric vacuum cleaner 失效
公开(公告)号：USD311614S
公开(公告)日：1990-10-23
申请号：US152604
申请日：1988-02-04
申请人： Yukio Hirano , Kunio Funatsu , Joseph J. Nukazawa , Tadakazu Narikawa , Junichi Yamada
设计人： Yukio Hirano , Kunio Funatsu , Joseph J. Nukazawa , Tadakazu Narikawa , Junichi Yamada

18. 外观设计

USD307936S Air cleaner 失效
公开(公告)号：USD307936S
公开(公告)日：1990-05-15
申请号：US87948
申请日：1987-08-21
申请人： Yukio Hirano , Tadakazu Narikawa , Junichi Yamada
设计人： Yukio Hirano , Tadakazu Narikawa , Junichi Yamada

19. 发明授权

US4706129A Image scanning apparatus 失效
标题翻译：图像扫描装置
公开(公告)号：US4706129A
公开(公告)日：1987-11-10
申请号：US671778
申请日：1984-11-15
申请人： Junichi Yamada
发明人： Junichi Yamada
IPC分类号： G03B42/08 , H04N1/029 , H04N1/14 , H04N3/02 , H04N1/04 , H04N1/10
CPC分类号： H04N1/14 , H04N1/029
摘要： An image scanning apparatus comprises a recording material supporting member for supporting a recording material in a straightly moveable manner, and an endlessly moveable member positioned close to the recording material supported on the supporting member for movement along straight lines parallel to the recording material at an angle with respect to the movement direction of the recording material. The recording material supporting member is moved at a velocity approximately equal to the velocity component of the endlessly moveable member in the movement direction of the recording material so that the recording material is two-dimensionally scanned by light. The endlessly moveable member is provided with a photodetector and/or a light source. When the apparatus is used for image read-out, the endlessly moveable member is provided with a single light source and a plurality of light receiving elements positioned around the light source.
摘要翻译：图像扫描装置包括用于以可直线移动的方式支撑记录材料的记录材料支撑构件和靠近支撑在支撑构件上的记录材料定位的可循环移动的构件，以平行于记录材料的直线以一定角度移动相对于记录材料的移动方向。记录材料支撑构件以与记录材料的移动方向上的环形可移动构件的速度分量近似相等的速度移动，使得记录材料被二维扫描。无限可移动构件设置有光电检测器和/或光源。当该装置用于图像读出时，无限可移动构件设置有单个光源和围绕光源定位的多个光接收元件。

20. 发明授权

US4616129A Light detecting apparatus 失效
标题翻译：光检测装置
公开(公告)号：US4616129A
公开(公告)日：1986-10-07
申请号：US676998
申请日：1984-11-30
申请人： Junichi Yamada , Kazuo Horikawa , Masaru Noguchi
发明人： Junichi Yamada , Kazuo Horikawa , Masaru Noguchi
IPC分类号： G03B42/02 , G01J1/42 , G02B6/00 , H04N1/028 , H04N1/04 , H04N1/40 , H04N1/401 , H01J40/14
CPC分类号： H04N1/401 , H04N1/0281 , H04N1/40056
摘要： A light detecting apparatus comprises an elongated plate-shaped light guide member having an end face at one long side as a light input face and an end face at the other long side as a light output face. N number of photomultipliers having elongated light receiving faces optically associated with N divisions of the light output face divided into N divisions in the length direction of the light output face of the light guide member are positioned for converting the light emitted from the divisions of the light output face into electric signals. The photomultipliers are connected to a correction circuit for electrically eliminating deterioration in sensitivity at least at adjacent photomultiplier side end portions of the photomultipliers.
摘要翻译：光检测装置包括细长的板状导光构件，其具有作为光输入面的一个长边的端面和作为光输出面的另一长边的端面。具有与导光构件的光输出面的长度方向上划分为N个分割的光输出面的N个分割光学相关联的具有细长的光接收面的N个光电倍增器被定位成用于将从光的分割射出的光输出面变成电信号。光电倍增管连接到校正电路，用于至少在光电倍增器的相邻光电倍增器侧端部电除去灵敏度的劣化。

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