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    • 12. 发明申请
    • SYSTEMS AND METHODS FOR PREVENTING MALFUNCTION OF CONTENT ADDRESSABLE MEMORY RESULTING FROM CONCURRENT WRITE AND LOOKUP OPERATIONS
    • 用于防止来自同时写入和查找操作的内容可寻址存储器的故障的系统和方法
    • US20060120127A1
    • 2006-06-08
    • US11003084
    • 2004-12-03
    • Hiroaki MurakamiHiromi NoroOsamu Takahashi
    • Hiroaki MurakamiHiromi NoroOsamu Takahashi
    • G11C15/00
    • G11C15/00
    • Systems and methods for preventing the corruption of a CAM lookup result when a lookup in the CAM and a write to the CAM are concurrently executed. In one embodiment, a tag value is clocked into a tag latch simultaneously with a data value being clocked into a data latch. The tag value and initial CAM element values begin propagating through comparison logic. After a delay, the data value is written from the data latch to a CAM element. After the tag value and initial CAM values propagate through the comparison logic to produce comparison outputs, but before the newly written data value propagates through the comparison logic and changes the comparison outputs, the comparison outputs are latched. The comparison outputs can then be processed as if the data values in the CAM elements had not been changed by the write operation.
    • 当CAM中的查找和对CAM的写入被同时执行时,用于防止CAM查找的损坏的系统和方法。 在一个实施例中,将标签值与被计入数据锁存器的数据值同时定时到标签锁存器中。 标签值和初始CAM元素值通过比较逻辑开始传播。 在延迟之后,将数据值从数据锁存器写入CAM元件。 在标签值和初始CAM值通过比较逻辑传播以产生比较输出之后,但在新写入的数据值通过比较逻辑传播并更改比较输出之前,比较输出被锁存。 然后可以像比较输出那样处理,因为CAM元素中的数据值没有被写入操作改变。
    • 19. 发明授权
    • System and method for reducing power consumption associated with the capacitance of inactive portions of a multiplexer
    • 用于降低与多路复用器的非活动部分的电容相关联的功耗的系统和方法
    • US07218152B2
    • 2007-05-15
    • US11033612
    • 2005-01-12
    • Hiroaki MurakamiOsamu TakahashiShoji Onishi
    • Hiroaki MurakamiOsamu TakahashiShoji Onishi
    • H03K19/20
    • H03K19/1737
    • Systems and methods for reducing the power consumption associated with the capacitance of sections of a multiplexer are disclosed. At each cycle, a timing signal is selectively sent only to sections of the multiplexer that include active logic. A plurality of control signals is received for processing by a corresponding plurality of input selection circuits. A plurality of additional inputs corresponding to the plurality of input selection circuits may also be received. In one embodiment, each input selection circuit is configured to output a corresponding input signal if a corresponding control signal is asserted and a timing signal is made available to the input selection circuit. To avoid unnecessary power consumption associated with the capacitance of various portions of the multiplexer, the timing signal is only asserted to a portion of the multiplexer at any given clock cycle according to the values of the control signals.
    • 公开了用于降低与多路复用器的部分的电容相关联的功耗的系统和方法。 在每个周期,定时信号仅选择性地仅发送到包括有效逻辑的多路复用器的部分。 多个控制信号被接收用于由相应的多个输入选择电路进行处理。 还可以接收对应于多个输入选择电路的多个附加输入。 在一个实施例中,每个输入选择电路被配置为如果相应的控制信号被断言并且使定时信号对输入选择电路可用,则输出相应的输入信号。 为了避免与多路复用器的各个部分的电容相关联的不必要的功率消耗,定时信号仅根据控制信号的值以任何给定的时钟周期被认定到多路复用器的一部分。