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11. 发明申请

US20100214038A1 CHIP-TYPE SOLID ELECTROLYTIC CAPACITOR AND CHIP-TYPE FILTER 有权
标题翻译：芯型固体电解电容器和芯片型滤芯
公开(公告)号：US20100214038A1
公开(公告)日：2010-08-26
申请号：US12678529
申请日：2008-11-12
申请人： Junichi Kurita , Hiroshi Higashitani , Tsuyoshi Yoshino
发明人： Junichi Kurita , Hiroshi Higashitani , Tsuyoshi Yoshino
IPC分类号： H03H7/01 , H01G9/26
CPC分类号： H01G9/012 , H01G9/14 , H01G9/15 , H03H2001/0014
摘要： A solid electrolytic capacitor is formed by stacking flat solid electrolytic capacitor elements. Negative electrode sections of a part of the solid electrolytic capacitor elements and negative electrode sections of the remaining part of the solid electrolytic capacitor elements are led out so as to be faced to each other, and are connected to the first and second negative electrode lead frames which are independent to each other, respectively. Two of negative electrode sections are insulated from each other in the solid electrolytic capacitor.
摘要翻译：通过堆叠扁平固体电解电容器元件形成固体电解电容器。固体电解电容器元件的一部分的负极部分和固体电解电容器元件的剩余部分的负极部分被引出以彼此面对，并且连接到第一和第二负极引线框架分别是彼此独立的。两个负极部分在固体电解电容器中彼此绝缘。

12. 发明申请

US20080169825A1 Solid Electrolytic Capacitor Inspection Device and Inspection Method 有权
标题翻译：固体电解电容器检测装置及检验方法
公开(公告)号：US20080169825A1
公开(公告)日：2008-07-17
申请号：US11885944
申请日：2006-04-18
申请人： Junichi Kurita , Hiroshi Higashitani , Kazuo Kawahito , Tsuyoshi Yoshino
发明人： Junichi Kurita , Hiroshi Higashitani , Kazuo Kawahito , Tsuyoshi Yoshino
IPC分类号： G01R27/02
CPC分类号： G01R31/028 , G01R27/28 , H01G9/04 , H01G9/15 , H01G13/00
摘要： A capacitor inspection device includes a substrate made of an insulating material, a first conductor unit and a second conductor unit arranged on the substrate, a signal input unit and a signal output unit attached to the substrate, a network analyzer and a pressurizing unit. The network analyzer has an input port connected to the signal input unit and an output port connected to the signal output unit. The first and second conductor units make contact with an anode and a cathode of a capacitor, respectively. The pressurizing unit presses the anode of capacitor onto the first conductor unit and the cathode onto the second conductor unit.
摘要翻译：电容器检查装置包括由绝缘材料制成的基板，布置在基板上的第一导体单元和第二导体单元，附接到基板的信号输入单元和信号输出单元，网络分析器和加压单元。网络分析仪具有连接到信号输入单元的输入端口和连接到信号输出单元的输出端口。第一和第二导体单元分别与电容器的阳极和阴极接触。加压单元将电容器的阳极压在第一导体单元上并将阴极压到第二导体单元上。

13. 发明申请

US20100259868A1 CHIP TYPE SOLID ELECTROLYTIC CAPACITOR 有权
标题翻译：芯片型固体电解电容器
公开(公告)号：US20100259868A1
公开(公告)日：2010-10-14
申请号：US12821568
申请日：2010-06-23
申请人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/012
CPC分类号： H01G9/012 , H01G2/06 , H01G9/004 , H01G9/14 , H01G9/15
摘要： A chip type solid electrolytic capacitor includes a capacitor element-laminate. In the capacitor element-laminate, a plurality of capacitor elements, each having an anode portion and a cathode portion, are laminated so that the anode portions of the adjacent capacitor elements are disposed in the direction opposite to each other. Anode lead terminals are joined to the bottom faces of the anode portions of the capacitor elements disposed at both ends of the capacitor element-laminate. A cathode lead terminal is joined to the bottom face of the cathode portion of the capacitor element disposed in the center of the capacitor element-laminate. An Electrically insulating exterior resin coats the capacitor element-laminate so as to expose at least a part of the bottom faces of the anode lead terminals and a part of the cathode lead terminal.
摘要翻译：芯片型固体电解电容器包括电容器元件层叠体。在电容器元件层叠体中，层叠多个具有阳极部和阴极部的电容器元件，使得相邻的电容器元件的阳极部沿相反方向配置。阳极引线端子连接到设置在电容器元件 - 层叠体的两端的电容器元件的阳极部分的底面。阴极引线端子连接到设置在电容器元件 - 层叠体的中心的电容器元件的阴极部分的底面。电绝缘外部树脂涂覆电容器元件层压体，以暴露阳极引线端子和阴极引线端子的一部分的至少一部分底面。

14. 发明授权

US07778011B2 Chip type solid electrolytic capacitor 有权
标题翻译：片式固体电解电容器
公开(公告)号：US07778011B2
公开(公告)日：2010-08-17
申请号：US11719029
申请日：2006-01-19
申请人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01G2/06 , H01G9/004 , H01G9/14 , H01G9/15
摘要： A chip type solid electrolytic capacitor includes a capacitor element-laminate. In the capacitor element-laminate, a plurality of capacitor elements, each having an anode portion and a cathode portion, are laminated so that the anode portions of the adjacent capacitor elements are disposed in the direction opposite to each other. Anode lead terminals are joined to the bottom faces of the anode portions of the capacitor elements disposed at both ends of the capacitor element-laminate. A cathode lead terminal is joined to the bottom face of the cathode portion of the capacitor element disposed in the center of the capacitor element-laminate. An Electrically insulating exterior resin coats the capacitor element-laminate so as to expose at least a part of the bottom faces of the anode lead terminals and a part of the cathode lead terminal.
摘要翻译：芯片型固体电解电容器包括电容器元件层叠体。在电容器元件层叠体中，层叠多个具有阳极部和阴极部的电容器元件，使得相邻的电容器元件的阳极部沿相反方向配置。阳极引线端子连接到设置在电容器元件 - 层叠体的两端的电容器元件的阳极部分的底面。阴极引线端子连接到设置在电容器元件 - 层叠体的中心的电容器元件的阴极部分的底面。电绝缘外部树脂涂覆电容器元件层压体，以暴露阳极引线端子和阴极引线端子的一部分的至少一部分底面。

15. 发明申请

US20060262487A1 Chip-type solid electrolytic capacitor 有权
标题翻译：片式固体电解电容器
公开(公告)号：US20060262487A1
公开(公告)日：2006-11-23
申请号：US11437666
申请日：2006-05-22
申请人： Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/04
CPC分类号： H01G9/012 , H01G2/06 , H01G9/14 , Y10T29/41 , Y10T29/417
摘要： A chip-type solid electrolytic capacitor which has a four-terminal structure. The chip-type solid electrolytic capacitor includes capacitor elements laminated such that anode electrodes face alternately in opposite directions; a pair of anode terminals opposing to each other; and a pair of cathode terminals opposing to each other. The magnetic fluxes generated by current passing between respective terminals are mutually cancelled, thus allowing ESL to be drastically reduced. Further reduction of ESL is feasible by shortening the distance between the terminals as much as possible so as to reduce the current loop area.
摘要翻译：具有四端子结构的芯片型固体电解电容器。片式固体电解电容器包括电容器元件，其电容器元件层叠，使得阳极电极在相反方向上交替地面对一对阳极端子彼此相对; 和一对彼此相对的阴极端子。由相应端子之间的电流通过产生的磁通相互抵消，从而允许ESL被大大降低。通过尽可能地缩短端子之间的距离来进一步降低ESL是可行的，以便减小电流回路面积。

16. 发明授权

US07215533B2 Chip-type solid electrolytic capacitor 有权
标题翻译：片式固体电解电容器
公开(公告)号：US07215533B2
公开(公告)日：2007-05-08
申请号：US11437666
申请日：2006-05-22
申请人： Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01G2/06 , H01G9/14 , Y10T29/41 , Y10T29/417
摘要： A chip-type solid electrolytic capacitor has a four-terminal structure. The chip-type solid electrolytic capacitor includes capacitor elements laminated such that anode electrodes face alternately in opposite directions; a pair of anode terminals opposing each other; and a pair of cathode terminals opposing each other. The magnetic fluxes generated by current passing between respective terminals are mutually cancelled, thus allowing ESL to be drastically reduced. Further reduction of ESL is feasible by shortening the distance between the terminals as much as possible so as to reduce the current loop area.
摘要翻译：芯片型固体电解电容器具有四端子结构。片式固体电解电容器包括电容器元件，其电容器元件层叠，使得阳极电极在相反方向上交替地面对一对阳极端子彼此相对; 和一对彼此相对的阴极端子。由相应端子之间的电流通过产生的磁通相互抵消，从而允许ESL被大大降低。通过尽可能地缩短端子之间的距离来进一步降低ESL是可行的，以便减小电流回路面积。

17. 发明授权

US07057882B2 Chip solid electrolytic capacitor 失效
标题翻译：芯片固体电解电容器
公开(公告)号：US07057882B2
公开(公告)日：2006-06-06
申请号：US11222964
申请日：2005-09-12
申请人： Tatsuo Fujii , Junichi Kurita , Yuji Midou , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Yuji Midou , Tsuyoshi Yoshino
IPC分类号： H01G9/00 , H01G4/228 , H01G9/10
CPC分类号： H01G9/012 , H01G9/042 , H01G9/08 , H01G9/14
摘要： A chip solid electrolytic capacitor includes a capacitor element with an anode portion and a cathode portion, an anode lead frame, a cathode lead frame and packaging resin. The anode lead frame includes a first plane, an anode junction and an anode terminal. The anode junction is formed on one end of the first plane and connected to the anode portion. The anode terminal is formed on the other side of the first plane. The cathode lead frame has a second plane and a cathode terminal. The second plane has the cathode portion mounted thereon, is connected to the cathode portion, and is stacked on the first plane. The cathode terminal is formed on the same side of the second plane as the anode terminal. The packaging resin has a surface to be mounted and covers the capacitor element, with the anode terminal and the cathode terminal exposed on the surface to be mounted.
摘要翻译：芯片固体电解电容器包括具有阳极部分和阴极部分的电容器元件，阳极引线框架，阴极引线框架和封装树脂。阳极引线框架包括第一平面，阳极结和阳极端子。阳极结形成在第一平面的一端并连接到阳极部分。阳极端子形成在第一平面的另一侧上。阴极引线框架具有第二平面和阴极端子。第二平面具有安装在其上的阴极部分，连接到阴极部分，并且堆叠在第一平面上。阴极端子形成在与阳极端子相同的第二平面的一侧。包装树脂具有要安装的表面并且覆盖电容器元件，阳极端子和阴极端子暴露在要安装的表面上。

18. 发明申请

US20060056136A1 Chip solid electrolytic capacitor 失效
标题翻译：芯片固体电解电容器
公开(公告)号：US20060056136A1
公开(公告)日：2006-03-16
申请号：US11222964
申请日：2005-09-12
申请人： Tatsuo Fujii , Junichi Kurita , Yuji Midou , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Yuji Midou , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01G9/042 , H01G9/08 , H01G9/14
摘要： The chip solid electrolytic capacitor includes a capacitor element with an anode portion and a cathode portion, an anode lead frame, a cathode lead frame and packaging resin. The anode lead frame includes a first plane, an anode junction and an anode terminal. The anode junction is formed on one end of the first plane and connected to the anode portion. The anode terminal is formed on the other side of the first plane. The cathode lead frame has a second plane and a cathode terminal. The second plane mounts the cathode portion thereon and connected to the cathode portion, and is stacked on the first plane. The cathode terminal is formed on the same side of the second plane as the anode terminal. The packaging resin has a surface to be mounted and covers the capacitor element, with the anode terminal and the cathode terminal exposed on the surface to be mounted.
摘要翻译：芯片固体电解电容器包括具有阳极部分和阴极部分的电容器元件，阳极引线框架，阴极引线框架和封装树脂。阳极引线框架包括第一平面，阳极结和阳极端子。阳极结形成在第一平面的一端并连接到阳极部分。阳极端子形成在第一平面的另一侧上。阴极引线框架具有第二平面和阴极端子。第二平面将阴极部分安装在其上并连接到阴极部分，并且堆叠在第一平面上。阴极端子形成在与阳极端子相同的第二平面的一侧。包装树脂具有要安装的表面并且覆盖电容器元件，阳极端子和阴极端子暴露在要安装的表面上。

19. 发明授权

US07929273B2 Chip type solid electrolytic capacitor 有权
标题翻译：片式固体电解电容器
公开(公告)号：US07929273B2
公开(公告)日：2011-04-19
申请号：US12821568
申请日：2010-06-23
申请人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01G2/06 , H01G9/004 , H01G9/14 , H01G9/15
摘要： A chip type solid electrolytic capacitor includes a capacitor element-laminate. In the capacitor element-laminate, a plurality of capacitor elements, each having an anode portion and a cathode portion, are laminated so that the anode portions of the adjacent capacitor elements are disposed in the direction opposite to each other. Anode lead terminals are joined to the bottom faces of the anode portions of the capacitor elements disposed at both ends of the capacitor element-laminate. A cathode lead terminal is joined to the bottom face of the cathode portion of the capacitor element disposed in the center of the capacitor element-laminate. An Electrically insulating exterior resin coats the capacitor element-laminate so as to expose at least a part of the bottom faces of the anode lead terminals and a part of the cathode lead terminal.
摘要翻译：芯片型固体电解电容器包括电容器元件层叠体。在电容器元件层叠体中，层叠多个具有阳极部和阴极部的电容器元件，使得相邻的电容器元件的阳极部沿相反方向配置。阳极引线端子连接到设置在电容器元件 - 层叠体的两端的电容器元件的阳极部分的底面。阴极引线端子连接到设置在电容器元件 - 层叠体的中心的电容器元件的阴极部分的底面。电绝缘外部树脂涂覆电容器元件层压体，以暴露阳极引线端子和阴极引线端子的一部分的至少一部分底面。

20. 发明申请

US20090073638A1 CHIP TYPE SOLID ELECTROLYTIC CAPACITOR 有权
标题翻译：芯片型固体电解电容器
公开(公告)号：US20090073638A1
公开(公告)日：2009-03-19
申请号：US11719029
申请日：2006-01-19
申请人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/15
CPC分类号： H01G9/012 , H01G2/06 , H01G9/004 , H01G9/14 , H01G9/15
摘要： A chip type solid electrolytic capacitor includes a capacitor element-laminate. In the capacitor element-laminate, a plurality of capacitor elements, each having an anode portion and a cathode portion, are laminated so that the anode portions of the adjacent capacitor elements are disposed in the direction opposite to each other. Anode lead terminals are joined to the bottom faces of the anode portions of the capacitor elements disposed at both ends of the capacitor element-laminate. A cathode lead terminal is joined to the bottom face of the cathode portion of the capacitor element disposed in the center of the capacitor element-laminate. An Electrically insulating exterior resin coats the capacitor element-laminate so as to expose at least a part of the bottom faces of the anode lead terminals and a part of the cathode lead terminal.
摘要翻译：芯片型固体电解电容器包括电容器元件层叠体。在电容器元件层叠体中，层叠多个具有阳极部和阴极部的电容器元件，使得相邻的电容器元件的阳极部沿相反方向配置。阳极引线端子连接到设置在电容器元件 - 层叠体的两端的电容器元件的阳极部分的底面。阴极引线端子连接到设置在电容器元件 - 层叠体的中心的电容器元件的阴极部分的底面。电绝缘外部树脂涂覆电容器元件层压体，以暴露阳极引线端子和阴极引线端子的一部分的至少一部分底面。

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