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    • 14. 发明授权
    • Method and apparatus for protection of conductive surfaces in a plasma
processing reactor
    • 用于保护等离子体处理反应器中的导电表面的方法和装置
    • US5366585A
    • 1994-11-22
    • US10975
    • 1993-01-28
    • Robert RobertsonKam S. LawJohn M. White
    • Robert RobertsonKam S. LawJohn M. White
    • B01J19/08C23C16/44C23C16/509C30B25/08H01J37/02H01L21/205H01L21/302H01L21/3065H01L21/31B44C1/22
    • H01J37/32495C23C16/4404C23C16/4405C23C16/5096H01J37/026H01J2237/0206H01J2237/022Y10S156/914Y10S156/916
    • An apparatus and method for protecting conductive, typically metallic, walls (212) of a plasma process chamber (200) from accumulation of contaminants thereon and from reaction with a gas plasma and either deposition-gas plasma by-products. A ceramic barrier material (220-223), preferably of at least 0.005 inches 127 micrometers) thickness, is used adjacent the conductive portions of the reactor chamber and between the gas plasma and such conductive portions to be protected. The ceramic barrier material reduces the deposit of compounds formed from the plasma on protected reactor chamber surfaces and thereby avoiding the formation of a source of particulates. Further, the ceramic barrier material enables cleaning of the reactor chamber using an etch plasma generated from halogen-comprising gas without the etch plasma attacking protected metallic portions of the reactor. The ceramic liner can serve an additional function of preventing arcing or local intense plasma discharge from a plasma-generation electrode (216), to a conductive portion of the reactor chamber.
    • 一种用于保护等离子体处理室(200)的导电的,通常是金属的壁(212)的装置和方法,其不会积聚污染物并且与气体等离子体和沉积气体等离子体副产物反应。 邻近反应器室的导电部分和气体等离子体和待保护的导电部分之间使用陶瓷阻挡材料(220-223),优选至少0.005英寸127微米)。 陶瓷阻挡材料减少了在受保护的反应器室表面上由等离子体形成的化合物的沉积,从而避免了颗粒物的形成。 此外,陶瓷阻挡材料能够使用由含卤素气体产生的蚀刻等离子体来清洁反应室,而没有蚀刻等离子体侵蚀反应器的受保护的金属部分。 陶瓷衬垫可以起到防止从等离子体产生电极(216)的电弧或局部强烈等离子体放电到反应器室的导电部分的附加功能。
    • 15. 发明授权
    • Process for PECVD of silicon oxide using TEOS decomposition
    • US4892753A
    • 1990-01-09
    • US262993
    • 1988-10-26
    • David N. WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • David N. WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • C23C16/40C23C16/44C23C16/455C23C16/509C23C16/54H01L21/314H01L21/316
    • C23C16/45565C23C16/402C23C16/455C23C16/45521C23C16/5096C23C16/54H01J37/32082H01J37/3244H01L21/31604
    • A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.
    • 17. 发明授权
    • Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
    • US06167834A
    • 2001-01-02
    • US07928642
    • 1992-08-13
    • David Nin-Kou WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • David Nin-Kou WangJohn M. WhiteKam S. LawCissy LeungSalvador P. UmotoyKenneth S. CollinsJohn A. AdamikIlya PerlovDan Maydan
    • C23C1600
    • C23C16/45565C23C16/402C23C16/455C23C16/45521C23C16/5096C23C16/54H01J37/32082H01J37/3244H01L21/31604
    • A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, the TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.
    • 20. 发明授权
    • Vacuum processing apparatus having improved throughput
    • 真空处理装置具有提高的生产能力
    • US5512320A
    • 1996-04-30
    • US227480
    • 1994-04-13
    • Norman L. TurnerJohn M. White
    • Norman L. TurnerJohn M. White
    • C23C14/56C03C17/00C23C16/458C23C16/46C23C16/54H01L21/203H01L21/205H01L21/677C23C16/00
    • C23C16/46C03C17/001C23C16/4583C23C16/54
    • A method for depositing sequential thin films on glass substrates by single substrate deposition comprising loading a batch of substrates into a load lock chamber and evacuating the chamber, transferring the substrates to a batch heating chamber for heating the substrates to elevated temperatures; transferring the glass substrates singly to one or more single substrate processing chambers, and sequentially transferring the substrates back to the load lock chamber where they are batch cooled.A vacuum system for carrying out the method includes a load lock/cooling chamber for evacuating a plurality of glass substrates; a heating chamber for heating a plurality of substrates to elevated temperatures; one or more single substrate processing chambers; and a transfer chamber having access to all of said chambers and having automated means therein for transferring the glass substrates into and out of said chambers in a preselected order.
    • 一种用于通过单个衬底沉积在玻璃衬底上沉积顺序薄膜的方法,包括将一批衬底加载到负载锁定室中并抽空腔室,将衬底转移到用于将衬底加热到​​升高的温度的批量加热室; 将玻璃基板单独地转移到一个或多个单个基板处理室,并且将基板顺序地传送回装载锁定室,在那里进行间歇式冷却。 用于执行该方法的真空系统包括用于抽空多个玻璃基板的负载锁定/冷却室; 加热室,用于将多个基板加热到升高的温度; 一个或多个单个基板处理室; 以及传送室,其具有进入所有所述室并且具有其中的自动化装置,用于以预选的顺序将玻璃基板输送到所述室中。