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11. 发明授权

US08687421B2 Scrub techniques for use with dynamic read 有权
标题翻译：用于动态阅读的Scrub技术
公开(公告)号：US08687421B2
公开(公告)日：2014-04-01
申请号：US13435476
申请日：2012-03-30
申请人： Chris Avila , Jianmin Huang , Dana Lee
发明人： Chris Avila , Jianmin Huang , Dana Lee
IPC分类号： G11C16/00
CPC分类号： G06F11/1048 , G11C11/5642 , G11C16/26 , G11C16/3418 , G11C16/349 , G11C2211/5634
摘要： The decision on whether to refresh or retire a memory block is based on the set of dynamic read values being used. In a memory system using a table of dynamic read values, the table is configured to include how to handle read error (retire, refresh) in addition to the read parameters for the different dynamic read cases. In a refinement, the read case number can used to prioritize blocks selected for refresh or retire. In cases where the read scrub is to be made more precise, multiple dynamic read cases can be applied. Further, which cases are applied can be intelligently selected.
摘要翻译：是否刷新或退出内存块的决定是基于正在使用的一组动态读取值。在使用动态读取值表的存储器系统中，该表被配置为包括如何处理读取错误（退出，刷新）以及不同动态读取情况的读取参数。在细化中，读取案例编号可用于对被选择进行刷新或退出的块进行优先级排序。在读取擦除更精确的情况下，可以应用多个动态读取情况。此外，可以智能地选择应用哪些情况。

12. 发明申请

US20110153911A1 METHOD AND SYSTEM FOR ACHIEVING DIE PARALLELISM THROUGH BLOCK INTERLEAVING 有权
标题翻译：通过块交互实现平行排列的方法和系统
公开(公告)号：US20110153911A1
公开(公告)日：2011-06-23
申请号：US12642181
申请日：2009-12-18
申请人： Steven Sprouse , Chris Avila , Jianmin Huang
发明人： Steven Sprouse , Chris Avila , Jianmin Huang
IPC分类号： G06F12/08 , G06F12/02
CPC分类号： G11C11/5628 , G06F12/0246 , G06F12/0851 , G06F12/0871 , G06F2212/2022 , G06F2212/214 , G06F2212/222 , G06F2212/284 , G06F2212/313 , G06F2212/7203 , G06F2212/7208 , G11C7/1042 , G11C16/0483 , G11C2207/2245 , G11C2211/5641 , G11C2211/5643
摘要： A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die.
摘要翻译：通过块交织实现管芯并行的方法和系统包括具有多个非易失性存储器管芯的非易失性存储器，其中每个管芯具有缓存存储区域和主存储区域。控制器被配置为接收数据并将顺序寻址的数据写入到第一管芯的缓存存储区域。控制器在将顺序寻址的数据写入与第一管芯的主存储区域的块相等的第一管芯的高速缓存存储区域之后，将附加数据写入下一个管芯的高速缓存存储区域，直到顺序寻址的数据被写入下一个芯片的高速缓存区域等于主存储区域的块。高速缓存存储区域可以被复制到第一裸片上的主存储区域，而缓存存储区域被写入到下一个芯片上。

13. 发明申请

US20110010484A1 OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY 有权
标题翻译：优化的非易失性存储器页面编程订单
公开(公告)号：US20110010484A1
公开(公告)日：2011-01-13
申请号：US12499219
申请日：2009-07-08
申请人： Steven Sprouse , Jianmin Huang , Chris Avila , Yichao Huang , Emilio Yero
发明人： Steven Sprouse , Jianmin Huang , Chris Avila , Yichao Huang , Emilio Yero
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G11C11/5628 , G11C2211/5648
摘要： During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.
摘要翻译：在非易失性存储系统中的编程数据传输过程中，数据的记录单元从主机传送到诸如存储卡的存储设备。对于每个记录单元，数据页按照这样的顺序排列，使得在写入时间较少的页面之前提供需要更长时间写入存储器件的存储器阵列的页面。由于发生更大程度的并行处理，记录单元的整体编程时间减少。当将编程所需的时间更长的页面编程到存储器阵列时，将编程所需的较少时间的页面传送到存储器件。编程完成后，存储器信号通知主机传送下一个记录单元。数据页可以包括下页，中页和上页。

14. 发明授权

US09092340B2 Method and system for achieving die parallelism through block interleaving 有权
标题翻译：通过块交错实现并行度的方法和系统
公开(公告)号：US09092340B2
公开(公告)日：2015-07-28
申请号：US12642181
申请日：2009-12-18
申请人： Steven Sprouse , Chris Avila , Jianmin Huang
发明人： Steven Sprouse , Chris Avila , Jianmin Huang
IPC分类号： G06F12/02 , G06F12/08 , G11C7/10 , G11C11/56
CPC分类号： G11C11/5628 , G06F12/0246 , G06F12/0851 , G06F12/0871 , G06F2212/2022 , G06F2212/214 , G06F2212/222 , G06F2212/284 , G06F2212/313 , G06F2212/7203 , G06F2212/7208 , G11C7/1042 , G11C16/0483 , G11C2207/2245 , G11C2211/5641 , G11C2211/5643
摘要： A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die.
摘要翻译：通过块交错实现管芯并行的方法和系统包括具有多个非易失性存储器管芯的非易失性存储器，其中每个管芯具有缓存存储区域和主存储区域。控制器被配置为接收数据并将顺序寻址的数据写入到第一管芯的缓存存储区域。控制器在将顺序寻址的数据写入与第一管芯的主存储区域的块相等的第一管芯的高速缓存存储区域之后，将附加数据写入下一个管芯的高速缓存存储区域，直到顺序寻址的数据被写入下一个芯片的高速缓存区域等于主存储区域的块。高速缓存存储区域可以被复制到第一裸片上的主存储区域，而缓存存储区域被写入到下一个芯片上。

15. 发明申请

US20140281682A1 Systems and Methods for Performing Defect Detection and Data Recovery in a Memory System 有权
标题翻译：在内存系统中执行缺陷检测和数据恢复的系统和方法
公开(公告)号：US20140281682A1
公开(公告)日：2014-09-18
申请号：US13795460
申请日：2013-03-12
申请人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
发明人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
IPC分类号： G06F11/08
CPC分类号： G06F11/1044 , G11C29/52 , G11C2029/0401 , G11C2029/0409 , G11C2029/0411
摘要： Systems and methods for performing defect detection and data recovery within a memory system are disclosed. A controller of a memory system may receive a command to write data in a memory of the memory system; determine a physical location of the memory that is associated with the data write; write data associated with the data write to the physical location; and store the physical location of the memory that is associated with the data write in a Tag cache. The controller may further identify a data keep cache of a plurality of data keep caches that is associated with the data write based on the physical location of the memory that is associated with the data write; update an XOR sum based on the data of the data write; and store the updated XOR sum in the identified data keep cache.
摘要翻译：公开了用于在存储器系统内执行缺陷检测和数据恢复的系统和方法。存储器系统的控制器可以接收在存储器系统的存储器中写入数据的命令; 确定与数据写入相关联的存储器的物理位置; 将与数据相关联的数据写入物理位置; 并将与数据写入相关联的存储器的物理位置存储在标签高速缓存中。控制器可以基于与数据写入相关联的存储器的物理位置，进一步识别与数据写入相关联的多个数据保持高速缓存的数据保持高速缓存; 基于数据写入的数据更新XOR和; 并将更新的XOR和存储在所识别的数据保持缓存中。

16. 发明申请

US20130128666A1 Scrub Techniques for Use with Dynamic Read 有权
标题翻译： Scrub技术用于动态阅读
公开(公告)号：US20130128666A1
公开(公告)日：2013-05-23
申请号：US13435476
申请日：2012-03-30
申请人： Chris Avila , Jianmin Huang , Dana Lee
发明人： Chris Avila , Jianmin Huang , Dana Lee
IPC分类号： G11C16/26
CPC分类号： G06F11/1048 , G11C11/5642 , G11C16/26 , G11C16/3418 , G11C16/349 , G11C2211/5634
摘要： The decision on whether to refresh or retire a memory block is based on the set of dynamic read values being used. In a memory system using a table of dynamic read values, the table is configured to include how to handle read error (retire, refresh) in addition to the read parameters for the different dynamic read cases. In a refinement, the read case number can used to prioritize blocks selected for refresh or retire. In cases where the read scrub is to be made more precise, multiple dynamic read cases can be applied. Further, which cases are applied can be intelligently selected.
摘要翻译：关于是否刷新或退出内存块的决定是基于正在使用的一组动态读取值。在使用动态读取值表的存储器系统中，该表被配置为包括如何处理读取错误（退出，刷新）以及不同动态读取情况的读取参数。在细化中，读取案例编号可用于为选择刷新或退出的块确定优先级。在读取擦除更精确的情况下，可以应用多个动态读取情况。此外，可以智能地选择应用哪些情况。

17. 发明授权

US09183081B2 Systems and methods for performing defect detection and data recovery in a memory system 有权
标题翻译：用于在存储器系统中执行缺陷检测和数据恢复的系统和方法
公开(公告)号：US09183081B2
公开(公告)日：2015-11-10
申请号：US13795460
申请日：2013-03-12
申请人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
发明人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
IPC分类号： G06F11/00 , G06F11/10 , G11C29/52 , G11C29/04
CPC分类号： G06F11/1044 , G11C29/52 , G11C2029/0401 , G11C2029/0409 , G11C2029/0411
摘要： Systems and methods for performing defect detection and data recovery within a memory system are disclosed. A controller of a memory system may receive a command to write data in a memory of the memory system; determine a physical location of the memory that is associated with the data write; write data associated with the data write to the physical location; and store the physical location of the memory that is associated with the data write in a Tag cache. The controller may further identify a data keep cache of a plurality of data keep caches that is associated with the data write based on the physical location of the memory that is associated with the data write; update an XOR sum based on the data of the data write; and store the updated XOR sum in the identified data keep cache.
摘要翻译：公开了用于在存储器系统内执行缺陷检测和数据恢复的系统和方法。存储器系统的控制器可以接收在存储器系统的存储器中写入数据的命令; 确定与数据写入相关联的存储器的物理位置; 将与数据相关联的数据写入物理位置; 并将与数据写入相关联的存储器的物理位置存储在标签高速缓存中。控制器可以基于与数据写入相关联的存储器的物理位置，进一步识别与数据写入相关联的多个数据保持高速缓存的数据保持高速缓存; 基于数据写入的数据更新XOR和; 并将更新的XOR和存储在所识别的数据保持缓存中。

18. 发明申请

US20130205066A1 ENHANCED WRITE ABORT MANAGEMENT IN FLASH MEMORY 审中-公开
标题翻译：闪存中的增强写入管理
公开(公告)号：US20130205066A1
公开(公告)日：2013-08-08
申请号：US13365595
申请日：2012-02-03
申请人： Gautam A. Dusija , Jianmin Huang , Chris Avila
发明人： Gautam A. Dusija , Jianmin Huang , Chris Avila
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1032 , G06F2212/7202
摘要： A memory system or flash card may include safe zone blocks where data is written in case of an error condition, such as a write abort. The system may utilize predetermined risk zones when selecting the data that is written to the safe zone blocks. For example, data written to a lower page may be one example of data that is a predetermined risk. Upon receiving a write command, the data that is written to a lower page may be written to a safe zone either in parallel or after the write operation.
摘要翻译：存储器系统或闪存卡可以包括在诸如写中止的错误状况的情况下写入数据的安全区块块。当选择写入安全区块的数据时，系统可以利用预定的风险区域。例如，写入下页的数据可以是预定风险的数据的一个示例。一旦接收到写入命令，写入下一页的数据可以并行地或写入操作之后被写入安全区域。

19. 发明申请

US20130166893A1 AUXILIARY CARD INITIALIZATION ROUTINE 审中-公开
标题翻译：辅助卡初始化程序
公开(公告)号：US20130166893A1
公开(公告)日：2013-06-27
申请号：US13336223
申请日：2011-12-23
申请人： Gautam A. Dusija , Jianmin Huang , Chris Avila
发明人： Gautam A. Dusija , Jianmin Huang , Chris Avila
IPC分类号： G06F9/445
CPC分类号： G06F11/1068 , G06F8/654
摘要： A memory system or flash card may be initialized from a protected block of flash memory as a backup process. If there is an error during regular card initialization and the firmware for the card cannot be loaded, the card may be inaccessible to a user. Booting with a protected block of memory may be used to load a different version of the firmware that can still initialize the card despite the error from loading the other firmware.
摘要翻译：存储器系统或闪存卡可以从受保护的闪存块作为备份过程被初始化。如果在普通卡初始化期间发生错误，并且无法加载卡的固件，则卡可能无法访问用户。使用受保护的内存块引导可以用于加载仍然可以初始化卡的固件的不同版本，尽管加载其他固件存在错误。

20. 发明授权

US08180994B2 Optimized page programming order for non-volatile memory 有权
标题翻译：针对非易失性存储器优化页面编程顺序
公开(公告)号：US08180994B2
公开(公告)日：2012-05-15
申请号：US12499219
申请日：2009-07-08
申请人： Steven Sprouse , Jianmin Huang , Chris Avila , Yichao Huang , Emilio Yero
发明人： Steven Sprouse , Jianmin Huang , Chris Avila , Yichao Huang , Emilio Yero
IPC分类号： G06F12/00
CPC分类号： G11C11/5628 , G11C2211/5648
摘要： During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.
摘要翻译：在非易失性存储系统中的编程数据传输过程中，数据的记录单元从主机传送到诸如存储卡的存储设备。对于每个记录单元，数据页按照这样的顺序排列，使得在写入时间较少的页面之前提供需要更长时间写入存储器件的存储器阵列的页面。由于发生更大程度的并行处理，记录单元的整体编程时间减少。当将编程所需的时间更长的页面编程到存储器阵列时，将编程所需的较少时间的页面传送到存储器件。编程完成后，存储器信号通知主机传送下一个记录单元。数据页可以包括下页，中页和上页。

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