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11. 发明授权

US07518166B2 Transistor or semiconductor device comprising ohmic contact in an epitaxy substrate 有权
标题翻译：在外延衬底中包括欧姆接触的晶体管或半导体器件
公开(公告)号：US07518166B2
公开(公告)日：2009-04-14
申请号：US11179971
申请日：2005-07-12
申请人： Jae Kyoung Mun , Jong Won Lim , Woo Jin Chang , Hong Gu Ji , Ho Kyun Ahn , Hae Cheon Kim
发明人： Jae Kyoung Mun , Jong Won Lim , Woo Jin Chang , Hong Gu Ji , Ho Kyun Ahn , Hae Cheon Kim
IPC分类号： H01L29/74
CPC分类号： H01L29/66462 , H01L29/7785
摘要： Provided are a transistor of a semiconductor device and method of fabricating the same. The transistor includes: an epitaxy substrate disposed on a semi-insulating substrate and having a buffer layer, a first Si planar doping layer, a first conductive layer, a second Si planar doping layer, and a second conductive layer, which are sequentially stacked, the second Si planar doping layer having a doping concentration different from that of the first Si planar doping layer; a source electrode and a drain electrode diffusing into the first Si planar doping layer to a predetermined depth and disposed on both sides of the second conductive layer to form an ohmic contact; and a gate electrode disposed on the second conductive layer between the source and drain electrodes and being in contact with the second conductive layer. In this structure, both isolation and switching speed of the transistor can be increased. Also, the maximum voltage limit applied to the transistor is increased due to increases in gate turn-on voltage and threshold voltage and a reduction in parallel conduction element. As a result, the power handling capability of the transistor can be improved, thus improving a high-power low-distortion characteristic and an isolation characteristic.
摘要翻译：提供半导体器件的晶体管及其制造方法。晶体管包括：设置在半绝缘衬底上并具有缓冲层的外延衬底，第一Si平面掺杂层，第一导电层，第二Si平面掺杂层和第二导电层，所述第二Si平面掺杂层具有与所述第一Si平面掺杂层的掺杂浓度不同的掺杂浓度; 源极电极和漏电极，其扩散到所述第一Si平面掺杂层中至预定深度并且设置在所述第二导电层的两侧以形成欧姆接触; 以及设置在所述源极和漏极之间的所述第二导电层上并与所述第二导电层接触的栅电极。在这种结构中，可以提高晶体管的隔离和开关速度。此外，施加到晶体管的最大电压限制由于栅极导通电压和阈值电压的增加以及并联导通元件的减小而增加。结果，可以提高晶体管的功率处理能力，从而提高高功率低失真特性和隔离特性。

12. 发明授权

US07889023B2 Switching circuit for millimeter waveband control circuit 有权
标题翻译：毫米波段控制电路的开关电路
公开(公告)号：US07889023B2
公开(公告)日：2011-02-15
申请号：US12139046
申请日：2008-06-13
申请人： Jae Kyoung Mun , Dong Young Kim , Jong Won Lim , Ho Kyun Ahn , Hae Cheon Kim , Hyun Kyu Yu
发明人： Jae Kyoung Mun , Dong Young Kim , Jong Won Lim , Ho Kyun Ahn , Hae Cheon Kim , Hyun Kyu Yu
IPC分类号： H01P1/10 , H01P3/08
CPC分类号： H03K17/063 , H01P1/15 , H03K17/693 , H03K2017/066
摘要： Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.
摘要翻译：提供了一种用于毫米波段控制电路的开关电路。毫米波段控制电路的开关电路包括设置在信号端口路径上以匹配感兴趣频率并且包括垂直于输入/输出传输线耦合的至少一个晶体管的开关单元和对称地布置在其中的多个接地通孔输入/输出传输线的上部和下部; 用于稳定开关电池的偏置的电容器; 以及与电容器并联耦合的偏置焊盘以控制开关单元。因此，切换电路可能有助于通过简化其设计和布局来改善其隔离，通过使用优化的开关电池的对称结构，而不需要分开使用不同的开关元件，并且还可以通过提高产量来提高其制造成本制造工艺和增强的集成，因为除了低插入损耗之外，可以减小集成电路的芯片尺寸。

13. 发明申请

US20080136552A1 MICROWAVE MODULE HAVING CONVERTER FOR IMPROVING TRANSMISSION CHARACTERISTICS 有权
标题翻译：具有改善传输特性的转换器的微波模块
公开(公告)号：US20080136552A1
公开(公告)日：2008-06-12
申请号：US11875604
申请日：2007-10-19
申请人： Dong Young Kim , Jae Kyoung Mun , Dong Suk Jun , Hae Cheon Kim
发明人： Dong Young Kim , Jae Kyoung Mun , Dong Suk Jun , Hae Cheon Kim
IPC分类号： H03H7/38
CPC分类号： H01P5/08 , H01L2924/19107
摘要： Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.
摘要翻译：提供了一种具有用于改善毫米波段中的传输特性的转换器的微波模块。当微带传输线和导体背面共面波导（CBCPW）传输线通过引线接合连接时，通过引线键合引起的阻抗变化和两条传输线之间的电场分量的突然变化被转换器减少。因此，降低了插入损耗和回波损耗，提高了毫米波段的传输特性。

14. 发明授权

US08058658B2 High-speed optical interconnection device 有权
标题翻译：高速光互连装置
公开(公告)号：US08058658B2
公开(公告)日：2011-11-15
申请号：US12421130
申请日：2009-04-09
申请人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
发明人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
IPC分类号： H01L27/15
CPC分类号： H01L25/167 , H01L2224/0603 , H01L2224/45014 , H01L2224/48137 , H01L2224/4903 , H01L2224/73265 , H01L2924/1305 , H01L2924/30107 , H01L2924/00
摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.
摘要翻译：提供了一种高速光互连装置。高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。光发射器接收来自第一半导体芯片的电信号以输出光信号。光检测器检测光信号，将光信号转换为电信号。第二半导体芯片接收由光学检测器转换的电信号。

15. 发明授权

US07548143B2 Microwave module having converter for improving transmission characteristics 有权
标题翻译：微波模块具有改善传输特性的转换器
公开(公告)号：US07548143B2
公开(公告)日：2009-06-16
申请号：US11875604
申请日：2007-10-19
申请人： Dong Young Kim , Jae Kyoung Mun , Dong Suk Jun , Hae Cheon Kim
发明人： Dong Young Kim , Jae Kyoung Mun , Dong Suk Jun , Hae Cheon Kim
IPC分类号： H01P3/08 , H03H7/38
CPC分类号： H01P5/08 , H01L2924/19107
摘要： Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.
摘要翻译：提供了一种具有用于改善毫米波段中的传输特性的转换器的微波模块。当微带传输线和导体背面共面波导（CBCPW）传输线通过引线接合连接时，通过引线键合引起的阻抗变化和两条传输线之间的电场分量的突然变化被转换器减少。因此，降低了插入损耗和回波损耗，提高了毫米波段的传输特性。

16. 发明授权

US07387955B2 Field effect transistor and method for manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US07387955B2
公开(公告)日：2008-06-17
申请号：US11454721
申请日：2006-06-16
申请人： Ho Kyun Ahn , Jong Won Lim , Jae Kyoung Mun , Hong Gu Ji , Woo Jin Chang , Hea Cheon Kim
发明人： Ho Kyun Ahn , Jong Won Lim , Jae Kyoung Mun , Hong Gu Ji , Woo Jin Chang , Hea Cheon Kim
IPC分类号： H01L21/44
CPC分类号： H01L29/812 , H01L29/42316 , H01L29/66462 , H01L29/66856 , H01L29/778
摘要： A field effect transistor having a T- or Γ-shaped fine gate electrode of which a head portion is wider than a foot portion, and a method for manufacturing the field effect transistor, are provided. A void is formed between the head portion of the gate electrode and a semiconductor substrate using an insulating layer having a multi-layer structure with different etch rates. Since parasitic capacitance between the gate electrode and the semiconductor substrate is reduced by the void, the head portion of the gate electrode can be made large so that gate resistance can be reduced. In addition, since the height of the gate electrode can be adjusted by adjusting the thickness of the insulating layer, device performance as well as process uniformity and repeatability can be improved.
摘要翻译：提供具有头部比脚部宽的T形或γ形的精细栅电极的场效应晶体管，以及制造场效应晶体管的方法。使用具有不同蚀刻速率的多层结构的绝缘层，在栅电极的头部和半导体衬底之间形成空隙。由于栅电极和半导体衬底之间的寄生电容由于空隙而减小，所以能够使栅电极的头部大，能够降低栅极电阻。此外，由于可以通过调节绝缘层的厚度来调节栅电极的高度，因此可以提高器件性能以及工艺的均匀性和重复性。

17. 发明授权

US08772833B2 Power semiconductor device and fabrication method thereof 失效
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US08772833B2
公开(公告)日：2014-07-08
申请号：US13592560
申请日：2012-08-23
申请人： Woo Jin Chang , Jong Won Lim , Ho Kyun Ahn , Sang Choon Ko , Sung Bum Bae , Chull Won Ju , Young Rak Park , Jae Kyoung Mun , Eun Soo Nam
发明人： Woo Jin Chang , Jong Won Lim , Ho Kyun Ahn , Sang Choon Ko , Sung Bum Bae , Chull Won Ju , Young Rak Park , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L29/15
CPC分类号： H01L29/66901 , H01L29/2003 , H01L29/401 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要： Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.
摘要翻译：公开了功率半导体器件及其制造方法，其可以通过形成在栅电极和漏电极之间的场板来增加器件的击穿电压，并且同时实现更容易的制造工艺。根据本公开的示例性实施例的功率半导体器件包括形成在衬底上的源电极和漏电极; 形成在所述源电极和所述漏电极之间的电介质层具有比所述两个电极的高度低的高度，并且包括暴露所述衬底的蚀刻部分; 形成在蚀刻部分上的栅电极; 形成在栅电极和漏电极之间的电介质层上的场板; 以及配置成连接场板和源电极的金属。

18. 发明申请

US20130069127A1 FIELD EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20130069127A1
公开(公告)日：2013-03-21
申请号：US13556377
申请日：2012-07-24
申请人： Ho Kyun AHN , Jong-Won Lim , Sung Bum Bae , Sang Choon Ko , Young Rak Park , Woo Jin Chang , Jae Kyoung Mun , Eun Soo Nam , Jeong Jin Kim , Chull Won Ju
发明人： Ho Kyun AHN , Jong-Won Lim , Sung Bum Bae , Sang Choon Ko , Young Rak Park , Woo Jin Chang , Jae Kyoung Mun , Eun Soo Nam , Jeong Jin Kim , Chull Won Ju
IPC分类号： H01L29/78 , H01L21/20
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/66863 , H01L29/8128
摘要： A method for fabricating a field effect transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a cap layer, an ohmic metal layer and an insulating layer on a substrate; forming multilayered photoresists on the insulating layer; patterning the multilayered photoresists to form a photoresist pattern including a first opening for gate electrode and a second opening for field electrode; etching the insulating layer by using the photoresist pattern as an etching mask so that the insulating layer in the first opening is etched more deeply and the cap layer is exposed through the first opening; etching the cap layer exposed by etching the insulating layer through the first opening to form a gate recess region; and depositing a metal on the gate recess region and the etched insulating layer to form a gate-field electrode layer.
摘要翻译：根据本公开的示例性实施例的制造场效应晶体管的方法包括：在衬底上形成有源层，覆盖层，欧姆金属层和绝缘层; 在所述绝缘层上形成多层光致抗蚀剂; 图案化多层光致抗蚀剂以形成包括用于栅电极的第一开口和场电极的第二开口的光致抗蚀剂图案; 通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻绝缘层，使得第一开口中的绝缘层被更深地蚀刻并且盖层通过第一开口暴露; 通过蚀刻绝缘层通过第一开口蚀刻暴露的盖层，以形成栅极凹陷区域; 以及在所述栅极凹部区域和所述蚀刻绝缘层上沉积金属以形成栅极电极层。

19. 发明授权

US07429894B2 Power device having connection structure compensating for reactance component of transmission line 失效
标题翻译：具有补偿传输线电抗分量的连接结构的功率器件
公开(公告)号：US07429894B2
公开(公告)日：2008-09-30
申请号：US11519668
申请日：2006-09-12
申请人： Woo Jin Chang , Jae Kyoung Mun , Haecheon Kim , Jong Won Lim , Hong Gu Ji , Ho Kyun Ahn
发明人： Woo Jin Chang , Jae Kyoung Mun , Haecheon Kim , Jong Won Lim , Hong Gu Ji , Ho Kyun Ahn
IPC分类号： H03F3/68
CPC分类号： H03F3/602 , H03F3/211 , H03F2200/366 , H03F2200/447 , H03F2200/543 , H03F2203/21178
摘要： Provided is a power device having a connection structure compensating for a reactance component, in which transistors are arranged and connected to minimize deterioration of transistor properties caused by heat by compensating for a reactance component causing a phase difference due to transmission lines used for connecting a plurality of transistors in parallel such that the power device to be used for a high-frequency power amplifier outputs high power, and transmitting heat generated by high output power to a heat sink to be dissipated.
摘要翻译：提供了具有补偿电抗分量的连接结构的功率器件，其中配置并连接晶体管，以通过补偿导致由于用于连接多个元件的传输线引起的相位差的电抗分量来最小化由热引起的晶体管性质的劣化的晶体管并联，使得用于高频功率放大器的功率器件输出高功率，并将由高输出功率产生的热量传输到散热器。

20. 发明授权

US08722474B2 Semiconductor device including stepped gate electrode and fabrication method thereof 有权
标题翻译：包括阶梯式栅电极的半导体器件及其制造方法
公开(公告)号：US08722474B2
公开(公告)日：2014-05-13
申请号：US13592589
申请日：2012-08-23
申请人： Hyung Sup Yoon , Byoung-Gue Min , Jong Min Lee , Seong-Il Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
发明人： Hyung Sup Yoon , Byoung-Gue Min , Jong Min Lee , Seong-Il Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L21/338
CPC分类号： H01L29/0649 , H01L21/28593 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要： Disclosed are a semiconductor device including a stepped gate electrode and a method of fabricating the semiconductor device. The semiconductor device according to an exemplary embodiment of the present disclosure includes: a semiconductor substrate having a structure including a plurality of epitaxial layers and including an under-cut region formed in a part of a Schottky layer in an upper most part thereof; a cap layer, a first nitride layer and a second nitride layer sequentially formed on the semiconductor substrate to form a stepped gate insulating layer pattern; and a stepped gate electrode formed by depositing a heat-resistant metal through the gate insulating layer pattern, wherein the under-cut region includes an air-cavity formed between the gate electrode and the Schottky layer.
摘要翻译：本发明公开了一种半导体器件，包括阶梯栅电极和制造该半导体器件的方法。根据本公开的示例性实施例的半导体器件包括：半导体衬底，其具有包括多个外延层的结构，并且包括形成在其最上部的肖特基层的一部分中的下切割区域; 顺序地形成在半导体衬底上的盖层，第一氮化物层和第二氮化物层，以形成台阶栅极绝缘层图案; 以及通过栅极绝缘层图案沉积耐热金属而形成的阶梯形栅电极，其中下切区域包括形成在栅电极和肖特基层之间的空腔。

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