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    • 11. 发明授权
    • Recording/reproducing apparatus and cross talk cancel method
    • 记录/再现装置和串音取消方法
    • US07372791B2
    • 2008-05-13
    • US10500092
    • 2002-12-26
    • Hisato Hirasaka
    • Hisato Hirasaka
    • G11B5/09G11B15/52
    • G11B20/1879G11B5/0086G11B5/00865G11B5/02G11B7/00G11B20/22G11B2005/001
    • The present invention is directed to a recording/reproducing apparatus having a Read After Write function which simultaneously performs recording operation and reproduction operation, and is such that, in a reproducing system (120) of a tape streamer (100) which performs Read After Write operation for signals through a magnetic tape (105), the apparatus serves to distribute reproduction signals obtained from the magnetic tape by a first data distribution switch (133) to store signals thus distributed into frame memories (135A), (135B) of 2 channels, and to distribute a recording signal from a recording system (110) by a second data distribution switch (134) as cause signals of crosstalk signals included in reproduction signals to store signals thus distributed into frame memories to generate pseudo crosstalk signals of respective channels by crosstalk cancellers (136A), (136B) on the basis of reproduction signals and cause signals of respective channels which are read out from the frame memories to cancel, every channel, crosstalk signals included in reproduction signals of respective channels.
    • 本发明涉及具有同时执行记录操作和再现操作的读写功能的记录/再现装置,并且是在执行写后读取的磁带机(100)的再现系统(120)中, 通过磁带(105)对信号进行操作,该装置用于分配由第一数据分配开关(133)从磁带获得的再现信号,以将如此分配的信号存储到帧存储器(135A),(135B)的 2通道,并且通过第二数据分配开关(134)将来自记录系统(110)的记录信号作为引起再现信号中包括的串扰信号的信号,以将如此分配的信号存储在帧存储器中,以产生相应的模拟串扰信号 基于再现信号的串扰消除器(136A),(136B)的通道,并且导致各个通道的信号 从帧存储器中删除每个通道,包括在各个通道的再现信号中的串扰信号。
    • 12. 发明授权
    • Circuit for calibrating delay lines and method
    • 延迟线校准电路及方法
    • US6127869A
    • 2000-10-03
    • US258253
    • 1999-02-25
    • Hisato Hirasaka
    • Hisato Hirasaka
    • G11B5/09G11B5/00G11B5/012G11B20/10G11B27/36G11B33/10H03K5/13G01F1/66
    • H03K5/131G11B20/10009G11B27/36G11B2005/001G11B33/10G11B5/012G11B5/09
    • A circuit for calibration of the NLTS correction value provided for the NLTS correction circuit to realize its high precision of the amount of the NLTS correction. The circuit for calibrating the NLTS correction value of the present invention comprises a duty cycle-voltage converter (D/V converter) for receiving the output signals of the NLTS correction circuit and converting the duty cycle of the signals to voltage values, an A/D converter for converting the analog output from the D/V converter to digital values, and an delay line control device for controlling the amount of delay of each delay line in accordance with the output of the A/D converter. To providing the circuit for calibrating the NLTS correction value of the present invention for the NLTS correction circuit, the amount of delay of the delay lines is required to be controllable with the delay line control device. Additionally, by providing a frequency spectrum analyzer for analyzing frequency spectrum of the output from the recording amplifier, the calibration of the amount of the NLTS correction including the output from the recording amplifier is realized.
    • 用于校准针对NLTS校正电路的NLTS校正值的电路,以实现其对NLTS校正量的高精度。 用于校准本发明的NLTS校正值的电路包括用于接收NLTS校正电路的输出信号并将该信号的占空比转换为电压值的占空比电压转换器(D / V转换器),A / D转换器,用于将来自D / V转换器的模拟输出转换为数字值;以及延迟线控制装置,用于根据A / D转换器的输出来控制每个延迟线的延迟量。 为了提供用于校准NLTS校正电路的本发明的NLTS校正值的电路,延迟线的延迟量需要通过延迟线控制装置来控制。 此外,通过提供用于分析来自记录放大器的输出的频谱的频谱分析仪,实现了包括来自记录放大器的输出的NLTS校正量的校准。